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Commit | Line | Data |
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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
64dbbd40 GVB |
2 | /* |
3 | * (C) Copyright 2007 | |
4 | * Gerald Van Baren, Custom IDEAS, [email protected] | |
5 | * | |
2a523f52 | 6 | * Copyright 2010-2011 Freescale Semiconductor, Inc. |
64dbbd40 GVB |
7 | */ |
8 | ||
9 | #include <common.h> | |
7b51b576 | 10 | #include <env.h> |
f7ae49fc | 11 | #include <log.h> |
9ad0a799 | 12 | #include <mapmem.h> |
90526e9f | 13 | #include <net.h> |
3e303f74 | 14 | #include <stdio_dev.h> |
64dbbd40 GVB |
15 | #include <linux/ctype.h> |
16 | #include <linux/types.h> | |
64dbbd40 | 17 | #include <asm/global_data.h> |
b08c8c48 | 18 | #include <linux/libfdt.h> |
64dbbd40 | 19 | #include <fdt_support.h> |
151c8b09 | 20 | #include <exports.h> |
a0ae380b | 21 | #include <fdtdec.h> |
64dbbd40 | 22 | |
94fb182c AG |
23 | /** |
24 | * fdt_getprop_u32_default_node - Return a node's property or a default | |
25 | * | |
26 | * @fdt: ptr to device tree | |
27 | * @off: offset of node | |
28 | * @cell: cell offset in property | |
29 | * @prop: property name | |
30 | * @dflt: default value if the property isn't found | |
31 | * | |
32 | * Convenience function to return a node's property or a default value if | |
33 | * the property doesn't exist. | |
34 | */ | |
35 | u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell, | |
36 | const char *prop, const u32 dflt) | |
37 | { | |
38 | const fdt32_t *val; | |
39 | int len; | |
40 | ||
41 | val = fdt_getprop(fdt, off, prop, &len); | |
42 | ||
43 | /* Check if property exists */ | |
44 | if (!val) | |
45 | return dflt; | |
46 | ||
47 | /* Check if property is long enough */ | |
48 | if (len < ((cell + 1) * sizeof(uint32_t))) | |
49 | return dflt; | |
50 | ||
51 | return fdt32_to_cpu(*val); | |
52 | } | |
53 | ||
3bed2aaf KG |
54 | /** |
55 | * fdt_getprop_u32_default - Find a node and return it's property or a default | |
56 | * | |
57 | * @fdt: ptr to device tree | |
58 | * @path: path of node | |
59 | * @prop: property name | |
60 | * @dflt: default value if the property isn't found | |
61 | * | |
62 | * Convenience function to find a node and return it's property or a | |
63 | * default value if it doesn't exist. | |
64 | */ | |
07e12784 GB |
65 | u32 fdt_getprop_u32_default(const void *fdt, const char *path, |
66 | const char *prop, const u32 dflt) | |
3bed2aaf | 67 | { |
3bed2aaf KG |
68 | int off; |
69 | ||
70 | off = fdt_path_offset(fdt, path); | |
71 | if (off < 0) | |
72 | return dflt; | |
73 | ||
94fb182c | 74 | return fdt_getprop_u32_default_node(fdt, off, 0, prop, dflt); |
3bed2aaf | 75 | } |
64dbbd40 | 76 | |
a3c2933e KG |
77 | /** |
78 | * fdt_find_and_setprop: Find a node and set it's property | |
79 | * | |
80 | * @fdt: ptr to device tree | |
81 | * @node: path of node | |
82 | * @prop: property name | |
83 | * @val: ptr to new value | |
84 | * @len: length of new property value | |
85 | * @create: flag to create the property if it doesn't exist | |
86 | * | |
87 | * Convenience function to directly set a property given the path to the node. | |
88 | */ | |
89 | int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, | |
90 | const void *val, int len, int create) | |
91 | { | |
8d04f02f | 92 | int nodeoff = fdt_path_offset(fdt, node); |
a3c2933e KG |
93 | |
94 | if (nodeoff < 0) | |
95 | return nodeoff; | |
96 | ||
8aa5ec6e | 97 | if ((!create) && (fdt_get_property(fdt, nodeoff, prop, NULL) == NULL)) |
a3c2933e KG |
98 | return 0; /* create flag not set; so exit quietly */ |
99 | ||
100 | return fdt_setprop(fdt, nodeoff, prop, val, len); | |
101 | } | |
102 | ||
8edb2192 | 103 | /** |
a9e8e291 SG |
104 | * fdt_find_or_add_subnode() - find or possibly add a subnode of a given node |
105 | * | |
8edb2192 MY |
106 | * @fdt: pointer to the device tree blob |
107 | * @parentoffset: structure block offset of a node | |
108 | * @name: name of the subnode to locate | |
109 | * | |
110 | * fdt_subnode_offset() finds a subnode of the node with a given name. | |
111 | * If the subnode does not exist, it will be created. | |
112 | */ | |
a9e8e291 | 113 | int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name) |
8edb2192 MY |
114 | { |
115 | int offset; | |
116 | ||
117 | offset = fdt_subnode_offset(fdt, parentoffset, name); | |
118 | ||
119 | if (offset == -FDT_ERR_NOTFOUND) | |
120 | offset = fdt_add_subnode(fdt, parentoffset, name); | |
121 | ||
122 | if (offset < 0) | |
123 | printf("%s: %s: %s\n", __func__, name, fdt_strerror(offset)); | |
124 | ||
125 | return offset; | |
126 | } | |
127 | ||
e036a1d2 | 128 | #if defined(CONFIG_OF_STDOUT_VIA_ALIAS) && defined(CONFIG_CONS_INDEX) |
40777812 | 129 | static int fdt_fixup_stdout(void *fdt, int chosenoff) |
151c8b09 | 130 | { |
972f2a89 MY |
131 | int err; |
132 | int aliasoff; | |
151c8b09 | 133 | char sername[9] = { 0 }; |
972f2a89 MY |
134 | const void *path; |
135 | int len; | |
136 | char tmp[256]; /* long enough */ | |
151c8b09 | 137 | |
9f29aeb8 | 138 | sprintf(sername, "serial%d", CONFIG_CONS_INDEX - 1); |
151c8b09 | 139 | |
972f2a89 MY |
140 | aliasoff = fdt_path_offset(fdt, "/aliases"); |
141 | if (aliasoff < 0) { | |
142 | err = aliasoff; | |
da77c819 | 143 | goto noalias; |
151c8b09 | 144 | } |
972f2a89 MY |
145 | |
146 | path = fdt_getprop(fdt, aliasoff, sername, &len); | |
147 | if (!path) { | |
148 | err = len; | |
da77c819 | 149 | goto noalias; |
972f2a89 MY |
150 | } |
151 | ||
152 | /* fdt_setprop may break "path" so we copy it to tmp buffer */ | |
153 | memcpy(tmp, path, len); | |
154 | ||
155 | err = fdt_setprop(fdt, chosenoff, "linux,stdout-path", tmp, len); | |
151c8b09 KG |
156 | if (err < 0) |
157 | printf("WARNING: could not set linux,stdout-path %s.\n", | |
972f2a89 | 158 | fdt_strerror(err)); |
151c8b09 KG |
159 | |
160 | return err; | |
da77c819 SW |
161 | |
162 | noalias: | |
163 | printf("WARNING: %s: could not read %s alias: %s\n", | |
164 | __func__, sername, fdt_strerror(err)); | |
165 | ||
166 | return 0; | |
151c8b09 | 167 | } |
972f2a89 MY |
168 | #else |
169 | static int fdt_fixup_stdout(void *fdt, int chosenoff) | |
170 | { | |
171 | return 0; | |
172 | } | |
151c8b09 KG |
173 | #endif |
174 | ||
f18295d3 MY |
175 | static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name, |
176 | uint64_t val, int is_u64) | |
177 | { | |
178 | if (is_u64) | |
179 | return fdt_setprop_u64(fdt, nodeoffset, name, val); | |
180 | else | |
181 | return fdt_setprop_u32(fdt, nodeoffset, name, (uint32_t)val); | |
182 | } | |
183 | ||
10be5b5d PK |
184 | int fdt_root(void *fdt) |
185 | { | |
186 | char *serial; | |
187 | int err; | |
188 | ||
189 | err = fdt_check_header(fdt); | |
190 | if (err < 0) { | |
191 | printf("fdt_root: %s\n", fdt_strerror(err)); | |
192 | return err; | |
193 | } | |
194 | ||
00caae6d | 195 | serial = env_get("serial#"); |
10be5b5d PK |
196 | if (serial) { |
197 | err = fdt_setprop(fdt, 0, "serial-number", serial, | |
198 | strlen(serial) + 1); | |
199 | ||
200 | if (err < 0) { | |
201 | printf("WARNING: could not set serial-number %s.\n", | |
202 | fdt_strerror(err)); | |
203 | return err; | |
204 | } | |
205 | } | |
206 | ||
207 | return 0; | |
208 | } | |
f18295d3 | 209 | |
dbe963ae | 210 | int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end) |
64dbbd40 | 211 | { |
f18295d3 | 212 | int nodeoffset; |
2a1a2cb6 | 213 | int err, j, total; |
f18295d3 | 214 | int is_u64; |
2a1a2cb6 | 215 | uint64_t addr, size; |
64dbbd40 | 216 | |
50babaf8 MY |
217 | /* just return if the size of initrd is zero */ |
218 | if (initrd_start == initrd_end) | |
219 | return 0; | |
220 | ||
8edb2192 MY |
221 | /* find or create "/chosen" node. */ |
222 | nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen"); | |
223 | if (nodeoffset < 0) | |
2a1a2cb6 | 224 | return nodeoffset; |
64dbbd40 | 225 | |
2a1a2cb6 KG |
226 | total = fdt_num_mem_rsv(fdt); |
227 | ||
228 | /* | |
229 | * Look for an existing entry and update it. If we don't find | |
230 | * the entry, we will j be the next available slot. | |
231 | */ | |
232 | for (j = 0; j < total; j++) { | |
233 | err = fdt_get_mem_rsv(fdt, j, &addr, &size); | |
234 | if (addr == initrd_start) { | |
235 | fdt_del_mem_rsv(fdt, j); | |
236 | break; | |
c28abb9c | 237 | } |
2a1a2cb6 | 238 | } |
8d04f02f | 239 | |
ce6b27a8 | 240 | err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start); |
2a1a2cb6 KG |
241 | if (err < 0) { |
242 | printf("fdt_initrd: %s\n", fdt_strerror(err)); | |
243 | return err; | |
244 | } | |
245 | ||
933cdbb4 | 246 | is_u64 = (fdt_address_cells(fdt, 0) == 2); |
f18295d3 MY |
247 | |
248 | err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-start", | |
249 | (uint64_t)initrd_start, is_u64); | |
f77a606a | 250 | |
dbe963ae MY |
251 | if (err < 0) { |
252 | printf("WARNING: could not set linux,initrd-start %s.\n", | |
253 | fdt_strerror(err)); | |
254 | return err; | |
255 | } | |
f18295d3 MY |
256 | |
257 | err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-end", | |
258 | (uint64_t)initrd_end, is_u64); | |
259 | ||
dbe963ae MY |
260 | if (err < 0) { |
261 | printf("WARNING: could not set linux,initrd-end %s.\n", | |
262 | fdt_strerror(err)); | |
2a1a2cb6 | 263 | |
dbe963ae | 264 | return err; |
64dbbd40 GVB |
265 | } |
266 | ||
2a1a2cb6 KG |
267 | return 0; |
268 | } | |
269 | ||
f0b21ebd NM |
270 | /** |
271 | * board_fdt_chosen_bootargs - boards may override this function to use | |
272 | * alternative kernel command line arguments | |
273 | */ | |
274 | __weak char *board_fdt_chosen_bootargs(void) | |
275 | { | |
276 | return env_get("bootargs"); | |
277 | } | |
278 | ||
bc6ed0f9 | 279 | int fdt_chosen(void *fdt) |
2a1a2cb6 KG |
280 | { |
281 | int nodeoffset; | |
282 | int err; | |
283 | char *str; /* used to set string properties */ | |
2a1a2cb6 KG |
284 | |
285 | err = fdt_check_header(fdt); | |
286 | if (err < 0) { | |
287 | printf("fdt_chosen: %s\n", fdt_strerror(err)); | |
288 | return err; | |
289 | } | |
290 | ||
8edb2192 MY |
291 | /* find or create "/chosen" node. */ |
292 | nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen"); | |
293 | if (nodeoffset < 0) | |
294 | return nodeoffset; | |
64dbbd40 | 295 | |
f0b21ebd NM |
296 | str = board_fdt_chosen_bootargs(); |
297 | ||
972f2a89 MY |
298 | if (str) { |
299 | err = fdt_setprop(fdt, nodeoffset, "bootargs", str, | |
300 | strlen(str) + 1); | |
301 | if (err < 0) { | |
bc6ed0f9 MY |
302 | printf("WARNING: could not set bootargs %s.\n", |
303 | fdt_strerror(err)); | |
972f2a89 MY |
304 | return err; |
305 | } | |
64dbbd40 | 306 | } |
2a1a2cb6 | 307 | |
972f2a89 | 308 | return fdt_fixup_stdout(fdt, nodeoffset); |
64dbbd40 GVB |
309 | } |
310 | ||
e93becf8 KG |
311 | void do_fixup_by_path(void *fdt, const char *path, const char *prop, |
312 | const void *val, int len, int create) | |
313 | { | |
314 | #if defined(DEBUG) | |
315 | int i; | |
d9ad115b | 316 | debug("Updating property '%s/%s' = ", path, prop); |
e93becf8 KG |
317 | for (i = 0; i < len; i++) |
318 | debug(" %.2x", *(u8*)(val+i)); | |
319 | debug("\n"); | |
320 | #endif | |
321 | int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create); | |
322 | if (rc) | |
323 | printf("Unable to update property %s:%s, err=%s\n", | |
324 | path, prop, fdt_strerror(rc)); | |
325 | } | |
326 | ||
327 | void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop, | |
328 | u32 val, int create) | |
329 | { | |
8aa5ec6e KP |
330 | fdt32_t tmp = cpu_to_fdt32(val); |
331 | do_fixup_by_path(fdt, path, prop, &tmp, sizeof(tmp), create); | |
e93becf8 KG |
332 | } |
333 | ||
9eb77cea KG |
334 | void do_fixup_by_prop(void *fdt, |
335 | const char *pname, const void *pval, int plen, | |
336 | const char *prop, const void *val, int len, | |
337 | int create) | |
338 | { | |
339 | int off; | |
340 | #if defined(DEBUG) | |
341 | int i; | |
d9ad115b | 342 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
343 | for (i = 0; i < len; i++) |
344 | debug(" %.2x", *(u8*)(val+i)); | |
345 | debug("\n"); | |
346 | #endif | |
347 | off = fdt_node_offset_by_prop_value(fdt, -1, pname, pval, plen); | |
348 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 349 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
350 | fdt_setprop(fdt, off, prop, val, len); |
351 | off = fdt_node_offset_by_prop_value(fdt, off, pname, pval, plen); | |
352 | } | |
353 | } | |
354 | ||
355 | void do_fixup_by_prop_u32(void *fdt, | |
356 | const char *pname, const void *pval, int plen, | |
357 | const char *prop, u32 val, int create) | |
358 | { | |
8aa5ec6e KP |
359 | fdt32_t tmp = cpu_to_fdt32(val); |
360 | do_fixup_by_prop(fdt, pname, pval, plen, prop, &tmp, 4, create); | |
9eb77cea KG |
361 | } |
362 | ||
363 | void do_fixup_by_compat(void *fdt, const char *compat, | |
364 | const char *prop, const void *val, int len, int create) | |
365 | { | |
366 | int off = -1; | |
367 | #if defined(DEBUG) | |
368 | int i; | |
d9ad115b | 369 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
370 | for (i = 0; i < len; i++) |
371 | debug(" %.2x", *(u8*)(val+i)); | |
372 | debug("\n"); | |
373 | #endif | |
374 | off = fdt_node_offset_by_compatible(fdt, -1, compat); | |
375 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 376 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
377 | fdt_setprop(fdt, off, prop, val, len); |
378 | off = fdt_node_offset_by_compatible(fdt, off, compat); | |
379 | } | |
380 | } | |
381 | ||
382 | void do_fixup_by_compat_u32(void *fdt, const char *compat, | |
383 | const char *prop, u32 val, int create) | |
384 | { | |
8aa5ec6e KP |
385 | fdt32_t tmp = cpu_to_fdt32(val); |
386 | do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); | |
9eb77cea KG |
387 | } |
388 | ||
63c09417 | 389 | #ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY |
739a01ed MY |
390 | /* |
391 | * fdt_pack_reg - pack address and size array into the "reg"-suitable stream | |
392 | */ | |
41f09bbe SG |
393 | static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, |
394 | int n) | |
739a01ed MY |
395 | { |
396 | int i; | |
ffccb84c HG |
397 | int address_cells = fdt_address_cells(fdt, 0); |
398 | int size_cells = fdt_size_cells(fdt, 0); | |
739a01ed MY |
399 | char *p = buf; |
400 | ||
401 | for (i = 0; i < n; i++) { | |
ffccb84c | 402 | if (address_cells == 2) |
739a01ed MY |
403 | *(fdt64_t *)p = cpu_to_fdt64(address[i]); |
404 | else | |
405 | *(fdt32_t *)p = cpu_to_fdt32(address[i]); | |
ffccb84c | 406 | p += 4 * address_cells; |
739a01ed | 407 | |
ffccb84c | 408 | if (size_cells == 2) |
739a01ed MY |
409 | *(fdt64_t *)p = cpu_to_fdt64(size[i]); |
410 | else | |
411 | *(fdt32_t *)p = cpu_to_fdt32(size[i]); | |
ffccb84c | 412 | p += 4 * size_cells; |
739a01ed MY |
413 | } |
414 | ||
415 | return p - (char *)buf; | |
416 | } | |
417 | ||
6b6f216f RF |
418 | #if CONFIG_NR_DRAM_BANKS > 4 |
419 | #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS | |
420 | #else | |
8aa5ec6e | 421 | #define MEMORY_BANKS_MAX 4 |
6b6f216f | 422 | #endif |
5e1a3be6 MS |
423 | |
424 | /** | |
425 | * fdt_fixup_memory_banks - Update DT memory node | |
426 | * @blob: Pointer to DT blob | |
427 | * @start: Pointer to memory start addresses array | |
428 | * @size: Pointer to memory sizes array | |
429 | * @banks: Number of memory banks | |
430 | * | |
431 | * Return: 0 on success, negative value on failure | |
432 | * | |
433 | * Based on the passed number of banks and arrays, the function is able to | |
434 | * update existing DT memory nodes to match run time detected/changed memory | |
435 | * configuration. Implementation is handling one specific case with only one | |
436 | * memory node where multiple tuples could be added/updated. | |
437 | * The case where multiple memory nodes with a single tuple (base, size) are | |
438 | * used, this function is only updating the first memory node without removing | |
439 | * others. | |
440 | */ | |
a6bd9e83 JR |
441 | int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) |
442 | { | |
443 | int err, nodeoffset; | |
6d29cc7d | 444 | int len, i; |
8aa5ec6e | 445 | u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */ |
3c927281 | 446 | |
8aa5ec6e KP |
447 | if (banks > MEMORY_BANKS_MAX) { |
448 | printf("%s: num banks %d exceeds hardcoded limit %d." | |
449 | " Recompile with higher MEMORY_BANKS_MAX?\n", | |
450 | __FUNCTION__, banks, MEMORY_BANKS_MAX); | |
451 | return -1; | |
452 | } | |
453 | ||
3c927281 KG |
454 | err = fdt_check_header(blob); |
455 | if (err < 0) { | |
456 | printf("%s: %s\n", __FUNCTION__, fdt_strerror(err)); | |
457 | return err; | |
458 | } | |
459 | ||
8edb2192 MY |
460 | /* find or create "/memory" node. */ |
461 | nodeoffset = fdt_find_or_add_subnode(blob, 0, "memory"); | |
462 | if (nodeoffset < 0) | |
35940de1 | 463 | return nodeoffset; |
8edb2192 | 464 | |
3c927281 KG |
465 | err = fdt_setprop(blob, nodeoffset, "device_type", "memory", |
466 | sizeof("memory")); | |
467 | if (err < 0) { | |
468 | printf("WARNING: could not set %s %s.\n", "device_type", | |
469 | fdt_strerror(err)); | |
470 | return err; | |
471 | } | |
472 | ||
ed5af03f TR |
473 | for (i = 0; i < banks; i++) { |
474 | if (start[i] == 0 && size[i] == 0) | |
475 | break; | |
476 | } | |
477 | ||
478 | banks = i; | |
479 | ||
5c1cf89f AP |
480 | if (!banks) |
481 | return 0; | |
482 | ||
739a01ed | 483 | len = fdt_pack_reg(blob, tmp, start, size, banks); |
3c927281 KG |
484 | |
485 | err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); | |
486 | if (err < 0) { | |
487 | printf("WARNING: could not set %s %s.\n", | |
488 | "reg", fdt_strerror(err)); | |
489 | return err; | |
490 | } | |
491 | return 0; | |
492 | } | |
949b5a96 IO |
493 | |
494 | int fdt_set_usable_memory(void *blob, u64 start[], u64 size[], int areas) | |
495 | { | |
496 | int err, nodeoffset; | |
497 | int len; | |
498 | u8 tmp[8 * 16]; /* Up to 64-bit address + 64-bit size */ | |
499 | ||
500 | if (areas > 8) { | |
501 | printf("%s: num areas %d exceeds hardcoded limit %d\n", | |
502 | __func__, areas, 8); | |
503 | return -1; | |
504 | } | |
505 | ||
506 | err = fdt_check_header(blob); | |
507 | if (err < 0) { | |
508 | printf("%s: %s\n", __func__, fdt_strerror(err)); | |
509 | return err; | |
510 | } | |
511 | ||
512 | /* find or create "/memory" node. */ | |
513 | nodeoffset = fdt_find_or_add_subnode(blob, 0, "memory"); | |
514 | if (nodeoffset < 0) | |
515 | return nodeoffset; | |
516 | ||
517 | len = fdt_pack_reg(blob, tmp, start, size, areas); | |
518 | ||
519 | err = fdt_setprop(blob, nodeoffset, "linux,usable-memory", tmp, len); | |
520 | if (err < 0) { | |
521 | printf("WARNING: could not set %s %s.\n", | |
522 | "reg", fdt_strerror(err)); | |
523 | return err; | |
524 | } | |
525 | ||
526 | return 0; | |
527 | } | |
63c09417 | 528 | #endif |
3c927281 | 529 | |
a6bd9e83 JR |
530 | int fdt_fixup_memory(void *blob, u64 start, u64 size) |
531 | { | |
532 | return fdt_fixup_memory_banks(blob, &start, &size, 1); | |
533 | } | |
534 | ||
ba37aa03 | 535 | void fdt_fixup_ethernet(void *fdt) |
ab544633 | 536 | { |
24acb83d | 537 | int i = 0, j, prop; |
bc393a79 | 538 | char *tmp, *end; |
064d55f8 | 539 | char mac[16]; |
ab544633 | 540 | const char *path; |
a40db6d5 | 541 | unsigned char mac_addr[ARP_HLEN]; |
bc393a79 | 542 | int offset; |
24acb83d PK |
543 | #ifdef FDT_SEQ_MACADDR_FROM_ENV |
544 | int nodeoff; | |
545 | const struct fdt_property *fdt_prop; | |
546 | #endif | |
ab544633 | 547 | |
a434fd1d | 548 | if (fdt_path_offset(fdt, "/aliases") < 0) |
ba37aa03 KG |
549 | return; |
550 | ||
a434fd1d LI |
551 | /* Cycle through all aliases */ |
552 | for (prop = 0; ; prop++) { | |
bc393a79 | 553 | const char *name; |
bc393a79 | 554 | |
a434fd1d LI |
555 | /* FDT might have been edited, recompute the offset */ |
556 | offset = fdt_first_property_offset(fdt, | |
557 | fdt_path_offset(fdt, "/aliases")); | |
558 | /* Select property number 'prop' */ | |
24acb83d | 559 | for (j = 0; j < prop; j++) |
a434fd1d LI |
560 | offset = fdt_next_property_offset(fdt, offset); |
561 | ||
562 | if (offset < 0) | |
563 | break; | |
564 | ||
bc393a79 | 565 | path = fdt_getprop_by_offset(fdt, offset, &name, NULL); |
f8e57c65 TT |
566 | if (!strncmp(name, "ethernet", 8)) { |
567 | /* Treat plain "ethernet" same as "ethernet0". */ | |
24acb83d PK |
568 | if (!strcmp(name, "ethernet") |
569 | #ifdef FDT_SEQ_MACADDR_FROM_ENV | |
570 | || !strcmp(name, "ethernet0") | |
571 | #endif | |
572 | ) | |
f8e57c65 | 573 | i = 0; |
24acb83d | 574 | #ifndef FDT_SEQ_MACADDR_FROM_ENV |
f8e57c65 TT |
575 | else |
576 | i = trailing_strtol(name); | |
24acb83d | 577 | #endif |
bc393a79 BM |
578 | if (i != -1) { |
579 | if (i == 0) | |
580 | strcpy(mac, "ethaddr"); | |
581 | else | |
582 | sprintf(mac, "eth%daddr", i); | |
583 | } else { | |
584 | continue; | |
585 | } | |
24acb83d PK |
586 | #ifdef FDT_SEQ_MACADDR_FROM_ENV |
587 | nodeoff = fdt_path_offset(fdt, path); | |
588 | fdt_prop = fdt_get_property(fdt, nodeoff, "status", | |
589 | NULL); | |
590 | if (fdt_prop && !strcmp(fdt_prop->data, "disabled")) | |
591 | continue; | |
592 | i++; | |
593 | #endif | |
00caae6d | 594 | tmp = env_get(mac); |
bc393a79 BM |
595 | if (!tmp) |
596 | continue; | |
597 | ||
598 | for (j = 0; j < 6; j++) { | |
599 | mac_addr[j] = tmp ? | |
7e5f460e | 600 | hextoul(tmp, &end) : 0; |
bc393a79 BM |
601 | if (tmp) |
602 | tmp = (*end) ? end + 1 : end; | |
603 | } | |
604 | ||
605 | do_fixup_by_path(fdt, path, "mac-address", | |
606 | &mac_addr, 6, 0); | |
607 | do_fixup_by_path(fdt, path, "local-mac-address", | |
608 | &mac_addr, 6, 1); | |
ab544633 | 609 | } |
ab544633 KG |
610 | } |
611 | } | |
18e69a35 | 612 | |
a5af51a7 PT |
613 | int fdt_record_loadable(void *blob, u32 index, const char *name, |
614 | uintptr_t load_addr, u32 size, uintptr_t entry_point, | |
be2d1a87 | 615 | const char *type, const char *os, const char *arch) |
a5af51a7 PT |
616 | { |
617 | int err, node; | |
618 | ||
619 | err = fdt_check_header(blob); | |
620 | if (err < 0) { | |
621 | printf("%s: %s\n", __func__, fdt_strerror(err)); | |
622 | return err; | |
623 | } | |
624 | ||
625 | /* find or create "/fit-images" node */ | |
626 | node = fdt_find_or_add_subnode(blob, 0, "fit-images"); | |
627 | if (node < 0) | |
628 | return node; | |
629 | ||
630 | /* find or create "/fit-images/<name>" node */ | |
631 | node = fdt_find_or_add_subnode(blob, node, name); | |
632 | if (node < 0) | |
633 | return node; | |
634 | ||
13d1ca87 | 635 | fdt_setprop_u64(blob, node, "load", load_addr); |
a5af51a7 | 636 | if (entry_point != -1) |
13d1ca87 | 637 | fdt_setprop_u64(blob, node, "entry", entry_point); |
a5af51a7 PT |
638 | fdt_setprop_u32(blob, node, "size", size); |
639 | if (type) | |
640 | fdt_setprop_string(blob, node, "type", type); | |
641 | if (os) | |
642 | fdt_setprop_string(blob, node, "os", os); | |
be2d1a87 MS |
643 | if (arch) |
644 | fdt_setprop_string(blob, node, "arch", arch); | |
a5af51a7 PT |
645 | |
646 | return node; | |
647 | } | |
648 | ||
3082d234 | 649 | /* Resize the fdt to its actual size + a bit of padding */ |
ef476836 | 650 | int fdt_shrink_to_minimum(void *blob, uint extrasize) |
3082d234 KG |
651 | { |
652 | int i; | |
653 | uint64_t addr, size; | |
654 | int total, ret; | |
655 | uint actualsize; | |
59bd7968 | 656 | int fdt_memrsv = 0; |
3082d234 KG |
657 | |
658 | if (!blob) | |
659 | return 0; | |
660 | ||
661 | total = fdt_num_mem_rsv(blob); | |
662 | for (i = 0; i < total; i++) { | |
663 | fdt_get_mem_rsv(blob, i, &addr, &size); | |
92549358 | 664 | if (addr == (uintptr_t)blob) { |
3082d234 | 665 | fdt_del_mem_rsv(blob, i); |
59bd7968 | 666 | fdt_memrsv = 1; |
3082d234 KG |
667 | break; |
668 | } | |
669 | } | |
670 | ||
f242a088 PK |
671 | /* |
672 | * Calculate the actual size of the fdt | |
3840ebfa FW |
673 | * plus the size needed for 5 fdt_add_mem_rsv, one |
674 | * for the fdt itself and 4 for a possible initrd | |
675 | * ((initrd-start + initrd-end) * 2 (name & value)) | |
f242a088 | 676 | */ |
3082d234 | 677 | actualsize = fdt_off_dt_strings(blob) + |
3840ebfa | 678 | fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry); |
3082d234 | 679 | |
ef476836 | 680 | actualsize += extrasize; |
3082d234 | 681 | /* Make it so the fdt ends on a page boundary */ |
92549358 SG |
682 | actualsize = ALIGN(actualsize + ((uintptr_t)blob & 0xfff), 0x1000); |
683 | actualsize = actualsize - ((uintptr_t)blob & 0xfff); | |
3082d234 KG |
684 | |
685 | /* Change the fdt header to reflect the correct size */ | |
686 | fdt_set_totalsize(blob, actualsize); | |
687 | ||
59bd7968 SG |
688 | if (fdt_memrsv) { |
689 | /* Add the new reservation */ | |
690 | ret = fdt_add_mem_rsv(blob, map_to_sysmem(blob), actualsize); | |
691 | if (ret < 0) | |
692 | return ret; | |
693 | } | |
3082d234 KG |
694 | |
695 | return actualsize; | |
696 | } | |
8ab451c4 KG |
697 | |
698 | #ifdef CONFIG_PCI | |
cfd700be | 699 | #define CONFIG_SYS_PCI_NR_INBOUND_WIN 4 |
8ab451c4 KG |
700 | |
701 | #define FDT_PCI_PREFETCH (0x40000000) | |
702 | #define FDT_PCI_MEM32 (0x02000000) | |
703 | #define FDT_PCI_IO (0x01000000) | |
704 | #define FDT_PCI_MEM64 (0x03000000) | |
705 | ||
706 | int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { | |
707 | ||
708 | int addrcell, sizecell, len, r; | |
709 | u32 *dma_range; | |
710 | /* sized based on pci addr cells, size-cells, & address-cells */ | |
711 | u32 dma_ranges[(3 + 2 + 2) * CONFIG_SYS_PCI_NR_INBOUND_WIN]; | |
712 | ||
713 | addrcell = fdt_getprop_u32_default(blob, "/", "#address-cells", 1); | |
714 | sizecell = fdt_getprop_u32_default(blob, "/", "#size-cells", 1); | |
715 | ||
716 | dma_range = &dma_ranges[0]; | |
717 | for (r = 0; r < hose->region_count; r++) { | |
718 | u64 bus_start, phys_start, size; | |
719 | ||
ff4e66e9 KG |
720 | /* skip if !PCI_REGION_SYS_MEMORY */ |
721 | if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY)) | |
8ab451c4 KG |
722 | continue; |
723 | ||
724 | bus_start = (u64)hose->regions[r].bus_start; | |
725 | phys_start = (u64)hose->regions[r].phys_start; | |
726 | size = (u64)hose->regions[r].size; | |
727 | ||
728 | dma_range[0] = 0; | |
cfd700be | 729 | if (size >= 0x100000000ull) |
867aaf68 | 730 | dma_range[0] |= cpu_to_fdt32(FDT_PCI_MEM64); |
8ab451c4 | 731 | else |
867aaf68 | 732 | dma_range[0] |= cpu_to_fdt32(FDT_PCI_MEM32); |
8ab451c4 | 733 | if (hose->regions[r].flags & PCI_REGION_PREFETCH) |
867aaf68 | 734 | dma_range[0] |= cpu_to_fdt32(FDT_PCI_PREFETCH); |
8ab451c4 | 735 | #ifdef CONFIG_SYS_PCI_64BIT |
867aaf68 | 736 | dma_range[1] = cpu_to_fdt32(bus_start >> 32); |
8ab451c4 KG |
737 | #else |
738 | dma_range[1] = 0; | |
739 | #endif | |
867aaf68 | 740 | dma_range[2] = cpu_to_fdt32(bus_start & 0xffffffff); |
8ab451c4 KG |
741 | |
742 | if (addrcell == 2) { | |
867aaf68 MV |
743 | dma_range[3] = cpu_to_fdt32(phys_start >> 32); |
744 | dma_range[4] = cpu_to_fdt32(phys_start & 0xffffffff); | |
8ab451c4 | 745 | } else { |
867aaf68 | 746 | dma_range[3] = cpu_to_fdt32(phys_start & 0xffffffff); |
8ab451c4 KG |
747 | } |
748 | ||
749 | if (sizecell == 2) { | |
867aaf68 MV |
750 | dma_range[3 + addrcell + 0] = |
751 | cpu_to_fdt32(size >> 32); | |
752 | dma_range[3 + addrcell + 1] = | |
753 | cpu_to_fdt32(size & 0xffffffff); | |
8ab451c4 | 754 | } else { |
867aaf68 MV |
755 | dma_range[3 + addrcell + 0] = |
756 | cpu_to_fdt32(size & 0xffffffff); | |
8ab451c4 KG |
757 | } |
758 | ||
759 | dma_range += (3 + addrcell + sizecell); | |
760 | } | |
761 | ||
762 | len = dma_range - &dma_ranges[0]; | |
763 | if (len) | |
764 | fdt_setprop(blob, phb_off, "dma-ranges", &dma_ranges[0], len*4); | |
765 | ||
766 | return 0; | |
767 | } | |
768 | #endif | |
30d45c0d | 769 | |
cb2707af MM |
770 | int fdt_increase_size(void *fdt, int add_len) |
771 | { | |
772 | int newlen; | |
773 | ||
774 | newlen = fdt_totalsize(fdt) + add_len; | |
775 | ||
776 | /* Open in place with a new len */ | |
777 | return fdt_open_into(fdt, fdt, newlen); | |
778 | } | |
779 | ||
3c950e2e AG |
780 | #ifdef CONFIG_FDT_FIXUP_PARTITIONS |
781 | #include <jffs2/load_kernel.h> | |
782 | #include <mtd_node.h> | |
783 | ||
cd1457d7 | 784 | static int fdt_del_subnodes(const void *blob, int parent_offset) |
3c950e2e AG |
785 | { |
786 | int off, ndepth; | |
787 | int ret; | |
788 | ||
789 | for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth); | |
790 | (off >= 0) && (ndepth > 0); | |
791 | off = fdt_next_node(blob, off, &ndepth)) { | |
792 | if (ndepth == 1) { | |
793 | debug("delete %s: offset: %x\n", | |
794 | fdt_get_name(blob, off, 0), off); | |
795 | ret = fdt_del_node((void *)blob, off); | |
796 | if (ret < 0) { | |
797 | printf("Can't delete node: %s\n", | |
798 | fdt_strerror(ret)); | |
799 | return ret; | |
800 | } else { | |
801 | ndepth = 0; | |
802 | off = parent_offset; | |
803 | } | |
804 | } | |
805 | } | |
806 | return 0; | |
807 | } | |
808 | ||
cd1457d7 | 809 | static int fdt_del_partitions(void *blob, int parent_offset) |
3c950e2e AG |
810 | { |
811 | const void *prop; | |
812 | int ndepth = 0; | |
813 | int off; | |
814 | int ret; | |
815 | ||
816 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
817 | if (off > 0 && ndepth == 1) { | |
818 | prop = fdt_getprop(blob, off, "label", NULL); | |
819 | if (prop == NULL) { | |
820 | /* | |
821 | * Could not find label property, nand {}; node? | |
822 | * Check subnode, delete partitions there if any. | |
823 | */ | |
824 | return fdt_del_partitions(blob, off); | |
825 | } else { | |
826 | ret = fdt_del_subnodes(blob, parent_offset); | |
827 | if (ret < 0) { | |
828 | printf("Can't remove subnodes: %s\n", | |
829 | fdt_strerror(ret)); | |
830 | return ret; | |
831 | } | |
832 | } | |
833 | } | |
834 | return 0; | |
835 | } | |
836 | ||
8ce8e42e MY |
837 | static int fdt_node_set_part_info(void *blob, int parent_offset, |
838 | struct mtd_device *dev) | |
3c950e2e AG |
839 | { |
840 | struct list_head *pentry; | |
841 | struct part_info *part; | |
3c950e2e AG |
842 | int off, ndepth = 0; |
843 | int part_num, ret; | |
3a9a62a1 | 844 | int sizecell; |
3c950e2e AG |
845 | char buf[64]; |
846 | ||
847 | ret = fdt_del_partitions(blob, parent_offset); | |
848 | if (ret < 0) | |
849 | return ret; | |
850 | ||
3a9a62a1 SM |
851 | /* |
852 | * Check if size/address is 1 or 2 cells. | |
853 | * We assume #address-cells and #size-cells have same value. | |
854 | */ | |
855 | sizecell = fdt_getprop_u32_default_node(blob, parent_offset, | |
856 | 0, "#size-cells", 1); | |
857 | ||
3c950e2e AG |
858 | /* |
859 | * Check if it is nand {}; subnode, adjust | |
860 | * the offset in this case | |
861 | */ | |
862 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
863 | if (off > 0 && ndepth == 1) | |
864 | parent_offset = off; | |
865 | ||
866 | part_num = 0; | |
867 | list_for_each_prev(pentry, &dev->parts) { | |
868 | int newoff; | |
869 | ||
870 | part = list_entry(pentry, struct part_info, link); | |
871 | ||
06503f16 | 872 | debug("%2d: %-20s0x%08llx\t0x%08llx\t%d\n", |
3c950e2e AG |
873 | part_num, part->name, part->size, |
874 | part->offset, part->mask_flags); | |
875 | ||
06503f16 | 876 | sprintf(buf, "partition@%llx", part->offset); |
3c950e2e AG |
877 | add_sub: |
878 | ret = fdt_add_subnode(blob, parent_offset, buf); | |
879 | if (ret == -FDT_ERR_NOSPACE) { | |
880 | ret = fdt_increase_size(blob, 512); | |
881 | if (!ret) | |
882 | goto add_sub; | |
883 | else | |
884 | goto err_size; | |
885 | } else if (ret < 0) { | |
886 | printf("Can't add partition node: %s\n", | |
887 | fdt_strerror(ret)); | |
888 | return ret; | |
889 | } | |
890 | newoff = ret; | |
891 | ||
892 | /* Check MTD_WRITEABLE_CMD flag */ | |
893 | if (part->mask_flags & 1) { | |
894 | add_ro: | |
895 | ret = fdt_setprop(blob, newoff, "read_only", NULL, 0); | |
896 | if (ret == -FDT_ERR_NOSPACE) { | |
897 | ret = fdt_increase_size(blob, 512); | |
898 | if (!ret) | |
899 | goto add_ro; | |
900 | else | |
901 | goto err_size; | |
902 | } else if (ret < 0) | |
903 | goto err_prop; | |
904 | } | |
905 | ||
3c950e2e | 906 | add_reg: |
3a9a62a1 SM |
907 | if (sizecell == 2) { |
908 | ret = fdt_setprop_u64(blob, newoff, | |
909 | "reg", part->offset); | |
910 | if (!ret) | |
911 | ret = fdt_appendprop_u64(blob, newoff, | |
912 | "reg", part->size); | |
913 | } else { | |
914 | ret = fdt_setprop_u32(blob, newoff, | |
915 | "reg", part->offset); | |
916 | if (!ret) | |
917 | ret = fdt_appendprop_u32(blob, newoff, | |
918 | "reg", part->size); | |
919 | } | |
920 | ||
3c950e2e AG |
921 | if (ret == -FDT_ERR_NOSPACE) { |
922 | ret = fdt_increase_size(blob, 512); | |
923 | if (!ret) | |
924 | goto add_reg; | |
925 | else | |
926 | goto err_size; | |
927 | } else if (ret < 0) | |
928 | goto err_prop; | |
929 | ||
930 | add_label: | |
931 | ret = fdt_setprop_string(blob, newoff, "label", part->name); | |
932 | if (ret == -FDT_ERR_NOSPACE) { | |
933 | ret = fdt_increase_size(blob, 512); | |
934 | if (!ret) | |
935 | goto add_label; | |
936 | else | |
937 | goto err_size; | |
938 | } else if (ret < 0) | |
939 | goto err_prop; | |
940 | ||
941 | part_num++; | |
942 | } | |
943 | return 0; | |
944 | err_size: | |
945 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
946 | return ret; | |
947 | err_prop: | |
948 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
949 | return ret; | |
950 | } | |
951 | ||
952 | /* | |
953 | * Update partitions in nor/nand nodes using info from | |
954 | * mtdparts environment variable. The nodes to update are | |
955 | * specified by node_info structure which contains mtd device | |
956 | * type and compatible string: E. g. the board code in | |
957 | * ft_board_setup() could use: | |
958 | * | |
959 | * struct node_info nodes[] = { | |
960 | * { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, }, | |
961 | * { "cfi-flash", MTD_DEV_TYPE_NOR, }, | |
962 | * }; | |
963 | * | |
964 | * fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); | |
965 | */ | |
5f4e32d0 MY |
966 | void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info, |
967 | int node_info_size) | |
3c950e2e | 968 | { |
3c950e2e | 969 | struct mtd_device *dev; |
3c950e2e AG |
970 | int i, idx; |
971 | int noff; | |
53a89664 | 972 | bool inited = false; |
3c950e2e AG |
973 | |
974 | for (i = 0; i < node_info_size; i++) { | |
975 | idx = 0; | |
7d8073e7 MY |
976 | noff = -1; |
977 | ||
978 | while ((noff = fdt_node_offset_by_compatible(blob, noff, | |
979 | node_info[i].compat)) >= 0) { | |
980 | const char *prop; | |
981 | ||
982 | prop = fdt_getprop(blob, noff, "status", NULL); | |
983 | if (prop && !strcmp(prop, "disabled")) | |
984 | continue; | |
985 | ||
3c950e2e AG |
986 | debug("%s: %s, mtd dev type %d\n", |
987 | fdt_get_name(blob, noff, 0), | |
5f4e32d0 | 988 | node_info[i].compat, node_info[i].type); |
53a89664 MY |
989 | |
990 | if (!inited) { | |
991 | if (mtdparts_init() != 0) | |
992 | return; | |
993 | inited = true; | |
994 | } | |
995 | ||
5f4e32d0 | 996 | dev = device_find(node_info[i].type, idx++); |
3c950e2e AG |
997 | if (dev) { |
998 | if (fdt_node_set_part_info(blob, noff, dev)) | |
999 | return; /* return on error */ | |
1000 | } | |
3c950e2e AG |
1001 | } |
1002 | } | |
1003 | } | |
1004 | #endif | |
49b97d9c KG |
1005 | |
1006 | void fdt_del_node_and_alias(void *blob, const char *alias) | |
1007 | { | |
1008 | int off = fdt_path_offset(blob, alias); | |
1009 | ||
1010 | if (off < 0) | |
1011 | return; | |
1012 | ||
1013 | fdt_del_node(blob, off); | |
1014 | ||
1015 | off = fdt_path_offset(blob, "/aliases"); | |
1016 | fdt_delprop(blob, off, alias); | |
1017 | } | |
a0342c08 | 1018 | |
a0342c08 KG |
1019 | /* Max address size we deal with */ |
1020 | #define OF_MAX_ADDR_CELLS 4 | |
a0ae380b | 1021 | #define OF_BAD_ADDR FDT_ADDR_T_NONE |
a47abd7b DB |
1022 | #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ |
1023 | (ns) > 0) | |
a0342c08 KG |
1024 | |
1025 | /* Debug utility */ | |
1026 | #ifdef DEBUG | |
8aa5ec6e | 1027 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) |
a0342c08 KG |
1028 | { |
1029 | printf("%s", s); | |
1030 | while(na--) | |
1031 | printf(" %08x", *(addr++)); | |
1032 | printf("\n"); | |
1033 | } | |
1034 | #else | |
8aa5ec6e | 1035 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { } |
a0342c08 KG |
1036 | #endif |
1037 | ||
0a222d53 PB |
1038 | /** |
1039 | * struct of_bus - Callbacks for bus specific translators | |
49717b18 PB |
1040 | * @name: A string used to identify this bus in debug output. |
1041 | * @addresses: The name of the DT property from which addresses are | |
1042 | * to be read, typically "reg". | |
0a222d53 PB |
1043 | * @match: Return non-zero if the node whose parent is at |
1044 | * parentoffset in the FDT blob corresponds to a bus | |
1045 | * of this type, otherwise return zero. If NULL a match | |
1046 | * is assumed. | |
49717b18 PB |
1047 | * @count_cells:Count how many cells (be32 values) a node whose parent |
1048 | * is at parentoffset in the FDT blob will require to | |
1049 | * represent its address (written to *addrc) & size | |
1050 | * (written to *sizec). | |
1051 | * @map: Map the address addr from the address space of this | |
1052 | * bus to that of its parent, making use of the ranges | |
1053 | * read from DT to an array at range. na and ns are the | |
1054 | * number of cells (be32 values) used to hold and address | |
1055 | * or size, respectively, for this bus. pna is the number | |
1056 | * of cells used to hold an address for the parent bus. | |
1057 | * Returns the address in the address space of the parent | |
1058 | * bus. | |
1059 | * @translate: Update the value of the address cells at addr within an | |
1060 | * FDT by adding offset to it. na specifies the number of | |
1061 | * cells used to hold the address being translated. Returns | |
1062 | * zero on success, non-zero on error. | |
0a222d53 PB |
1063 | * |
1064 | * Each bus type will include a struct of_bus in the of_busses array, | |
1065 | * providing implementations of some or all of the functions used to | |
1066 | * match the bus & handle address translation for its children. | |
1067 | */ | |
a0342c08 KG |
1068 | struct of_bus { |
1069 | const char *name; | |
1070 | const char *addresses; | |
11e44fc6 SW |
1071 | int (*match)(const void *blob, int parentoffset); |
1072 | void (*count_cells)(const void *blob, int parentoffset, | |
a0342c08 | 1073 | int *addrc, int *sizec); |
8aa5ec6e | 1074 | u64 (*map)(fdt32_t *addr, const fdt32_t *range, |
a0342c08 | 1075 | int na, int ns, int pna); |
8aa5ec6e | 1076 | int (*translate)(fdt32_t *addr, u64 offset, int na); |
a0342c08 KG |
1077 | }; |
1078 | ||
1079 | /* Default translator (generic bus) */ | |
eed36609 | 1080 | void fdt_support_default_count_cells(const void *blob, int parentoffset, |
a0342c08 KG |
1081 | int *addrc, int *sizec) |
1082 | { | |
8aa5ec6e | 1083 | const fdt32_t *prop; |
6395f318 | 1084 | |
933cdbb4 SG |
1085 | if (addrc) |
1086 | *addrc = fdt_address_cells(blob, parentoffset); | |
6395f318 SW |
1087 | |
1088 | if (sizec) { | |
1089 | prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); | |
1090 | if (prop) | |
8aa5ec6e | 1091 | *sizec = be32_to_cpup(prop); |
6395f318 SW |
1092 | else |
1093 | *sizec = 1; | |
1094 | } | |
a0342c08 KG |
1095 | } |
1096 | ||
8aa5ec6e | 1097 | static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, |
a0342c08 KG |
1098 | int na, int ns, int pna) |
1099 | { | |
1100 | u64 cp, s, da; | |
1101 | ||
eed36609 SG |
1102 | cp = fdt_read_number(range, na); |
1103 | s = fdt_read_number(range + na + pna, ns); | |
1104 | da = fdt_read_number(addr, na); | |
a0342c08 | 1105 | |
d8e9cf4d | 1106 | debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
a0342c08 KG |
1107 | |
1108 | if (da < cp || da >= (cp + s)) | |
1109 | return OF_BAD_ADDR; | |
1110 | return da - cp; | |
1111 | } | |
1112 | ||
8aa5ec6e | 1113 | static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na) |
a0342c08 | 1114 | { |
eed36609 | 1115 | u64 a = fdt_read_number(addr, na); |
a0342c08 KG |
1116 | memset(addr, 0, na * 4); |
1117 | a += offset; | |
1118 | if (na > 1) | |
8aa5ec6e KP |
1119 | addr[na - 2] = cpu_to_fdt32(a >> 32); |
1120 | addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu); | |
a0342c08 KG |
1121 | |
1122 | return 0; | |
1123 | } | |
1124 | ||
0a222d53 PB |
1125 | #ifdef CONFIG_OF_ISA_BUS |
1126 | ||
1127 | /* ISA bus translator */ | |
11e44fc6 | 1128 | static int of_bus_isa_match(const void *blob, int parentoffset) |
0a222d53 PB |
1129 | { |
1130 | const char *name; | |
1131 | ||
1132 | name = fdt_get_name(blob, parentoffset, NULL); | |
1133 | if (!name) | |
1134 | return 0; | |
1135 | ||
1136 | return !strcmp(name, "isa"); | |
1137 | } | |
1138 | ||
11e44fc6 | 1139 | static void of_bus_isa_count_cells(const void *blob, int parentoffset, |
0a222d53 PB |
1140 | int *addrc, int *sizec) |
1141 | { | |
1142 | if (addrc) | |
1143 | *addrc = 2; | |
1144 | if (sizec) | |
1145 | *sizec = 1; | |
1146 | } | |
1147 | ||
1148 | static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range, | |
1149 | int na, int ns, int pna) | |
1150 | { | |
1151 | u64 cp, s, da; | |
1152 | ||
1153 | /* Check address type match */ | |
1154 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) | |
1155 | return OF_BAD_ADDR; | |
1156 | ||
eed36609 SG |
1157 | cp = fdt_read_number(range + 1, na - 1); |
1158 | s = fdt_read_number(range + na + pna, ns); | |
1159 | da = fdt_read_number(addr + 1, na - 1); | |
0a222d53 | 1160 | |
d8e9cf4d | 1161 | debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
0a222d53 PB |
1162 | |
1163 | if (da < cp || da >= (cp + s)) | |
1164 | return OF_BAD_ADDR; | |
1165 | return da - cp; | |
1166 | } | |
1167 | ||
1168 | static int of_bus_isa_translate(fdt32_t *addr, u64 offset, int na) | |
1169 | { | |
1170 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
1171 | } | |
1172 | ||
1173 | #endif /* CONFIG_OF_ISA_BUS */ | |
1174 | ||
a0342c08 KG |
1175 | /* Array of bus specific translators */ |
1176 | static struct of_bus of_busses[] = { | |
0a222d53 PB |
1177 | #ifdef CONFIG_OF_ISA_BUS |
1178 | /* ISA */ | |
1179 | { | |
1180 | .name = "isa", | |
1181 | .addresses = "reg", | |
1182 | .match = of_bus_isa_match, | |
1183 | .count_cells = of_bus_isa_count_cells, | |
1184 | .map = of_bus_isa_map, | |
1185 | .translate = of_bus_isa_translate, | |
1186 | }, | |
1187 | #endif /* CONFIG_OF_ISA_BUS */ | |
a0342c08 KG |
1188 | /* Default */ |
1189 | { | |
1190 | .name = "default", | |
1191 | .addresses = "reg", | |
eed36609 | 1192 | .count_cells = fdt_support_default_count_cells, |
a0342c08 KG |
1193 | .map = of_bus_default_map, |
1194 | .translate = of_bus_default_translate, | |
1195 | }, | |
1196 | }; | |
1197 | ||
11e44fc6 | 1198 | static struct of_bus *of_match_bus(const void *blob, int parentoffset) |
0a222d53 PB |
1199 | { |
1200 | struct of_bus *bus; | |
1201 | ||
1202 | if (ARRAY_SIZE(of_busses) == 1) | |
1203 | return of_busses; | |
1204 | ||
1205 | for (bus = of_busses; bus; bus++) { | |
1206 | if (!bus->match || bus->match(blob, parentoffset)) | |
1207 | return bus; | |
1208 | } | |
1209 | ||
1210 | /* | |
1211 | * We should always have matched the default bus at least, since | |
1212 | * it has a NULL match field. If we didn't then it somehow isn't | |
1213 | * in the of_busses array or something equally catastrophic has | |
1214 | * gone wrong. | |
1215 | */ | |
1216 | assert(0); | |
1217 | return NULL; | |
1218 | } | |
1219 | ||
11e44fc6 | 1220 | static int of_translate_one(const void *blob, int parent, struct of_bus *bus, |
8aa5ec6e | 1221 | struct of_bus *pbus, fdt32_t *addr, |
a0342c08 KG |
1222 | int na, int ns, int pna, const char *rprop) |
1223 | { | |
8aa5ec6e | 1224 | const fdt32_t *ranges; |
a0342c08 KG |
1225 | int rlen; |
1226 | int rone; | |
1227 | u64 offset = OF_BAD_ADDR; | |
1228 | ||
1229 | /* Normally, an absence of a "ranges" property means we are | |
1230 | * crossing a non-translatable boundary, and thus the addresses | |
1231 | * below the current not cannot be converted to CPU physical ones. | |
1232 | * Unfortunately, while this is very clear in the spec, it's not | |
1233 | * what Apple understood, and they do have things like /uni-n or | |
1234 | * /ht nodes with no "ranges" property and a lot of perfectly | |
1235 | * useable mapped devices below them. Thus we treat the absence of | |
1236 | * "ranges" as equivalent to an empty "ranges" property which means | |
1237 | * a 1:1 translation at that level. It's up to the caller not to try | |
1238 | * to translate addresses that aren't supposed to be translated in | |
1239 | * the first place. --BenH. | |
1240 | */ | |
8aa5ec6e | 1241 | ranges = fdt_getprop(blob, parent, rprop, &rlen); |
a0342c08 | 1242 | if (ranges == NULL || rlen == 0) { |
eed36609 | 1243 | offset = fdt_read_number(addr, na); |
a0342c08 KG |
1244 | memset(addr, 0, pna * 4); |
1245 | debug("OF: no ranges, 1:1 translation\n"); | |
1246 | goto finish; | |
1247 | } | |
1248 | ||
1249 | debug("OF: walking ranges...\n"); | |
1250 | ||
1251 | /* Now walk through the ranges */ | |
1252 | rlen /= 4; | |
1253 | rone = na + pna + ns; | |
1254 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
1255 | offset = bus->map(addr, ranges, na, ns, pna); | |
1256 | if (offset != OF_BAD_ADDR) | |
1257 | break; | |
1258 | } | |
1259 | if (offset == OF_BAD_ADDR) { | |
1260 | debug("OF: not found !\n"); | |
1261 | return 1; | |
1262 | } | |
1263 | memcpy(addr, ranges + na, 4 * pna); | |
1264 | ||
1265 | finish: | |
1266 | of_dump_addr("OF: parent translation for:", addr, pna); | |
dee37fc9 | 1267 | debug("OF: with offset: %llu\n", offset); |
a0342c08 KG |
1268 | |
1269 | /* Translate it into parent bus space */ | |
1270 | return pbus->translate(addr, offset, pna); | |
1271 | } | |
1272 | ||
1273 | /* | |
1274 | * Translate an address from the device-tree into a CPU physical address, | |
1275 | * this walks up the tree and applies the various bus mappings on the | |
1276 | * way. | |
1277 | * | |
1278 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
1279 | * that translation is impossible (that is we are not dealing with a value | |
1280 | * that can be mapped to a cpu physical address). This is not really specified | |
1281 | * that way, but this is traditionally the way IBM at least do things | |
1282 | */ | |
11e44fc6 SW |
1283 | static u64 __of_translate_address(const void *blob, int node_offset, |
1284 | const fdt32_t *in_addr, const char *rprop) | |
a0342c08 KG |
1285 | { |
1286 | int parent; | |
1287 | struct of_bus *bus, *pbus; | |
8aa5ec6e | 1288 | fdt32_t addr[OF_MAX_ADDR_CELLS]; |
a0342c08 KG |
1289 | int na, ns, pna, pns; |
1290 | u64 result = OF_BAD_ADDR; | |
1291 | ||
1292 | debug("OF: ** translation for device %s **\n", | |
1293 | fdt_get_name(blob, node_offset, NULL)); | |
1294 | ||
1295 | /* Get parent & match bus type */ | |
1296 | parent = fdt_parent_offset(blob, node_offset); | |
1297 | if (parent < 0) | |
1298 | goto bail; | |
0a222d53 | 1299 | bus = of_match_bus(blob, parent); |
a0342c08 KG |
1300 | |
1301 | /* Cound address cells & copy address locally */ | |
6395f318 | 1302 | bus->count_cells(blob, parent, &na, &ns); |
4428f3c8 | 1303 | if (!OF_CHECK_COUNTS(na, ns)) { |
a0342c08 KG |
1304 | printf("%s: Bad cell count for %s\n", __FUNCTION__, |
1305 | fdt_get_name(blob, node_offset, NULL)); | |
1306 | goto bail; | |
1307 | } | |
1308 | memcpy(addr, in_addr, na * 4); | |
1309 | ||
1310 | debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
1311 | bus->name, na, ns, fdt_get_name(blob, parent, NULL)); | |
1312 | of_dump_addr("OF: translating address:", addr, na); | |
1313 | ||
1314 | /* Translate */ | |
1315 | for (;;) { | |
1316 | /* Switch to parent bus */ | |
1317 | node_offset = parent; | |
1318 | parent = fdt_parent_offset(blob, node_offset); | |
1319 | ||
1320 | /* If root, we have finished */ | |
1321 | if (parent < 0) { | |
1322 | debug("OF: reached root node\n"); | |
eed36609 | 1323 | result = fdt_read_number(addr, na); |
a0342c08 KG |
1324 | break; |
1325 | } | |
1326 | ||
1327 | /* Get new parent bus and counts */ | |
0a222d53 | 1328 | pbus = of_match_bus(blob, parent); |
6395f318 | 1329 | pbus->count_cells(blob, parent, &pna, &pns); |
4428f3c8 | 1330 | if (!OF_CHECK_COUNTS(pna, pns)) { |
a0342c08 KG |
1331 | printf("%s: Bad cell count for %s\n", __FUNCTION__, |
1332 | fdt_get_name(blob, node_offset, NULL)); | |
1333 | break; | |
1334 | } | |
1335 | ||
1336 | debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
1337 | pbus->name, pna, pns, fdt_get_name(blob, parent, NULL)); | |
1338 | ||
1339 | /* Apply bus translation */ | |
1340 | if (of_translate_one(blob, node_offset, bus, pbus, | |
1341 | addr, na, ns, pna, rprop)) | |
1342 | break; | |
1343 | ||
1344 | /* Complete the move up one level */ | |
1345 | na = pna; | |
1346 | ns = pns; | |
1347 | bus = pbus; | |
1348 | ||
1349 | of_dump_addr("OF: one level translation:", addr, na); | |
1350 | } | |
1351 | bail: | |
1352 | ||
1353 | return result; | |
1354 | } | |
1355 | ||
11e44fc6 SW |
1356 | u64 fdt_translate_address(const void *blob, int node_offset, |
1357 | const fdt32_t *in_addr) | |
a0342c08 KG |
1358 | { |
1359 | return __of_translate_address(blob, node_offset, in_addr, "ranges"); | |
1360 | } | |
75e73afd | 1361 | |
641067fb FD |
1362 | u64 fdt_translate_dma_address(const void *blob, int node_offset, |
1363 | const fdt32_t *in_addr) | |
1364 | { | |
1365 | return __of_translate_address(blob, node_offset, in_addr, "dma-ranges"); | |
1366 | } | |
1367 | ||
51bdb509 NSJ |
1368 | int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu, |
1369 | dma_addr_t *bus, u64 *size) | |
1370 | { | |
1371 | bool found_dma_ranges = false; | |
1372 | struct of_bus *bus_node; | |
1373 | const fdt32_t *ranges; | |
1374 | int na, ns, pna, pns; | |
1375 | int parent = node; | |
1376 | int ret = 0; | |
1377 | int len; | |
1378 | ||
1379 | /* Find the closest dma-ranges property */ | |
1380 | while (parent >= 0) { | |
1381 | ranges = fdt_getprop(blob, parent, "dma-ranges", &len); | |
1382 | ||
1383 | /* Ignore empty ranges, they imply no translation required */ | |
1384 | if (ranges && len > 0) | |
1385 | break; | |
1386 | ||
1387 | /* Once we find 'dma-ranges', then a missing one is an error */ | |
1388 | if (found_dma_ranges && !ranges) { | |
1389 | ret = -EINVAL; | |
1390 | goto out; | |
1391 | } | |
1392 | ||
1393 | if (ranges) | |
1394 | found_dma_ranges = true; | |
1395 | ||
1396 | parent = fdt_parent_offset(blob, parent); | |
1397 | } | |
1398 | ||
1399 | if (!ranges || parent < 0) { | |
1400 | debug("no dma-ranges found for node %s\n", | |
1401 | fdt_get_name(blob, node, NULL)); | |
1402 | ret = -ENOENT; | |
1403 | goto out; | |
1404 | } | |
1405 | ||
1406 | /* switch to that node */ | |
1407 | node = parent; | |
1408 | parent = fdt_parent_offset(blob, node); | |
1409 | if (parent < 0) { | |
1410 | printf("Found dma-ranges in root node, shoudln't happen\n"); | |
1411 | ret = -EINVAL; | |
1412 | goto out; | |
1413 | } | |
1414 | ||
1415 | /* Get the address sizes both for the bus and its parent */ | |
1416 | bus_node = of_match_bus(blob, node); | |
1417 | bus_node->count_cells(blob, node, &na, &ns); | |
1418 | if (!OF_CHECK_COUNTS(na, ns)) { | |
1419 | printf("%s: Bad cell count for %s\n", __FUNCTION__, | |
1420 | fdt_get_name(blob, node, NULL)); | |
1421 | return -EINVAL; | |
1422 | goto out; | |
1423 | } | |
1424 | ||
1425 | bus_node = of_match_bus(blob, parent); | |
1426 | bus_node->count_cells(blob, parent, &pna, &pns); | |
1427 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
1428 | printf("%s: Bad cell count for %s\n", __FUNCTION__, | |
1429 | fdt_get_name(blob, parent, NULL)); | |
1430 | return -EINVAL; | |
1431 | goto out; | |
1432 | } | |
1433 | ||
1434 | *bus = fdt_read_number(ranges, na); | |
1435 | *cpu = fdt_translate_dma_address(blob, node, ranges + na); | |
1436 | *size = fdt_read_number(ranges + na + pna, ns); | |
1437 | out: | |
1438 | return ret; | |
1439 | } | |
1440 | ||
75e73afd KG |
1441 | /** |
1442 | * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and | |
1443 | * who's reg property matches a physical cpu address | |
1444 | * | |
1445 | * @blob: ptr to device tree | |
1446 | * @compat: compatiable string to match | |
1447 | * @compat_off: property name | |
1448 | * | |
1449 | */ | |
1450 | int fdt_node_offset_by_compat_reg(void *blob, const char *compat, | |
1451 | phys_addr_t compat_off) | |
1452 | { | |
1453 | int len, off = fdt_node_offset_by_compatible(blob, -1, compat); | |
1454 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 1455 | const fdt32_t *reg = fdt_getprop(blob, off, "reg", &len); |
75e73afd KG |
1456 | if (reg) { |
1457 | if (compat_off == fdt_translate_address(blob, off, reg)) | |
1458 | return off; | |
1459 | } | |
1460 | off = fdt_node_offset_by_compatible(blob, off, compat); | |
1461 | } | |
1462 | ||
1463 | return -FDT_ERR_NOTFOUND; | |
1464 | } | |
1465 | ||
b4b847e9 KG |
1466 | /** |
1467 | * fdt_alloc_phandle: Return next free phandle value | |
1468 | * | |
1469 | * @blob: ptr to device tree | |
1470 | */ | |
1471 | int fdt_alloc_phandle(void *blob) | |
1472 | { | |
b4141195 MY |
1473 | int offset; |
1474 | uint32_t phandle = 0; | |
b4b847e9 KG |
1475 | |
1476 | for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; | |
1477 | offset = fdt_next_node(blob, offset, NULL)) { | |
50bf17bd | 1478 | phandle = max(phandle, fdt_get_phandle(blob, offset)); |
b4b847e9 | 1479 | } |
75e73afd | 1480 | |
b4b847e9 KG |
1481 | return phandle + 1; |
1482 | } | |
beca5a5f | 1483 | |
a8d2a75d | 1484 | /* |
f117c0f0 | 1485 | * fdt_set_phandle: Create a phandle property for the given node |
a8d2a75d GVB |
1486 | * |
1487 | * @fdt: ptr to device tree | |
1488 | * @nodeoffset: node to update | |
1489 | * @phandle: phandle value to set (must be unique) | |
f117c0f0 KG |
1490 | */ |
1491 | int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) | |
a8d2a75d GVB |
1492 | { |
1493 | int ret; | |
1494 | ||
1495 | #ifdef DEBUG | |
1496 | int off = fdt_node_offset_by_phandle(fdt, phandle); | |
1497 | ||
1498 | if ((off >= 0) && (off != nodeoffset)) { | |
1499 | char buf[64]; | |
1500 | ||
1501 | fdt_get_path(fdt, nodeoffset, buf, sizeof(buf)); | |
1502 | printf("Trying to update node %s with phandle %u ", | |
1503 | buf, phandle); | |
1504 | ||
1505 | fdt_get_path(fdt, off, buf, sizeof(buf)); | |
1506 | printf("that already exists in node %s.\n", buf); | |
1507 | return -FDT_ERR_BADPHANDLE; | |
1508 | } | |
1509 | #endif | |
1510 | ||
1511 | ret = fdt_setprop_cell(fdt, nodeoffset, "phandle", phandle); | |
1512 | if (ret < 0) | |
1513 | return ret; | |
1514 | ||
1515 | /* | |
1516 | * For now, also set the deprecated "linux,phandle" property, so that we | |
1517 | * don't break older kernels. | |
1518 | */ | |
1519 | ret = fdt_setprop_cell(fdt, nodeoffset, "linux,phandle", phandle); | |
1520 | ||
1521 | return ret; | |
1522 | } | |
1523 | ||
10aeabd1 KG |
1524 | /* |
1525 | * fdt_create_phandle: Create a phandle property for the given node | |
1526 | * | |
1527 | * @fdt: ptr to device tree | |
1528 | * @nodeoffset: node to update | |
1529 | */ | |
3c927ccc | 1530 | unsigned int fdt_create_phandle(void *fdt, int nodeoffset) |
10aeabd1 KG |
1531 | { |
1532 | /* see if there is a phandle already */ | |
1533 | int phandle = fdt_get_phandle(fdt, nodeoffset); | |
1534 | ||
1535 | /* if we got 0, means no phandle so create one */ | |
1536 | if (phandle == 0) { | |
3c927ccc TT |
1537 | int ret; |
1538 | ||
10aeabd1 | 1539 | phandle = fdt_alloc_phandle(fdt); |
3c927ccc TT |
1540 | ret = fdt_set_phandle(fdt, nodeoffset, phandle); |
1541 | if (ret < 0) { | |
1542 | printf("Can't set phandle %u: %s\n", phandle, | |
1543 | fdt_strerror(ret)); | |
1544 | return 0; | |
1545 | } | |
10aeabd1 KG |
1546 | } |
1547 | ||
1548 | return phandle; | |
1549 | } | |
1550 | ||
2a523f52 SL |
1551 | /* |
1552 | * fdt_set_node_status: Set status for the given node | |
1553 | * | |
1554 | * @fdt: ptr to device tree | |
1555 | * @nodeoffset: node to update | |
1556 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1557 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1558 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1559 | */ | |
1560 | int fdt_set_node_status(void *fdt, int nodeoffset, | |
1561 | enum fdt_status status, unsigned int error_code) | |
1562 | { | |
1563 | char buf[16]; | |
1564 | int ret = 0; | |
1565 | ||
1566 | if (nodeoffset < 0) | |
1567 | return nodeoffset; | |
1568 | ||
1569 | switch (status) { | |
1570 | case FDT_STATUS_OKAY: | |
1571 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "okay"); | |
1572 | break; | |
1573 | case FDT_STATUS_DISABLED: | |
1574 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "disabled"); | |
1575 | break; | |
1576 | case FDT_STATUS_FAIL: | |
1577 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail"); | |
1578 | break; | |
1579 | case FDT_STATUS_FAIL_ERROR_CODE: | |
1580 | sprintf(buf, "fail-%d", error_code); | |
1581 | ret = fdt_setprop_string(fdt, nodeoffset, "status", buf); | |
1582 | break; | |
1583 | default: | |
1584 | printf("Invalid fdt status: %x\n", status); | |
1585 | ret = -1; | |
1586 | break; | |
1587 | } | |
1588 | ||
1589 | return ret; | |
1590 | } | |
1591 | ||
1592 | /* | |
1593 | * fdt_set_status_by_alias: Set status for the given node given an alias | |
1594 | * | |
1595 | * @fdt: ptr to device tree | |
1596 | * @alias: alias of node to update | |
1597 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1598 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1599 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1600 | */ | |
1601 | int fdt_set_status_by_alias(void *fdt, const char* alias, | |
1602 | enum fdt_status status, unsigned int error_code) | |
1603 | { | |
1604 | int offset = fdt_path_offset(fdt, alias); | |
1605 | ||
1606 | return fdt_set_node_status(fdt, offset, status, error_code); | |
1607 | } | |
1608 | ||
096eb3f5 | 1609 | #if defined(CONFIG_VIDEO) || defined(CONFIG_LCD) |
beca5a5f AG |
1610 | int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) |
1611 | { | |
1612 | int noff; | |
1613 | int ret; | |
1614 | ||
1615 | noff = fdt_node_offset_by_compatible(blob, -1, compat); | |
1616 | if (noff != -FDT_ERR_NOTFOUND) { | |
1617 | debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); | |
1618 | add_edid: | |
1619 | ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); | |
1620 | if (ret == -FDT_ERR_NOSPACE) { | |
1621 | ret = fdt_increase_size(blob, 512); | |
1622 | if (!ret) | |
1623 | goto add_edid; | |
1624 | else | |
1625 | goto err_size; | |
1626 | } else if (ret < 0) { | |
1627 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
1628 | return ret; | |
1629 | } | |
1630 | } | |
1631 | return 0; | |
1632 | err_size: | |
1633 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
1634 | return ret; | |
1635 | } | |
1636 | #endif | |
bb682001 TT |
1637 | |
1638 | /* | |
1639 | * Verify the physical address of device tree node for a given alias | |
1640 | * | |
1641 | * This function locates the device tree node of a given alias, and then | |
1642 | * verifies that the physical address of that device matches the given | |
1643 | * parameter. It displays a message if there is a mismatch. | |
1644 | * | |
1645 | * Returns 1 on success, 0 on failure | |
1646 | */ | |
1647 | int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr) | |
1648 | { | |
1649 | const char *path; | |
8aa5ec6e | 1650 | const fdt32_t *reg; |
bb682001 TT |
1651 | int node, len; |
1652 | u64 dt_addr; | |
1653 | ||
1654 | path = fdt_getprop(fdt, anode, alias, NULL); | |
1655 | if (!path) { | |
1656 | /* If there's no such alias, then it's not a failure */ | |
1657 | return 1; | |
1658 | } | |
1659 | ||
1660 | node = fdt_path_offset(fdt, path); | |
1661 | if (node < 0) { | |
1662 | printf("Warning: device tree alias '%s' points to invalid " | |
1663 | "node %s.\n", alias, path); | |
1664 | return 0; | |
1665 | } | |
1666 | ||
1667 | reg = fdt_getprop(fdt, node, "reg", &len); | |
1668 | if (!reg) { | |
1669 | printf("Warning: device tree node '%s' has no address.\n", | |
1670 | path); | |
1671 | return 0; | |
1672 | } | |
1673 | ||
1674 | dt_addr = fdt_translate_address(fdt, node, reg); | |
1675 | if (addr != dt_addr) { | |
dee37fc9 MY |
1676 | printf("Warning: U-Boot configured device %s at address %llu,\n" |
1677 | "but the device tree has it address %llx.\n", | |
1678 | alias, addr, dt_addr); | |
bb682001 TT |
1679 | return 0; |
1680 | } | |
1681 | ||
1682 | return 1; | |
1683 | } | |
1684 | ||
1685 | /* | |
1686 | * Returns the base address of an SOC or PCI node | |
1687 | */ | |
ec002119 | 1688 | u64 fdt_get_base_address(const void *fdt, int node) |
bb682001 TT |
1689 | { |
1690 | int size; | |
8aa5ec6e | 1691 | const fdt32_t *prop; |
bb682001 | 1692 | |
336a4487 | 1693 | prop = fdt_getprop(fdt, node, "reg", &size); |
bb682001 | 1694 | |
e3665ba9 | 1695 | return prop ? fdt_translate_address(fdt, node, prop) : OF_BAD_ADDR; |
bb682001 | 1696 | } |
c48e6868 AG |
1697 | |
1698 | /* | |
a932aa3c BM |
1699 | * Read a property of size <prop_len>. Currently only supports 1 or 2 cells, |
1700 | * or 3 cells specially for a PCI address. | |
c48e6868 AG |
1701 | */ |
1702 | static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off, | |
1703 | uint64_t *val, int cells) | |
1704 | { | |
a932aa3c BM |
1705 | const fdt32_t *prop32; |
1706 | const unaligned_fdt64_t *prop64; | |
c48e6868 AG |
1707 | |
1708 | if ((cell_off + cells) > prop_len) | |
1709 | return -FDT_ERR_NOSPACE; | |
1710 | ||
a932aa3c BM |
1711 | prop32 = &prop[cell_off]; |
1712 | ||
1713 | /* | |
1714 | * Special handling for PCI address in PCI bus <ranges> | |
1715 | * | |
1716 | * PCI child address is made up of 3 cells. Advance the cell offset | |
1717 | * by 1 so that the PCI child address can be correctly read. | |
1718 | */ | |
1719 | if (cells == 3) | |
1720 | cell_off += 1; | |
1721 | prop64 = (const fdt64_t *)&prop[cell_off]; | |
1722 | ||
c48e6868 AG |
1723 | switch (cells) { |
1724 | case 1: | |
1725 | *val = fdt32_to_cpu(*prop32); | |
1726 | break; | |
1727 | case 2: | |
a932aa3c | 1728 | case 3: |
c48e6868 AG |
1729 | *val = fdt64_to_cpu(*prop64); |
1730 | break; | |
1731 | default: | |
1732 | return -FDT_ERR_NOSPACE; | |
1733 | } | |
1734 | ||
1735 | return 0; | |
1736 | } | |
1737 | ||
1738 | /** | |
1739 | * fdt_read_range - Read a node's n'th range property | |
1740 | * | |
1741 | * @fdt: ptr to device tree | |
1742 | * @node: offset of node | |
1743 | * @n: range index | |
1744 | * @child_addr: pointer to storage for the "child address" field | |
1745 | * @addr: pointer to storage for the CPU view translated physical start | |
1746 | * @len: pointer to storage for the range length | |
1747 | * | |
1748 | * Convenience function that reads and interprets a specific range out of | |
1749 | * a number of the "ranges" property array. | |
1750 | */ | |
1751 | int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr, | |
1752 | uint64_t *addr, uint64_t *len) | |
1753 | { | |
1754 | int pnode = fdt_parent_offset(fdt, node); | |
1755 | const fdt32_t *ranges; | |
1756 | int pacells; | |
1757 | int acells; | |
1758 | int scells; | |
1759 | int ranges_len; | |
1760 | int cell = 0; | |
1761 | int r = 0; | |
1762 | ||
1763 | /* | |
1764 | * The "ranges" property is an array of | |
1765 | * { <child address> <parent address> <size in child address space> } | |
1766 | * | |
1767 | * All 3 elements can span a diffent number of cells. Fetch their size. | |
1768 | */ | |
1769 | pacells = fdt_getprop_u32_default_node(fdt, pnode, 0, "#address-cells", 1); | |
1770 | acells = fdt_getprop_u32_default_node(fdt, node, 0, "#address-cells", 1); | |
1771 | scells = fdt_getprop_u32_default_node(fdt, node, 0, "#size-cells", 1); | |
1772 | ||
1773 | /* Now try to get the ranges property */ | |
1774 | ranges = fdt_getprop(fdt, node, "ranges", &ranges_len); | |
1775 | if (!ranges) | |
1776 | return -FDT_ERR_NOTFOUND; | |
1777 | ranges_len /= sizeof(uint32_t); | |
1778 | ||
1779 | /* Jump to the n'th entry */ | |
1780 | cell = n * (pacells + acells + scells); | |
1781 | ||
1782 | /* Read <child address> */ | |
1783 | if (child_addr) { | |
1784 | r = fdt_read_prop(ranges, ranges_len, cell, child_addr, | |
1785 | acells); | |
1786 | if (r) | |
1787 | return r; | |
1788 | } | |
1789 | cell += acells; | |
1790 | ||
1791 | /* Read <parent address> */ | |
1792 | if (addr) | |
1793 | *addr = fdt_translate_address(fdt, node, ranges + cell); | |
1794 | cell += pacells; | |
1795 | ||
1796 | /* Read <size in child address space> */ | |
1797 | if (len) { | |
1798 | r = fdt_read_prop(ranges, ranges_len, cell, len, scells); | |
1799 | if (r) | |
1800 | return r; | |
1801 | } | |
1802 | ||
1803 | return 0; | |
1804 | } | |
d4f495a8 HG |
1805 | |
1806 | /** | |
1807 | * fdt_setup_simplefb_node - Fill and enable a simplefb node | |
1808 | * | |
1809 | * @fdt: ptr to device tree | |
1810 | * @node: offset of the simplefb node | |
1811 | * @base_address: framebuffer base address | |
1812 | * @width: width in pixels | |
1813 | * @height: height in pixels | |
1814 | * @stride: bytes per line | |
1815 | * @format: pixel format string | |
1816 | * | |
1817 | * Convenience function to fill and enable a simplefb node. | |
1818 | */ | |
1819 | int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, | |
1820 | u32 height, u32 stride, const char *format) | |
1821 | { | |
1822 | char name[32]; | |
1823 | fdt32_t cells[4]; | |
1824 | int i, addrc, sizec, ret; | |
1825 | ||
eed36609 SG |
1826 | fdt_support_default_count_cells(fdt, fdt_parent_offset(fdt, node), |
1827 | &addrc, &sizec); | |
d4f495a8 HG |
1828 | i = 0; |
1829 | if (addrc == 2) | |
1830 | cells[i++] = cpu_to_fdt32(base_address >> 32); | |
1831 | cells[i++] = cpu_to_fdt32(base_address); | |
1832 | if (sizec == 2) | |
1833 | cells[i++] = 0; | |
1834 | cells[i++] = cpu_to_fdt32(height * stride); | |
1835 | ||
1836 | ret = fdt_setprop(fdt, node, "reg", cells, sizeof(cells[0]) * i); | |
1837 | if (ret < 0) | |
1838 | return ret; | |
1839 | ||
dee37fc9 | 1840 | snprintf(name, sizeof(name), "framebuffer@%llx", base_address); |
d4f495a8 HG |
1841 | ret = fdt_set_name(fdt, node, name); |
1842 | if (ret < 0) | |
1843 | return ret; | |
1844 | ||
1845 | ret = fdt_setprop_u32(fdt, node, "width", width); | |
1846 | if (ret < 0) | |
1847 | return ret; | |
1848 | ||
1849 | ret = fdt_setprop_u32(fdt, node, "height", height); | |
1850 | if (ret < 0) | |
1851 | return ret; | |
1852 | ||
1853 | ret = fdt_setprop_u32(fdt, node, "stride", stride); | |
1854 | if (ret < 0) | |
1855 | return ret; | |
1856 | ||
1857 | ret = fdt_setprop_string(fdt, node, "format", format); | |
1858 | if (ret < 0) | |
1859 | return ret; | |
1860 | ||
1861 | ret = fdt_setprop_string(fdt, node, "status", "okay"); | |
1862 | if (ret < 0) | |
1863 | return ret; | |
1864 | ||
1865 | return 0; | |
1866 | } | |
08daa258 TH |
1867 | |
1868 | /* | |
1869 | * Update native-mode in display-timings from display environment variable. | |
1870 | * The node to update are specified by path. | |
1871 | */ | |
1872 | int fdt_fixup_display(void *blob, const char *path, const char *display) | |
1873 | { | |
1874 | int off, toff; | |
1875 | ||
1876 | if (!display || !path) | |
1877 | return -FDT_ERR_NOTFOUND; | |
1878 | ||
1879 | toff = fdt_path_offset(blob, path); | |
1880 | if (toff >= 0) | |
1881 | toff = fdt_subnode_offset(blob, toff, "display-timings"); | |
1882 | if (toff < 0) | |
1883 | return toff; | |
1884 | ||
1885 | for (off = fdt_first_subnode(blob, toff); | |
1886 | off >= 0; | |
1887 | off = fdt_next_subnode(blob, off)) { | |
1888 | uint32_t h = fdt_get_phandle(blob, off); | |
1889 | debug("%s:0x%x\n", fdt_get_name(blob, off, NULL), | |
1890 | fdt32_to_cpu(h)); | |
1891 | if (strcasecmp(fdt_get_name(blob, off, NULL), display) == 0) | |
1892 | return fdt_setprop_u32(blob, toff, "native-mode", h); | |
1893 | } | |
1894 | return toff; | |
1895 | } | |
fc7c3189 PA |
1896 | |
1897 | #ifdef CONFIG_OF_LIBFDT_OVERLAY | |
1898 | /** | |
1899 | * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting | |
1900 | * | |
1901 | * @fdt: ptr to device tree | |
1902 | * @fdto: ptr to device tree overlay | |
1903 | * | |
1904 | * Convenience function to apply an overlay and display helpful messages | |
1905 | * in the case of an error | |
1906 | */ | |
1907 | int fdt_overlay_apply_verbose(void *fdt, void *fdto) | |
1908 | { | |
1909 | int err; | |
1910 | bool has_symbols; | |
1911 | ||
1912 | err = fdt_path_offset(fdt, "/__symbols__"); | |
1913 | has_symbols = err >= 0; | |
1914 | ||
1915 | err = fdt_overlay_apply(fdt, fdto); | |
1916 | if (err < 0) { | |
1917 | printf("failed on fdt_overlay_apply(): %s\n", | |
1918 | fdt_strerror(err)); | |
1919 | if (!has_symbols) { | |
1920 | printf("base fdt does did not have a /__symbols__ node\n"); | |
1921 | printf("make sure you've compiled with -@\n"); | |
1922 | } | |
1923 | } | |
1924 | return err; | |
1925 | } | |
1926 | #endif | |
bbdbcaf5 KM |
1927 | |
1928 | /** | |
1929 | * fdt_valid() - Check if an FDT is valid. If not, change it to NULL | |
1930 | * | |
1931 | * @blobp: Pointer to FDT pointer | |
1932 | * @return 1 if OK, 0 if bad (in which case *blobp is set to NULL) | |
1933 | */ | |
1934 | int fdt_valid(struct fdt_header **blobp) | |
1935 | { | |
1936 | const void *blob = *blobp; | |
1937 | int err; | |
1938 | ||
1939 | if (!blob) { | |
1940 | printf("The address of the fdt is invalid (NULL).\n"); | |
1941 | return 0; | |
1942 | } | |
1943 | ||
1944 | err = fdt_check_header(blob); | |
1945 | if (err == 0) | |
1946 | return 1; /* valid */ | |
1947 | ||
1948 | if (err < 0) { | |
1949 | printf("libfdt fdt_check_header(): %s", fdt_strerror(err)); | |
1950 | /* | |
1951 | * Be more informative on bad version. | |
1952 | */ | |
1953 | if (err == -FDT_ERR_BADVERSION) { | |
1954 | if (fdt_version(blob) < | |
1955 | FDT_FIRST_SUPPORTED_VERSION) { | |
1956 | printf(" - too old, fdt %d < %d", | |
1957 | fdt_version(blob), | |
1958 | FDT_FIRST_SUPPORTED_VERSION); | |
1959 | } | |
1960 | if (fdt_last_comp_version(blob) > | |
1961 | FDT_LAST_SUPPORTED_VERSION) { | |
1962 | printf(" - too new, fdt %d > %d", | |
1963 | fdt_version(blob), | |
1964 | FDT_LAST_SUPPORTED_VERSION); | |
1965 | } | |
1966 | } | |
1967 | printf("\n"); | |
1968 | *blobp = NULL; | |
1969 | return 0; | |
1970 | } | |
1971 | return 1; | |
1972 | } |