[J-u-boot.git] / board / ti / am64x / evm.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Board specific initialization for AM642 EVM
 *
 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
 *	Keerthy <[email protected]>
 *
 */

#include <common.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <k3-ddrss.h>
#include <spl.h>
#include <fdt_support.h>
#include <asm/arch/hardware.h>
#include <env.h>

#include "../common/board_detect.h"

#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") || \
				board_ti_k3_is("AM64-HSEVM"))

#define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") || \
				board_ti_k3_is("AM64B-SKEVM"))

DECLARE_GLOBAL_DATA_PTR;

int board_init(void)
{
	return 0;
}

int dram_init(void)
{
	s32 ret;

	ret = fdtdec_setup_mem_size_base();
	if (ret)
		printf("Error setting up mem size and base. %d\n", ret);

	return ret;
}

int dram_init_banksize(void)
{
	s32 ret;

	ret = fdtdec_setup_memory_banksize();
	if (ret)
		printf("Error setting up memory banksize. %d\n", ret);

	return ret;
}

#if defined(CONFIG_SPL_LOAD_FIT)
int board_fit_config_name_match(const char *name)
{
	bool eeprom_read = board_ti_was_eeprom_read();

	if (!eeprom_read || board_is_am64x_gpevm()) {
		if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
			return 0;
	} else if (board_is_am64x_skevm()) {
		if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
			return 0;
	}

	return -1;
}
#endif

#if defined(CONFIG_SPL_BUILD)
#if CONFIG_IS_ENABLED(USB_STORAGE)
static int fixup_usb_boot(const void *fdt_blob)
{
	int ret = 0;

	switch (spl_boot_device()) {
	case BOOT_DEVICE_USB:
		/*
		 * If the boot mode is host, fixup the dr_mode to host
		 * before cdns3 bind takes place
		 */
		ret = fdt_find_and_setprop((void *)fdt_blob,
					   "/bus@f4000/cdns-usb@f900000/usb@f400000",
					   "dr_mode", "host", 5, 0);
		if (ret)
			printf("%s: fdt_find_and_setprop() failed:%d\n",
			       __func__, ret);
		fallthrough;
	default:
		break;
	}

	return ret;
}
#endif

#if defined(CONFIG_K3_AM64_DDRSS)
static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
{
	struct udevice *dev;
	int ret;

	dram_init_banksize();

	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
	if (ret)
		panic("Cannot get RAM device for ddr size fixup: %d\n", ret);

	ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
	if (ret)
		printf("Error fixing up ddr node for ECC use! %d\n", ret);
}
#else
static void fixup_memory_node(struct spl_image_info *spl_image)
{
	u64 start[CONFIG_NR_DRAM_BANKS];
	u64 size[CONFIG_NR_DRAM_BANKS];
	int bank;
	int ret;

	dram_init();
	dram_init_banksize();

	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
		start[bank] =  gd->bd->bi_dram[bank].start;
		size[bank] = gd->bd->bi_dram[bank].size;
	}

	/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
	ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
	if (ret)
		printf("Error fixing up memory node! %d\n", ret);
}
#endif

void spl_perform_fixups(struct spl_image_info *spl_image)
{
#if defined(CONFIG_K3_AM64_DDRSS)
	fixup_ddr_driver_for_ecc(spl_image);
#else
	fixup_memory_node(spl_image);
#endif

#if CONFIG_IS_ENABLED(USB_STORAGE)
	fixup_usb_boot(spl_image->fdt_addr);
#endif
}
#endif

#ifdef CONFIG_TI_I2C_BOARD_DETECT
int do_board_detect(void)
{
	int ret;

	ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
					 CONFIG_EEPROM_CHIP_ADDRESS);
	if (ret) {
		printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
			CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
		ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
						 CONFIG_EEPROM_CHIP_ADDRESS + 1);
		if (ret)
			pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
			       CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
	}

	return ret;
}

int checkboard(void)
{
	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;

	if (!do_board_detect())
		printf("Board: %s rev %s\n", ep->name, ep->version);

	return 0;
}

#ifdef CONFIG_BOARD_LATE_INIT
static void setup_board_eeprom_env(void)
{
	char *name = "am64x_gpevm";

	if (do_board_detect())
		goto invalid_eeprom;

	if (board_is_am64x_gpevm())
		name = "am64x_gpevm";
	else if (board_is_am64x_skevm())
		name = "am64x_skevm";
	else
		printf("Unidentified board claims %s in eeprom header\n",
		       board_ti_get_name());

invalid_eeprom:
	set_board_info_env_am6(name);
}

static void setup_serial(void)
{
	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
	unsigned long board_serial;
	char *endp;
	char serial_string[17] = { 0 };

	if (env_get("serial#"))
		return;

	board_serial = hextoul(ep->serial, &endp);
	if (*endp != '\0') {
		pr_err("Error: Can't set serial# to %s\n", ep->serial);
		return;
	}

	snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
	env_set("serial#", serial_string);
}
#endif
#endif

#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
		struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;

		setup_board_eeprom_env();
		setup_serial();
		/*
		 * The first MAC address for ethernet a.k.a. ethernet0 comes from
		 * efuse populated via the am654 gigabit eth switch subsystem driver.
		 * All the other ones are populated via EEPROM, hence continue with
		 * an index of 1.
		 */
		board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
	}

	return 0;
}
#endif

#define CTRLMMR_USB0_PHY_CTRL	0x43004008
#define CORE_VOLTAGE		0x80000000

#ifdef CONFIG_SPL_BOARD_INIT
void spl_board_init(void)
{
	u32 val;
	/* Set USB PHY core voltage to 0.85V */
	val = readl(CTRLMMR_USB0_PHY_CTRL);
	val &= ~(CORE_VOLTAGE);
	writel(val, CTRLMMR_USB0_PHY_CTRL);

	/* Init DRAM size for R5/A53 SPL */
	dram_init_banksize();
}
#endif
Commit	Line	Data
33b72589 DG	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Board specific initialization for AM642 EVM
	4	*
7ffcff27	5	* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
33b72589 DG	6	* Keerthy <[email protected]>
	7	*
	8	*/
	9
	10	#include <common.h>
	11	#include <asm/io.h>
7ffcff27 DG	12	#include <dm/uclass.h>
7ffcff27 DG	13	#include <k3-ddrss.h>
33b72589	14	#include <spl.h>
3d16b335	15	#include <fdt_support.h>
2ee76314	16	#include <asm/arch/hardware.h>
2ee76314 LV	17	#include <env.h>
	18
	19	#include "../common/board_detect.h"
	20
d3c83022 RQ	21	#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") \|\| \
d3c83022 RQ	22	board_ti_k3_is("AM64-HSEVM"))
8774e45e JM	23
	24	#define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") \|\| \
	25	board_ti_k3_is("AM64B-SKEVM"))
33b72589 DG	26
	27	DECLARE_GLOBAL_DATA_PTR;
	28
	29	int board_init(void)
	30	{
	31	return 0;
	32	}
	33
	34	int dram_init(void)
	35	{
dffdb1f8	36	s32 ret;
33b72589	37
dffdb1f8 DG	38	ret = fdtdec_setup_mem_size_base();
	39	if (ret)
	40	printf("Error setting up mem size and base. %d\n", ret);
	41
	42	return ret;
33b72589 DG	43	}
	44
	45	int dram_init_banksize(void)
	46	{
dffdb1f8	47	s32 ret;
33b72589	48
dffdb1f8 DG	49	ret = fdtdec_setup_memory_banksize();
	50	if (ret)
	51	printf("Error setting up memory banksize. %d\n", ret);
	52
	53	return ret;
33b72589 DG	54	}
	55
	56	#if defined(CONFIG_SPL_LOAD_FIT)
	57	int board_fit_config_name_match(const char *name)
	58	{
63d825e9 LV	59	bool eeprom_read = board_ti_was_eeprom_read();
	60
	61	if (!eeprom_read \|\| board_is_am64x_gpevm()) {
	62	if (!strcmp(name, "k3-am642-r5-evm") \|\| !strcmp(name, "k3-am642-evm"))
	63	return 0;
	64	} else if (board_is_am64x_skevm()) {
	65	if (!strcmp(name, "k3-am642-r5-sk") \|\| !strcmp(name, "k3-am642-sk"))
	66	return 0;
	67	}
33b72589 DG	68
	69	return -1;
	70	}
	71	#endif
2ee76314	72
7ffcff27 DG	73	#if defined(CONFIG_SPL_BUILD)
7ffcff27 DG	74	#if CONFIG_IS_ENABLED(USB_STORAGE)
3d16b335 AG	75	static int fixup_usb_boot(const void *fdt_blob)
	76	{
	77	int ret = 0;
	78
	79	switch (spl_boot_device()) {
	80	case BOOT_DEVICE_USB:
	81	/*
	82	* If the boot mode is host, fixup the dr_mode to host
	83	* before cdns3 bind takes place
	84	*/
	85	ret = fdt_find_and_setprop((void *)fdt_blob,
	86	"/bus@f4000/cdns-usb@f900000/usb@f400000",
	87	"dr_mode", "host", 5, 0);
	88	if (ret)
	89	printf("%s: fdt_find_and_setprop() failed:%d\n",
	90	__func__, ret);
	91	fallthrough;
	92	default:
	93	break;
	94	}
	95
	96	return ret;
	97	}
7ffcff27 DG	98	#endif
	99
	100	#if defined(CONFIG_K3_AM64_DDRSS)
	101	static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
	102	{
	103	struct udevice *dev;
	104	int ret;
	105
	106	dram_init_banksize();
	107
	108	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
	109	if (ret)
	110	panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
	111
	112	ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
	113	if (ret)
	114	printf("Error fixing up ddr node for ECC use! %d\n", ret);
	115	}
	116	#else
	117	static void fixup_memory_node(struct spl_image_info *spl_image)
	118	{
	119	u64 start[CONFIG_NR_DRAM_BANKS];
	120	u64 size[CONFIG_NR_DRAM_BANKS];
	121	int bank;
	122	int ret;
	123
	124	dram_init();
	125	dram_init_banksize();
	126
	127	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
	128	start[bank] = gd->bd->bi_dram[bank].start;
	129	size[bank] = gd->bd->bi_dram[bank].size;
	130	}
	131
	132	/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
	133	ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
	134	if (ret)
	135	printf("Error fixing up memory node! %d\n", ret);
	136	}
	137	#endif
3d16b335 AG	138
	139	void spl_perform_fixups(struct spl_image_info *spl_image)
	140	{
7ffcff27 DG	141	#if defined(CONFIG_K3_AM64_DDRSS)
	142	fixup_ddr_driver_for_ecc(spl_image);
	143	#else
	144	fixup_memory_node(spl_image);
	145	#endif
	146
	147	#if CONFIG_IS_ENABLED(USB_STORAGE)
3d16b335	148	fixup_usb_boot(spl_image->fdt_addr);
7ffcff27	149	#endif
3d16b335 AG	150	}
	151	#endif
	152
2ee76314 LV	153	#ifdef CONFIG_TI_I2C_BOARD_DETECT
	154	int do_board_detect(void)
	155	{
	156	int ret;
	157
	158	ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
	159	CONFIG_EEPROM_CHIP_ADDRESS);
	160	if (ret) {
	161	printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
	162	CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
	163	ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
	164	CONFIG_EEPROM_CHIP_ADDRESS + 1);
	165	if (ret)
	166	pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
	167	CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
	168	}
	169
	170	return ret;
	171	}
	172
	173	int checkboard(void)
	174	{
	175	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
	176
	177	if (!do_board_detect())
	178	printf("Board: %s rev %s\n", ep->name, ep->version);
	179
	180	return 0;
	181	}
	182
	183	#ifdef CONFIG_BOARD_LATE_INIT
	184	static void setup_board_eeprom_env(void)
	185	{
	186	char *name = "am64x_gpevm";
	187
	188	if (do_board_detect())
	189	goto invalid_eeprom;
	190
	191	if (board_is_am64x_gpevm())
	192	name = "am64x_gpevm";
	193	else if (board_is_am64x_skevm())
	194	name = "am64x_skevm";
	195	else
	196	printf("Unidentified board claims %s in eeprom header\n",
	197	board_ti_get_name());
	198
	199	invalid_eeprom:
	200	set_board_info_env_am6(name);
	201	}
	202
	203	static void setup_serial(void)
	204	{
	205	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
	206	unsigned long board_serial;
	207	char *endp;
	208	char serial_string[17] = { 0 };
	209
	210	if (env_get("serial#"))
	211	return;
	212
7e5f460e	213	board_serial = hextoul(ep->serial, &endp);
2ee76314 LV	214	if (*endp != '\0') {
	215	pr_err("Error: Can't set serial# to %s\n", ep->serial);
	216	return;
	217	}
	218
	219	snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
	220	env_set("serial#", serial_string);
	221	}
	222	#endif
	223	#endif
	224
	225	#ifdef CONFIG_BOARD_LATE_INIT
	226	int board_late_init(void)
	227	{
	228	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
ec658e7e VR	229	struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
ec658e7e VR	230
2ee76314 LV	231	setup_board_eeprom_env();
2ee76314 LV	232	setup_serial();
ec658e7e VR	233	/*
	234	* The first MAC address for ethernet a.k.a. ethernet0 comes from
	235	* efuse populated via the am654 gigabit eth switch subsystem driver.
	236	* All the other ones are populated via EEPROM, hence continue with
	237	* an index of 1.
	238	*/
	239	board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
2ee76314 LV	240	}
	241
	242	return 0;
	243	}
	244	#endif
397d7b0f AG	245
	246	#define CTRLMMR_USB0_PHY_CTRL 0x43004008
	247	#define CORE_VOLTAGE 0x80000000
	248
	249	#ifdef CONFIG_SPL_BOARD_INIT
	250	void spl_board_init(void)
	251	{
	252	u32 val;
	253	/* Set USB PHY core voltage to 0.85V */
	254	val = readl(CTRLMMR_USB0_PHY_CTRL);
	255	val &= ~(CORE_VOLTAGE);
	256	writel(val, CTRLMMR_USB0_PHY_CTRL);
70bcd249 VR	257
	258	/* Init DRAM size for R5/A53 SPL */
	259	dram_init_banksize();
397d7b0f AG	260	}
397d7b0f AG	261	#endif