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730d2544 CF |
1 | /* |
2 | * Copyright (C) 2016 samtec automotive software & electronics gmbh | |
3 | * | |
4 | * Configuration settings for the Samtec VIN|ING 2000 board. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include "mx6_common.h" | |
13 | ||
14 | #ifdef CONFIG_SPL | |
15 | #include "imx6_spl.h" | |
16 | #endif | |
17 | ||
18 | /* Size of malloc() pool */ | |
19 | #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) | |
20 | ||
730d2544 CF |
21 | #define CONFIG_MXC_UART |
22 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
23 | ||
24 | #define BOOT_TARGET_DEVICES(func) \ | |
25 | func(MMC, mmc, 0) \ | |
26 | func(MMC, mmc, 1) \ | |
27 | func(USB, usb, 0) \ | |
28 | func(PXE, pxe, na) \ | |
29 | func(DHCP, dhcp, na) | |
30 | #include <config_distro_bootcmd.h> | |
31 | ||
32 | /* Miscellaneous configurable options */ | |
33 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
34 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) | |
35 | ||
730d2544 CF |
36 | /* Physical Memory Map */ |
37 | #define CONFIG_NR_DRAM_BANKS 1 | |
38 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
39 | ||
40 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
41 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
42 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
43 | ||
44 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
45 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
46 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
47 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
48 | ||
49 | /* MMC Configuration */ | |
50 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR | |
51 | ||
52 | /* I2C Configs */ | |
53 | #define CONFIG_SYS_I2C | |
54 | #define CONFIG_SYS_I2C_MXC | |
55 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ | |
56 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ | |
57 | #define CONFIG_SYS_I2C_SPEED 100000 | |
58 | ||
59 | /* PMIC */ | |
60 | #define CONFIG_POWER | |
61 | #define CONFIG_POWER_I2C | |
62 | #define CONFIG_POWER_PFUZE100 | |
63 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
64 | ||
65 | /* Network */ | |
66 | #define CONFIG_FEC_MXC | |
67 | #define CONFIG_MII | |
68 | ||
69 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
70 | #define CONFIG_FEC_MXC_PHYADDR 0x0 | |
71 | ||
72 | #define CONFIG_FEC_XCV_TYPE RMII | |
73 | #define CONFIG_ETHPRIME "FEC" | |
74 | ||
730d2544 CF |
75 | #define CONFIG_PHY_ATHEROS |
76 | ||
77 | #ifdef CONFIG_CMD_USB | |
730d2544 | 78 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
730d2544 CF |
79 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
80 | #define CONFIG_MXC_USB_FLAGS 0 | |
81 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
82 | #endif | |
83 | ||
730d2544 CF |
84 | #ifdef CONFIG_CMD_PCI |
85 | #define CONFIG_PCI_SCAN_SHOW | |
86 | #define CONFIG_PCIE_IMX | |
87 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) | |
88 | #endif | |
89 | ||
90 | #define CONFIG_IMX_THERMAL | |
91 | ||
92 | #define CONFIG_PWM_IMX | |
93 | #define CONFIG_IMX6_PWM_PER_CLK 66000000 | |
730d2544 | 94 | |
730d2544 CF |
95 | #define CONFIG_ENV_OFFSET (8 * SZ_64K) |
96 | #define CONFIG_ENV_SIZE SZ_8K | |
97 | #define CONFIG_ENV_OFFSET_REDUND (9 * SZ_64K) | |
98 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
730d2544 CF |
99 | |
100 | #ifdef CONFIG_ENV_IS_IN_MMC | |
101 | #define CONFIG_SUPPORT_EMMC_BOOT | |
730d2544 CF |
102 | #define CONFIG_SUPPORT_EMMC_RPMB |
103 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */ | |
104 | /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ | |
105 | #define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */ | |
106 | #endif | |
107 | ||
108 | #endif /* __CONFIG_H */ |