[J-u-boot.git] / doc / README.fec_mxc

U-Boot config options used in fec_mxc.c

CONFIG_FEC_MXC
	Selects fec_mxc.c to be compiled into u-boot. Can read out the
	ethaddr from the SoC eFuses (see below).

CONFIG_MII
	Must be defined if CONFIG_FEC_MXC is defined.

CFG_FEC_MXC_SWAP_PACKET
	Forced on iff MX28.
	Swaps the bytes order of all words(4 byte units) in the packet.
	This should not be specified by a board file. It is cpu specific.

CONFIG_PHYLIB
	fec_mxc supports PHYLIB and should be used for new boards.

CONFIG_FEC_MXC_NO_ANEG
	Relevant only if PHYLIB not used. Skips auto-negotiation restart.

CFG_FEC_MXC_PHYADDR
	Optional, selects the exact phy address that should be connected
	and function fecmxc_initialize will try to initialize it.

Reading the ethaddr from the SoC eFuses:
if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
ethaddr variable, then its value gets read from the corresponding eFuses in
the SoC. See the README files of the specific SoC for details.
Commit	Line	Data
a187559e	1	U-Boot config options used in fec_mxc.c
c30eab2d TK	2
c30eab2d TK	3	CONFIG_FEC_MXC
95c69223 OM	4	Selects fec_mxc.c to be compiled into u-boot. Can read out the
95c69223 OM	5	ethaddr from the SoC eFuses (see below).
c30eab2d TK	6
	7	CONFIG_MII
	8	Must be defined if CONFIG_FEC_MXC is defined.
	9
6e7df1d1	10	CFG_FEC_MXC_SWAP_PACKET
c30eab2d TK	11	Forced on iff MX28.
	12	Swaps the bytes order of all words(4 byte units) in the packet.
	13	This should not be specified by a board file. It is cpu specific.
	14
	15	CONFIG_PHYLIB
	16	fec_mxc supports PHYLIB and should be used for new boards.
	17
	18	CONFIG_FEC_MXC_NO_ANEG
	19	Relevant only if PHYLIB not used. Skips auto-negotiation restart.
	20
fa760c32	21	CFG_FEC_MXC_PHYADDR
c30eab2d TK	22	Optional, selects the exact phy address that should be connected
c30eab2d TK	23	and function fecmxc_initialize will try to initialize it.
95c69223	24
95c69223 OM	25	Reading the ethaddr from the SoC eFuses:
	26	if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
	27	ethaddr variable, then its value gets read from the corresponding eFuses in
	28	the SoC. See the README files of the specific SoC for details.