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945af8d7 WD |
1 | /* |
2 | * (C) Copyright 2000 - 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | * Hacked for MPC8260 by [email protected], 19-Oct-00, with | |
24 | * changes based on the file arch/ppc/mbxboot/m8260_tty.c from the | |
25 | * Linux/PPC sources (m8260_tty.c had no copyright info in it). | |
26 | */ | |
27 | ||
28 | /* | |
29 | * Minimal serial functions needed to use one of the PSC ports | |
30 | * as serial console interface. | |
31 | */ | |
32 | ||
33 | #include <common.h> | |
34 | #include <mpc5xxx.h> | |
35 | ||
d87080b7 WD |
36 | DECLARE_GLOBAL_DATA_PTR; |
37 | ||
945af8d7 WD |
38 | #if defined(CONFIG_PSC_CONSOLE) |
39 | ||
40 | #if CONFIG_PSC_CONSOLE == 1 | |
41 | #define PSC_BASE MPC5XXX_PSC1 | |
42 | #elif CONFIG_PSC_CONSOLE == 2 | |
43 | #define PSC_BASE MPC5XXX_PSC2 | |
44 | #elif CONFIG_PSC_CONSOLE == 3 | |
45 | #define PSC_BASE MPC5XXX_PSC3 | |
46 | #elif defined(CONFIG_MGT5100) | |
47 | #error CONFIG_PSC_CONSOLE must be in 1, 2 or 3 | |
48 | #elif CONFIG_PSC_CONSOLE == 4 | |
49 | #define PSC_BASE MPC5XXX_PSC4 | |
50 | #elif CONFIG_PSC_CONSOLE == 5 | |
51 | #define PSC_BASE MPC5XXX_PSC5 | |
52 | #elif CONFIG_PSC_CONSOLE == 6 | |
53 | #define PSC_BASE MPC5XXX_PSC6 | |
54 | #else | |
55 | #error CONFIG_PSC_CONSOLE must be in 1 ... 6 | |
56 | #endif | |
57 | ||
58 | int serial_init (void) | |
59 | { | |
945af8d7 WD |
60 | volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; |
61 | unsigned long baseclk; | |
62 | int div; | |
63 | ||
64 | /* reset PSC */ | |
65 | psc->command = PSC_SEL_MODE_REG_1; | |
66 | ||
67 | /* select clock sources */ | |
68 | #if defined(CONFIG_MGT5100) | |
69 | psc->psc_clock_select = 0xdd00; | |
b98fff1d | 70 | baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32; |
945af8d7 WD |
71 | #elif defined(CONFIG_MPC5200) |
72 | psc->psc_clock_select = 0; | |
b98fff1d | 73 | baseclk = (gd->ipb_clk + 16) / 32; |
945af8d7 WD |
74 | #endif |
75 | ||
76 | /* switch to UART mode */ | |
77 | psc->sicr = 0; | |
78 | ||
79 | /* configure parity, bit length and so on */ | |
80 | #if defined(CONFIG_MGT5100) | |
81 | psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE; | |
82 | #elif defined(CONFIG_MPC5200) | |
83 | psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE; | |
84 | #endif | |
85 | psc->mode = PSC_MODE_ONE_STOP; | |
86 | ||
87 | /* set up UART divisor */ | |
b98fff1d WD |
88 | div = (baseclk + (gd->baudrate/2)) / gd->baudrate; |
89 | psc->ctur = (div >> 8) & 0xff; | |
945af8d7 WD |
90 | psc->ctlr = div & 0xff; |
91 | ||
92 | /* disable all interrupts */ | |
93 | psc->psc_imr = 0; | |
94 | ||
95 | /* reset and enable Rx/Tx */ | |
96 | psc->command = PSC_RST_RX; | |
97 | psc->command = PSC_RST_TX; | |
98 | psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE; | |
99 | ||
100 | return (0); | |
101 | } | |
102 | ||
103 | void | |
104 | serial_putc(const char c) | |
105 | { | |
106 | volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; | |
107 | ||
108 | if (c == '\n') | |
109 | serial_putc('\r'); | |
110 | ||
111 | /* Wait for last character to go. */ | |
112 | while (!(psc->psc_status & PSC_SR_TXEMP)) | |
113 | ; | |
114 | ||
115 | psc->psc_buffer_8 = c; | |
116 | } | |
117 | ||
118 | void | |
119 | serial_puts (const char *s) | |
120 | { | |
121 | while (*s) { | |
122 | serial_putc (*s++); | |
123 | } | |
124 | } | |
125 | ||
126 | int | |
127 | serial_getc(void) | |
128 | { | |
129 | volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; | |
130 | ||
131 | /* Wait for a character to arrive. */ | |
132 | while (!(psc->psc_status & PSC_SR_RXRDY)) | |
133 | ; | |
134 | ||
135 | return psc->psc_buffer_8; | |
136 | } | |
137 | ||
138 | int | |
139 | serial_tstc(void) | |
140 | { | |
141 | volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; | |
142 | ||
143 | return (psc->psc_status & PSC_SR_RXRDY); | |
144 | } | |
145 | ||
146 | void | |
147 | serial_setbrg(void) | |
148 | { | |
945af8d7 WD |
149 | volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE; |
150 | unsigned long baseclk, div; | |
151 | ||
152 | #if defined(CONFIG_MGT5100) | |
9f221d07 | 153 | baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32; |
945af8d7 | 154 | #elif defined(CONFIG_MPC5200) |
342717f7 | 155 | baseclk = (gd->ipb_clk + 16) / 32; |
945af8d7 WD |
156 | #endif |
157 | ||
158 | /* set up UART divisor */ | |
342717f7 | 159 | div = (baseclk + (gd->baudrate/2)) / gd->baudrate; |
9f221d07 WD |
160 | psc->ctur = (div >> 8) & 0xFF; |
161 | psc->ctlr = div & 0xff; | |
945af8d7 WD |
162 | } |
163 | #endif /* CONFIG_PSC_CONSOLE */ |