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42d1f039 | 1 | /* |
61a21e98 | 2 | * Copyright 2004, 2007 Freescale Semiconductor. |
42d1f039 | 3 | * Copyright(c) 2003 Motorola Inc. |
42d1f039 WD |
4 | */ |
5 | ||
6 | #ifndef __MPC85xx_H__ | |
7 | #define __MPC85xx_H__ | |
8 | ||
42d1f039 WD |
9 | #if defined(CONFIG_E500) |
10 | #include <e500.h> | |
11 | #endif | |
12 | ||
0ac6f8b7 WD |
13 | /* |
14 | * SCCR - System Clock Control Register, 9-8 | |
42d1f039 | 15 | */ |
0ac6f8b7 WD |
16 | #define SCCR_CLPD 0x00000004 /* CPM Low Power Disable */ |
17 | #define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */ | |
42d1f039 WD |
18 | #define SCCR_DFBRG_SHIFT 0 |
19 | ||
0ac6f8b7 WD |
20 | #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */ |
21 | #define SCCR_DFBRG01 0x00000001 /* BRGCLK div by 16 (normal) */ | |
22 | #define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */ | |
23 | #define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */ | |
42d1f039 | 24 | |
e46fedfe TT |
25 | /* |
26 | * Define default values for some CCSR macros to make header files cleaner* | |
27 | * | |
28 | * To completely disable CCSR relocation in a board header file, define | |
29 | * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS | |
30 | * to a value that is the same as CONFIG_SYS_CCSRBAR. | |
31 | */ | |
32 | ||
33 | #ifdef CONFIG_SYS_CCSRBAR_PHYS | |
34 | #error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly. Use \ | |
35 | CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." | |
36 | #endif | |
37 | ||
38 | #ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE | |
39 | #undef CONFIG_SYS_CCSRBAR_PHYS_HIGH | |
40 | #undef CONFIG_SYS_CCSRBAR_PHYS_LOW | |
41 | #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 | |
42 | #endif | |
43 | ||
44 | #ifndef CONFIG_SYS_CCSRBAR | |
45 | #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT | |
46 | #endif | |
47 | ||
48 | #ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH | |
49 | #ifdef CONFIG_PHYS_64BIT | |
50 | #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf | |
51 | #else | |
52 | #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 | |
53 | #endif | |
54 | #endif | |
55 | ||
56 | #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW | |
57 | #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT | |
58 | #endif | |
59 | ||
60 | #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ | |
61 | CONFIG_SYS_CCSRBAR_PHYS_LOW) | |
62 | ||
63 | #ifndef CONFIG_SYS_IMMR | |
64 | #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR | |
65 | #endif | |
66 | ||
42d1f039 | 67 | #endif /* __MPC85xx_H__ */ |