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7c9dcfed JB |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * (C) Copyright 2016 - Beniamino Galvani <[email protected]> | |
4 | */ | |
5 | ||
f7ae49fc | 6 | #include <log.h> |
7c9dcfed | 7 | #include <asm/gpio.h> |
d678a59d | 8 | #include <common.h> |
7c9dcfed JB |
9 | #include <dm.h> |
10 | #include <dm/pinctrl.h> | |
cd93d625 | 11 | #include <linux/bitops.h> |
7c9dcfed JB |
12 | #include <linux/io.h> |
13 | #include "pinctrl-meson-gx.h" | |
14 | ||
15 | static void meson_gx_pinmux_disable_other_groups(struct meson_pinctrl *priv, | |
16 | unsigned int pin, | |
17 | int sel_group) | |
18 | { | |
19 | struct meson_pmx_group *group; | |
20 | struct meson_gx_pmx_data *pmx_data; | |
21 | void __iomem *addr; | |
22 | int i, j; | |
23 | ||
24 | for (i = 0; i < priv->data->num_groups; i++) { | |
25 | group = &priv->data->groups[i]; | |
26 | pmx_data = (struct meson_gx_pmx_data *)group->data; | |
27 | if (pmx_data->is_gpio || i == sel_group) | |
28 | continue; | |
29 | ||
30 | for (j = 0; j < group->num_pins; j++) { | |
31 | if (group->pins[j] == pin) { | |
32 | /* We have found a group using the pin */ | |
33 | debug("pinmux: disabling %s\n", group->name); | |
34 | addr = priv->reg_mux + pmx_data->reg * 4; | |
35 | writel(readl(addr) & ~BIT(pmx_data->bit), addr); | |
36 | } | |
37 | } | |
38 | } | |
39 | } | |
40 | ||
41 | static int meson_gx_pinmux_group_set(struct udevice *dev, | |
42 | unsigned int group_selector, | |
43 | unsigned int func_selector) | |
44 | { | |
45 | struct meson_pinctrl *priv = dev_get_priv(dev); | |
46 | const struct meson_pmx_group *group; | |
47 | const struct meson_pmx_func *func; | |
48 | struct meson_gx_pmx_data *pmx_data; | |
49 | void __iomem *addr; | |
50 | int i; | |
51 | ||
52 | group = &priv->data->groups[group_selector]; | |
53 | pmx_data = (struct meson_gx_pmx_data *)group->data; | |
54 | func = &priv->data->funcs[func_selector]; | |
55 | ||
56 | debug("pinmux: set group %s func %s\n", group->name, func->name); | |
57 | ||
58 | /* | |
59 | * Disable groups using the same pins. | |
60 | * The selected group is not disabled to avoid glitches. | |
61 | */ | |
62 | for (i = 0; i < group->num_pins; i++) { | |
63 | meson_gx_pinmux_disable_other_groups(priv, | |
64 | group->pins[i], | |
65 | group_selector); | |
66 | } | |
67 | ||
68 | /* Function 0 (GPIO) doesn't need any additional setting */ | |
69 | if (func_selector) { | |
70 | addr = priv->reg_mux + pmx_data->reg * 4; | |
71 | writel(readl(addr) | BIT(pmx_data->bit), addr); | |
72 | } | |
73 | ||
74 | return 0; | |
75 | } | |
76 | ||
23922894 NA |
77 | static int meson_gx_pinmux_get(struct udevice *dev, |
78 | unsigned int selector, | |
79 | char *buf, int size) | |
80 | { | |
81 | struct meson_pinctrl *priv = dev_get_priv(dev); | |
82 | struct meson_pmx_group *group; | |
83 | struct meson_gx_pmx_data *pmx_data; | |
84 | void __iomem *addr; | |
85 | int i, j, pos = 0; | |
86 | unsigned int pin; | |
87 | u32 reg; | |
88 | ||
89 | pin = selector + priv->data->pin_base; | |
90 | ||
91 | for (i = 0; i < priv->data->num_groups; i++) { | |
92 | group = &priv->data->groups[i]; | |
93 | pmx_data = (struct meson_gx_pmx_data *)group->data; | |
94 | if (pmx_data->is_gpio) | |
95 | continue; | |
96 | ||
97 | for (j = 0; j < group->num_pins; j++) { | |
98 | if (group->pins[j] == pin) { | |
99 | /* We have found a group using the pin */ | |
100 | addr = priv->reg_mux + pmx_data->reg * 4; | |
101 | reg = readl(addr) & BIT(pmx_data->bit); | |
102 | if (reg) { | |
103 | pos += snprintf(buf + pos, size - pos, | |
104 | "%s ", group->name) - 1; | |
105 | return 0; | |
106 | } | |
107 | } | |
108 | } | |
109 | } | |
110 | ||
111 | /* Fallback, must be used as GPIO */ | |
112 | snprintf(buf, size, "%s or Unknown", | |
113 | priv->data->groups[selector].name); | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
c4c726c2 JB |
118 | const struct pinconf_param meson_gx_pinconf_params[] = { |
119 | { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, | |
120 | { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, | |
121 | { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, | |
122 | }; | |
123 | ||
7c9dcfed JB |
124 | const struct pinctrl_ops meson_gx_pinctrl_ops = { |
125 | .get_groups_count = meson_pinctrl_get_groups_count, | |
126 | .get_group_name = meson_pinctrl_get_group_name, | |
127 | .get_functions_count = meson_pinmux_get_functions_count, | |
128 | .get_function_name = meson_pinmux_get_function_name, | |
129 | .pinmux_group_set = meson_gx_pinmux_group_set, | |
130 | .set_state = pinctrl_generic_set_state, | |
c4c726c2 JB |
131 | .pinconf_params = meson_gx_pinconf_params, |
132 | .pinconf_num_params = ARRAY_SIZE(meson_gx_pinconf_params), | |
133 | .pinconf_set = meson_pinconf_set, | |
134 | .pinconf_group_set = meson_pinconf_group_set, | |
23922894 NA |
135 | .get_pin_name = meson_pinctrl_get_pin_name, |
136 | .get_pins_count = meson_pinctrl_get_pins_count, | |
137 | .get_pin_muxing = meson_gx_pinmux_get, | |
7c9dcfed JB |
138 | }; |
139 | ||
140 | static const struct dm_gpio_ops meson_gx_gpio_ops = { | |
141 | .set_value = meson_gpio_set, | |
142 | .get_value = meson_gpio_get, | |
143 | .get_function = meson_gpio_get_direction, | |
144 | .direction_input = meson_gpio_direction_input, | |
145 | .direction_output = meson_gpio_direction_output, | |
146 | }; | |
147 | ||
886d36ef | 148 | U_BOOT_DRIVER(meson_gx_gpio_driver) = { |
7c9dcfed JB |
149 | .name = "meson-gx-gpio", |
150 | .id = UCLASS_GPIO, | |
151 | .probe = meson_gpio_probe, | |
152 | .ops = &meson_gx_gpio_ops, | |
153 | }; |