[J-u-boot.git] / include / configs / omap1610inn.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <[email protected]>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM926EJS	1	/* This is an arm926ejs CPU core  */
#define CONFIG_OMAP	1			/* in a TI OMAP core    */
#define CONFIG_OMAP1610	1		/* which is in a 1610  */
#define CONFIG_INNOVATOROMAP1610	1	/*  a Innovator Board  */
#define CONFIG_MACH_OMAP_INNOVATOR	/* Select board mach-type */

/* input clock of PLL */
/* the OMAP1610 Innovator has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ	12000000

#undef CONFIG_USE_IRQ	/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_SETUP_MEMORY_TAGS	1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN	(CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
/*
*/
#define CONFIG_DRIVER_LAN91C96
#define CONFIG_LAN91C96_BASE 0x04000300
#define CONFIG_LAN91C96_EXT_PHY

/*
 * NS16550 Configuration
 */
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE	(-4)
#define CFG_NS16550_CLK		(48000000)	/* can be 12M/32Khz or 48Mhz */
#define CFG_NS16550_COM1	0xfffb0000	/* uart1, bluetooth uart on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1		/* we use SERIAL 1 on OMAP1610 Innovator */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE	115200
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH


#include <configs/omap1510.h>

#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS	"mem=32M console=ttyS0,115200n8 noinitrd \
				root=/dev/nfs rw nfsroot=157.87.82.48:\
				/home/a0875451/mwd/myfs/target ip=dhcp"
#define CONFIG_NETMASK	255.255.254.0	/* talk on MY local net */
#define CONFIG_IPADDR	156.117.97.156	/* static IP I currently own */
#define CONFIG_SERVERIP	156.117.97.139	/* current IP of my dev pc */
#define CONFIG_BOOTFILE	"uImage"	/* file to load */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP	/* undef to save memory     */
#define CFG_PROMPT	"OMAP1610 Innovator # "	/* Monitor Command Prompt   */
#define CFG_CBSIZE	256		/* Console I/O Buffer Size  */
/* Print Buffer Size */
#define CFG_PBSIZE	(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
#define CFG_MAXARGS	16		/* max number of command args   */
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size    */

#define CFG_MEMTEST_START	0x10000000	/* memtest works on */
#define CFG_MEMTEST_END	0x12000000	/* 32 MB in DRAM    */

#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define CFG_LOAD_ADDR	0x10000000	/* default load address */

/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
 * DPLL1. This time is further subdivided by a local divisor.
 */
#define CFG_TIMERBASE	0xFFFEC500	/* use timer 1 */
#define CFG_PVT	7	/* 2^(pvt+1), divide by 256 */
#define CFG_HZ	((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000	/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */

#define PHYS_FLASH_1_BM1	0x00000000	/* Flash Bank #1 if booting from flash */
#define PHYS_FLASH_1_BM0	0x0C000000	/* Flash Bank #1 if booting from RAM */

#ifdef CONFIG_CS_AUTOBOOT			/* Determine CS assignment in runtime */

#ifndef __ASSEMBLY__
extern unsigned long omap_flash_base;		/* set in flash__init */
#endif
#define CFG_FLASH_BASE		omap_flash_base

#elif defined(CONFIG_CS0_BOOT)

#define CFG_FLASH_BASE		PHYS_FLASH_1_BM0

#else

#define CFG_FLASH_BASE		PHYS_FLASH_1_BM1

#endif

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define PHYS_FLASH_SIZE	0x02000000	/* 32MB */
#define CFG_MAX_FLASH_SECT	(259)	/* max number of sectors on one chip */
/* addr of environment */
#define CFG_ENV_ADDR	(CFG_FLASH_BASE + 0x020000)

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(20*CFG_HZ)	/* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(20*CFG_HZ)	/* Timeout for Flash Write */

#define CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_SIZE	0x20000	/* Total Size of Environment Sector */
#define CFG_ENV_OFFSET	0x20000	/* environment starts here  */

#endif							/* __CONFIG_H */
Commit	Line	Data
6f21347d WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <[email protected]>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* High Level Configuration Options
	31	* (easy to change)
	32	*/
	33	#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
	34	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	35	#define CONFIG_OMAP1610 1 /* which is in a 1610 */
	36	#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
a1f4a3dd	37	#define CONFIG_MACH_OMAP_INNOVATOR /* Select board mach-type */
6f21347d WD	38
	39	/* input clock of PLL */
	40	/* the OMAP1610 Innovator has 12MHz input clock */
	41	#define CONFIG_SYS_CLK_FREQ 12000000
	42
	43	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	44
	45	#define CONFIG_MISC_INIT_R
	46
	47	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	48	#define CONFIG_SETUP_MEMORY_TAGS 1
	49
	50	/*
	51	* Size of malloc() pool
	52	*/
	53	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
a8c7c708	54	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
6f21347d WD	55
	56	/*
	57	* Hardware drivers
	58	*/
	59	/*
	60	*/
	61	#define CONFIG_DRIVER_LAN91C96
	62	#define CONFIG_LAN91C96_BASE 0x04000300
	63	#define CONFIG_LAN91C96_EXT_PHY
	64
	65	/*
	66	* NS16550 Configuration
	67	*/
	68	#define CFG_NS16550
	69	#define CFG_NS16550_SERIAL
	70	#define CFG_NS16550_REG_SIZE (-4)
a8c7c708 WD	71	#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
a8c7c708 WD	72	#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
6f21347d WD	73
	74	/*
	75	* select serial console configuration
	76	*/
a8c7c708	77	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
6f21347d WD	78
	79	/* allow to overwrite serial and ethaddr */
	80	#define CONFIG_ENV_OVERWRITE
	81	#define CONFIG_CONS_INDEX 1
	82	#define CONFIG_BAUDRATE 115200
	83	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	84
a5cb2309 JL	85
	86	/*
	87	* Command line configuration.
	88	*/
	89	#include <config_cmd_default.h>
	90
	91	#define CONFIG_CMD_DHCP
	92
	93
d3b8c1a7 JL	94	/*
	95	* BOOTP options
	96	*/
	97	#define CONFIG_BOOTP_SUBNETMASK
	98	#define CONFIG_BOOTP_GATEWAY
	99	#define CONFIG_BOOTP_HOSTNAME
	100	#define CONFIG_BOOTP_BOOTPATH
	101
6f21347d	102
6f21347d WD	103	#include <configs/omap1510.h>
	104
	105	#define CONFIG_BOOTDELAY 3
	106	#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
	107	root=/dev/nfs rw nfsroot=157.87.82.48:\
	108	/home/a0875451/mwd/myfs/target ip=dhcp"
	109	#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
	110	#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
	111	#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
	112	#define CONFIG_BOOTFILE "uImage" /* file to load */
	113
a5cb2309	114	#if defined(CONFIG_CMD_KGDB)
6f21347d WD	115	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	116	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	117	#endif
	118
	119	/*
	120	* Miscellaneous configurable options
	121	*/
	122	#define CFG_LONGHELP /* undef to save memory */
	123	#define CFG_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
	124	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	125	/* Print Buffer Size */
	126	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
	127	#define CFG_MAXARGS 16 /* max number of command args */
	128	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	129
	130	#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
	131	#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
	132
	133	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
	134
	135	#define CFG_LOAD_ADDR 0x10000000 /* default load address */
	136
42d1f039	137	/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
6f21347d WD	138	* DPLL1. This time is further subdivided by a local divisor.
	139	*/
	140	#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
	141	#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
	142	#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
	143
	144	/*-----------------------------------------------------------------------
	145	* Stack sizes
	146	*
	147	* The stack sizes are set up in start.S using the settings below
	148	*/
	149	#define CONFIG_STACKSIZE (1281024) / regular stack */
	150	#ifdef CONFIG_USE_IRQ
	151	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	152	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	153	#endif
	154
	155	/*-----------------------------------------------------------------------
	156	* Physical Memory Map
	157	*/
3ff02c27 WD	158	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
3ff02c27 WD	159	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
6f21347d WD	160	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
6f21347d WD	161
3ff02c27 WD	162	#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
	163	#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
	164
	165	#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
ca0e7748	166
3ff02c27 WD	167	#ifndef __ASSEMBLY__
3ff02c27 WD	168	extern unsigned long omap_flash_base; /* set in flash__init */
63e73c9a	169	#endif
3ff02c27 WD	170	#define CFG_FLASH_BASE omap_flash_base
	171
	172	#elif defined(CONFIG_CS0_BOOT)
	173
	174	#define CFG_FLASH_BASE PHYS_FLASH_1_BM0
6f21347d	175
3ff02c27 WD	176	#else
	177
	178	#define CFG_FLASH_BASE PHYS_FLASH_1_BM1
	179
	180	#endif
6f21347d WD	181
	182	/*-----------------------------------------------------------------------
	183	* FLASH and environment organization
	184	*/
	185	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
	186	#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
	187	#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
	188	/* addr of environment */
	189	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
	190
	191	/* timeout values are in ticks */
	192	#define CFG_FLASH_ERASE_TOUT (20CFG_HZ) / Timeout for Flash Erase */
	193	#define CFG_FLASH_WRITE_TOUT (20CFG_HZ) / Timeout for Flash Write */
	194
	195	#define CFG_ENV_IS_IN_FLASH 1
	196	#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
	197	#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
	198
	199	#endif /* __CONFIG_H */