projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 47197682 HS |
1 | CONFIG_ARM=y |
| 2 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set | |
| 3 | # CONFIG_SPL_USE_ARCH_MEMSET is not set | |
| 4 | CONFIG_ARCH_ROCKCHIP=y | |
| 278b90ce | 5 | CONFIG_SYS_TEXT_BASE=0x60000000 |
| 47197682 HS |
6 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 7 | CONFIG_ROCKCHIP_RK3188=y | |
| 47197682 | 8 | CONFIG_TARGET_ROCK=y |
| d168bcb6 TR |
9 | CONFIG_NR_DRAM_BANKS=1 |
| 10 | CONFIG_SPL_STACK_R_ADDR=0x60080000 | |
| 358b6a20 TR |
11 | CONFIG_DEBUG_UART_BASE=0x20064000 |
| 12 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| fb82fe38 | 13 | CONFIG_DEBUG_UART=y |
| 37304aaf | 14 | CONFIG_USE_PREBOOT=y |
| a2a5053a | 15 | CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" |
| 47197682 | 16 | # CONFIG_DISPLAY_CPUINFO is not set |
| 78eba69d | 17 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| f89d6133 | 18 | CONFIG_SPL_TEXT_BASE=0x10080800 |
| 47197682 HS |
19 | CONFIG_SPL_STACK_R=y |
| 20 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | |
| 47738acc | 21 | CONFIG_RANDOM_UUID=y |
| 88663126 | 22 | CONFIG_CMD_I2C=y |
| 47197682 HS |
23 | CONFIG_CMD_MMC=y |
| 24 | CONFIG_CMD_SF=y | |
| 25 | CONFIG_CMD_SPI=y | |
| 47197682 HS |
26 | # CONFIG_CMD_SETEXPR is not set |
| 27 | CONFIG_CMD_CACHE=y | |
| 28 | CONFIG_CMD_TIME=y | |
| 29 | CONFIG_CMD_REGULATOR=y | |
| 30 | CONFIG_SPL_OF_CONTROL=y | |
| 8c5cad05 | 31 | CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" |
| 47197682 HS |
32 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 33 | CONFIG_SPL_OF_PLATDATA=y | |
| 5dc4dfd2 | 34 | CONFIG_ENV_IS_IN_MMC=y |
| 47197682 HS |
35 | CONFIG_REGMAP=y |
| 36 | CONFIG_SYSCON=y | |
| 37 | # CONFIG_SPL_SIMPLE_BUS is not set | |
| 38 | CONFIG_CLK=y | |
| 39 | CONFIG_ROCKCHIP_GPIO=y | |
| 40 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| 41 | CONFIG_LED=y | |
| 42 | CONFIG_MMC_DW=y | |
| 43 | CONFIG_MMC_DW_ROCKCHIP=y | |
| ea4805d6 | 44 | CONFIG_SPI_FLASH=y |
| 14453fbf | 45 | CONFIG_SF_DEFAULT_SPEED=20000000 |
| 47197682 | 46 | CONFIG_PINCTRL=y |
| 47197682 HS |
47 | CONFIG_DM_PMIC=y |
| 48 | # CONFIG_SPL_PMIC_CHILDREN is not set | |
| 49 | CONFIG_PMIC_ACT8846=y | |
| 50 | CONFIG_REGULATOR_ACT8846=y | |
| 51 | CONFIG_DM_REGULATOR_FIXED=y | |
| 52 | CONFIG_RAM=y | |
| 47197682 | 53 | CONFIG_DEBUG_UART_SHIFT=2 |
| 47197682 | 54 | CONFIG_SYSRESET=y |
| 37dc72f5 TR |
55 | CONFIG_TIMER=y |
| 56 | CONFIG_SPL_TIMER=y | |
| 57 | CONFIG_ROCKCHIP_TIMER=y | |
| 6574864d AF |
58 | CONFIG_USB=y |
| 59 | CONFIG_ROCKCHIP_USB2_PHY=y | |
| 47197682 HS |
60 | CONFIG_SPL_TINY_MEMSET=y |
| 61 | CONFIG_CMD_DHRYSTONE=y | |
| 62 | CONFIG_ERRNO_STR=y |