projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| dd84058d | 1 | CONFIG_PPC=y |
| 278b90ce | 2 | CONFIG_SYS_TEXT_BASE=0xEFF40000 |
| a09fea1d TR |
3 | CONFIG_ENV_SIZE=0x2000 |
| 4 | CONFIG_ENV_SECT_SIZE=0x20000 | |
| f7d0ae9c | 5 | CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" |
| d06e4b7e TR |
6 | CONFIG_VID=y |
| 7 | CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv" | |
| 8 | CONFIG_VOL_MONITOR_IR36021_READ=y | |
| 9 | CONFIG_VOL_MONITOR_IR36021_SET=y | |
| d46e86d2 | 10 | CONFIG_ENV_ADDR=0xEFF20000 |
| dd84058d MY |
11 | CONFIG_MPC85xx=y |
| 12 | CONFIG_TARGET_T4240RDB=y | |
| b0abde1c | 13 | CONFIG_MPC85XX_HAVE_RESET_VECTOR=y |
| 54c5c2b8 | 14 | CONFIG_MP=y |
| 73223f0e SG |
15 | CONFIG_FIT=y |
| 16 | CONFIG_FIT_VERBOSE=y | |
| 17 | CONFIG_OF_BOARD_SETUP=y | |
| 18 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| bb597c0e | 19 | CONFIG_BOOTDELAY=10 |
| 970bf860 TR |
20 | CONFIG_USE_BOOTCOMMAND=y |
| 21 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" | |
| 42a2d90c | 22 | CONFIG_ARCH_MISC_INIT=y |
| 02ddc147 | 23 | CONFIG_BOARD_EARLY_INIT_R=y |
| adad96e6 | 24 | CONFIG_HUSH_PARSER=y |
| d0ee7f29 | 25 | CONFIG_SYS_PBSIZE=276 |
| ad12dc18 | 26 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 27 | CONFIG_CMD_GREPENV=y |
| 143a5e0d | 28 | CONFIG_CMD_DM=y |
| 88663126 | 29 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 30 | CONFIG_CMD_MMC=y |
| 78d1e1d0 TR |
31 | CONFIG_CMD_USB=y |
| 32 | CONFIG_CMD_DHCP=y | |
| 89cb2b5f | 33 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 34 | CONFIG_CMD_PING=y |
| 89cb2b5f TR |
35 | CONFIG_CMD_EXT2=y |
| 36 | CONFIG_CMD_FAT=y | |
| b0abde1c | 37 | CONFIG_OF_CONTROL=y |
| e91907a1 | 38 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 39 | CONFIG_ENV_IS_IN_FLASH=y |
| fdfb17b1 TR |
40 | CONFIG_USE_BOOTFILE=y |
| 41 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
42 | CONFIG_USE_ETHPRIME=y |
| 43 | CONFIG_ETHPRIME="FM1@DTSEC1" | |
| 665c35a7 | 44 | CONFIG_DM=y |
| edca8cf7 | 45 | CONFIG_SYS_SATA_MAX_DEVICE=2 |
| 28522678 | 46 | CONFIG_FSL_CAAM=y |
| efb5dab7 | 47 | CONFIG_DDR_CLK_FREQ=133333333 |
| 95372165 TR |
48 | CONFIG_DDR_ECC=y |
| 49 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| b11dc33e | 50 | CONFIG_DM_I2C=y |
| 55dabcc8 | 51 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| fc8d3b9a | 52 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 6d5d0c95 TR |
53 | CONFIG_SYS_I2C_FSL=y |
| 54 | CONFIG_SYS_FSL_I2C_OFFSET=0x118000 | |
| 55 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 56 | CONFIG_SYS_FSL_I2C2_OFFSET=0x118100 | |
| 07dea2e7 | 57 | CONFIG_FSL_ESDHC=y |
| 63ea3172 | 58 | CONFIG_MTD=y |
| e856bdcf | 59 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
60 | CONFIG_FLASH_CFI_DRIVER=y |
| 61 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 62 | CONFIG_SYS_FLASH_CFI=y | |
| 0f9595b9 | 63 | CONFIG_SYS_MAX_FLASH_BANKS=2 |
| b24550ac | 64 | CONFIG_DM_SPI_FLASH=y |
| 14453fbf | 65 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 68d53420 | 66 | CONFIG_SPI_FLASH_SST=y |
| 3146f0c0 | 67 | CONFIG_PHYLIB=y |
| 306881a0 | 68 | CONFIG_PHYLIB_10G=y |
| 60f3c015 | 69 | CONFIG_PHY_CORTINA=y |
| e99b1dfc | 70 | CONFIG_CORTINA_FW_ADDR=0xefe00000 |
| 306881a0 TR |
71 | CONFIG_PHY_TERANETICS=y |
| 72 | CONFIG_PHY_VITESSE=y | |
| 143a5e0d CG |
73 | CONFIG_DM_ETH=y |
| 74 | CONFIG_DM_MDIO=y | |
| 1989374b | 75 | CONFIG_PHY_GIGE=y |
| a77fda1f | 76 | CONFIG_E1000=y |
| 665c35a7 | 77 | CONFIG_FMAN_ENET=y |
| a97a071d | 78 | CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000 |
| 665c35a7 | 79 | CONFIG_MII=y |
| 46031228 HZ |
80 | CONFIG_DM_PCI_COMPAT=y |
| 81 | CONFIG_PCIE_FSL=y | |
| cc1e98b5 | 82 | CONFIG_SYS_QE_FMAN_FW_IN_NOR=y |
| 9e39003e | 83 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 84 | CONFIG_SPI=y |
| b24550ac | 85 | CONFIG_DM_SPI=y |
| e5d5d447 | 86 | CONFIG_FSL_ESPI=y |
| 645176d1 | 87 | CONFIG_USB=y |
| f76750d1 | 88 | CONFIG_USB_EHCI_FSL=y |
| b24550ac | 89 | CONFIG_USB_STORAGE=y |
| 69be8fd1 MS |
90 | CONFIG_ADDR_MAP=y |
| 91 | CONFIG_SYS_NUM_ADDR_MAP=64 |