[J-u-boot.git] / include / libata.h

/*
 * Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
 * Copyright 2003-2004 Jeff Garzik
 * Copyright (C) 2008 Freescale Semiconductor, Inc.
 *		Dave Liu <[email protected]>
 *		port from libata of linux kernel
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#ifndef __LIBATA_H__
#define __LIBATA_H__

#include <common.h>

enum {
	/* various global constants */
	ATA_MAX_DEVICES		= 2,	/* per bus/port */
	ATA_MAX_PRD		= 256,	/* we could make these 256/256 */
	ATA_SECT_SIZE		= 512,
	ATA_MAX_SECTORS_128	= 128,
	ATA_MAX_SECTORS		= 256,
	ATA_MAX_SECTORS_LBA48	= 65535,
	ATA_MAX_SECTORS_TAPE	= 65535,

	ATA_ID_WORDS		= 256,
	ATA_ID_SERNO		= 10,
	ATA_ID_FW_REV		= 23,
	ATA_ID_PROD		= 27,
	ATA_ID_OLD_PIO_MODES	= 51,
	ATA_ID_FIELD_VALID	= 53,
	ATA_ID_LBA_SECTORS	= 60,
	ATA_ID_MWDMA_MODES	= 63,
	ATA_ID_PIO_MODES	= 64,
	ATA_ID_EIDE_DMA_MIN	= 65,
	ATA_ID_EIDE_PIO		= 67,
	ATA_ID_EIDE_PIO_IORDY	= 68,
	ATA_ID_PIO4		= (1 << 1),
	ATA_ID_QUEUE_DEPTH	= 75,
	ATA_ID_SATA_CAP		= 76,
	ATA_ID_SATA_FEATURES	= 78,
	ATA_ID_SATA_FEATURES_EN	= 79,
	ATA_ID_MAJOR_VER	= 80,
	ATA_ID_MINOR_VER	= 81,
	ATA_ID_UDMA_MODES	= 88,
	ATA_ID_LBA48_SECTORS	= 100,

	ATA_ID_SERNO_LEN	= 20,
	ATA_ID_FW_REV_LEN	= 8,
	ATA_ID_PROD_LEN		= 40,

	ATA_PCI_CTL_OFS		= 2,

	ATA_PIO0		= (1 << 0),
	ATA_PIO1		= ATA_PIO0 | (1 << 1),
	ATA_PIO2		= ATA_PIO1 | (1 << 2),
	ATA_PIO3		= ATA_PIO2 | (1 << 3),
	ATA_PIO4		= ATA_PIO3 | (1 << 4),
	ATA_PIO5		= ATA_PIO4 | (1 << 5),
	ATA_PIO6		= ATA_PIO5 | (1 << 6),

	ATA_SWDMA0		= (1 << 0),
	ATA_SWDMA1		= ATA_SWDMA0 | (1 << 1),
	ATA_SWDMA2		= ATA_SWDMA1 | (1 << 2),

	ATA_SWDMA2_ONLY		= (1 << 2),

	ATA_MWDMA0		= (1 << 0),
	ATA_MWDMA1		= ATA_MWDMA0 | (1 << 1),
	ATA_MWDMA2		= ATA_MWDMA1 | (1 << 2),

	ATA_MWDMA12_ONLY	= (1 << 1) | (1 << 2),
	ATA_MWDMA2_ONLY		= (1 << 2),

	ATA_UDMA0		= (1 << 0),
	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),
	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),
	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),
	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),
	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),
	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),
	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),
	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?).  */

	ATA_UDMA_MASK_40C	= ATA_UDMA2,	/* udma0-2 */

	/* DMA-related */
	ATA_PRD_SZ		= 8,
	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),
	ATA_PRD_EOT		= (1 << 31),	/* end-of-table flag */

	ATA_DMA_TABLE_OFS	= 4,
	ATA_DMA_STATUS		= 2,
	ATA_DMA_CMD		= 0,
	ATA_DMA_WR		= (1 << 3),
	ATA_DMA_START		= (1 << 0),
	ATA_DMA_INTR		= (1 << 2),
	ATA_DMA_ERR		= (1 << 1),
	ATA_DMA_ACTIVE		= (1 << 0),

	/* bits in ATA command block registers */
	ATA_HOB			= (1 << 7),	/* LBA48 selector */
	ATA_NIEN		= (1 << 1),	/* disable-irq flag */
	ATA_LBA			= (1 << 6),	/* LBA28 selector */
	ATA_DEV1		= (1 << 4),	/* Select Device 1 (slave) */
	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), /* obs bits in dev reg */
	ATA_DEVCTL_OBS		= (1 << 3),	/* obsolete bit in devctl reg */
	ATA_BUSY		= (1 << 7),	/* BSY status bit */
	ATA_DRDY		= (1 << 6),	/* device ready */
	ATA_DF			= (1 << 5),	/* device fault */
	ATA_DRQ			= (1 << 3),	/* data request i/o */
	ATA_ERR			= (1 << 0),	/* have an error */
	ATA_SRST		= (1 << 2),	/* software reset */
	ATA_ICRC		= (1 << 7),	/* interface CRC error */
	ATA_UNC			= (1 << 6),	/* uncorrectable media error */
	ATA_IDNF		= (1 << 4),	/* ID not found */
	ATA_ABORTED		= (1 << 2),	/* command aborted */

	/* ATA command block registers */
	ATA_REG_DATA		= 0x00,
	ATA_REG_ERR		= 0x01,
	ATA_REG_NSECT		= 0x02,
	ATA_REG_LBAL		= 0x03,
	ATA_REG_LBAM		= 0x04,
	ATA_REG_LBAH		= 0x05,
	ATA_REG_DEVICE		= 0x06,
	ATA_REG_STATUS		= 0x07,

	ATA_REG_FEATURE		= ATA_REG_ERR, /* and their aliases */
	ATA_REG_CMD		= ATA_REG_STATUS,
	ATA_REG_BYTEL		= ATA_REG_LBAM,
	ATA_REG_BYTEH		= ATA_REG_LBAH,
	ATA_REG_DEVSEL		= ATA_REG_DEVICE,
	ATA_REG_IRQ		= ATA_REG_NSECT,

	/* ATA device commands */
	ATA_CMD_DEV_RESET	= 0x08, /* ATAPI device reset */
	ATA_CMD_CHK_POWER	= 0xE5, /* check power mode */
	ATA_CMD_STANDBY		= 0xE2, /* place in standby power mode */
	ATA_CMD_IDLE		= 0xE3, /* place in idle power mode */
	ATA_CMD_EDD		= 0x90,	/* execute device diagnostic */
	ATA_CMD_FLUSH		= 0xE7,
	ATA_CMD_FLUSH_EXT	= 0xEA,
	ATA_CMD_ID_ATA		= 0xEC,
	ATA_CMD_ID_ATAPI	= 0xA1,
	ATA_CMD_READ		= 0xC8,
	ATA_CMD_READ_EXT	= 0x25,
	ATA_CMD_WRITE		= 0xCA,
	ATA_CMD_WRITE_EXT	= 0x35,
	ATA_CMD_WRITE_FUA_EXT	= 0x3D,
	ATA_CMD_FPDMA_READ	= 0x60,
	ATA_CMD_FPDMA_WRITE	= 0x61,
	ATA_CMD_PIO_READ	= 0x20,
	ATA_CMD_PIO_READ_EXT	= 0x24,
	ATA_CMD_PIO_WRITE	= 0x30,
	ATA_CMD_PIO_WRITE_EXT	= 0x34,
	ATA_CMD_READ_MULTI	= 0xC4,
	ATA_CMD_READ_MULTI_EXT	= 0x29,
	ATA_CMD_WRITE_MULTI	= 0xC5,
	ATA_CMD_WRITE_MULTI_EXT	= 0x39,
	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
	ATA_CMD_SET_FEATURES	= 0xEF,
	ATA_CMD_SET_MULTI	= 0xC6,
	ATA_CMD_PACKET		= 0xA0,
	ATA_CMD_VERIFY		= 0x40,
	ATA_CMD_VERIFY_EXT	= 0x42,
	ATA_CMD_STANDBYNOW1	= 0xE0,
	ATA_CMD_IDLEIMMEDIATE	= 0xE1,
	ATA_CMD_SLEEP		= 0xE6,
	ATA_CMD_INIT_DEV_PARAMS	= 0x91,
	ATA_CMD_READ_NATIVE_MAX	= 0xF8,
	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
	ATA_CMD_SET_MAX		= 0xF9,
	ATA_CMD_SET_MAX_EXT	= 0x37,
	ATA_CMD_READ_LOG_EXT	= 0x2f,
	ATA_CMD_PMP_READ	= 0xE4,
	ATA_CMD_PMP_WRITE	= 0xE8,
	ATA_CMD_CONF_OVERLAY	= 0xB1,
	ATA_CMD_SEC_FREEZE_LOCK	= 0xF5,

	/* READ_LOG_EXT pages */
	ATA_LOG_SATA_NCQ	= 0x10,

	/* READ/WRITE LONG (obsolete) */
	ATA_CMD_READ_LONG	= 0x22,
	ATA_CMD_READ_LONG_ONCE	= 0x23,
	ATA_CMD_WRITE_LONG	= 0x32,
	ATA_CMD_WRITE_LONG_ONCE	= 0x33,

	/* SETFEATURES stuff */
	SETFEATURES_XFER	= 0x03,
	XFER_UDMA_7		= 0x47,
	XFER_UDMA_6		= 0x46,
	XFER_UDMA_5		= 0x45,
	XFER_UDMA_4		= 0x44,
	XFER_UDMA_3		= 0x43,
	XFER_UDMA_2		= 0x42,
	XFER_UDMA_1		= 0x41,
	XFER_UDMA_0		= 0x40,
	XFER_MW_DMA_4		= 0x24,	/* CFA only */
	XFER_MW_DMA_3		= 0x23,	/* CFA only */
	XFER_MW_DMA_2		= 0x22,
	XFER_MW_DMA_1		= 0x21,
	XFER_MW_DMA_0		= 0x20,
	XFER_SW_DMA_2		= 0x12,
	XFER_SW_DMA_1		= 0x11,
	XFER_SW_DMA_0		= 0x10,
	XFER_PIO_6		= 0x0E,	/* CFA only */
	XFER_PIO_5		= 0x0D,	/* CFA only */
	XFER_PIO_4		= 0x0C,
	XFER_PIO_3		= 0x0B,
	XFER_PIO_2		= 0x0A,
	XFER_PIO_1		= 0x09,
	XFER_PIO_0		= 0x08,
	XFER_PIO_SLOW		= 0x00,

	SETFEATURES_WC_ON	= 0x02, /* Enable write cache */
	SETFEATURES_WC_OFF	= 0x82, /* Disable write cache */

	SETFEATURES_SPINUP	= 0x07, /* Spin-up drive */

	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */

	/* SETFEATURE Sector counts for SATA features */
	SATA_AN			= 0x05,  /* Asynchronous Notification */
	SATA_DIPM		= 0x03,  /* Device Initiated Power Management */

	/* feature values for SET_MAX */
	ATA_SET_MAX_ADDR	= 0x00,
	ATA_SET_MAX_PASSWD	= 0x01,
	ATA_SET_MAX_LOCK	= 0x02,
	ATA_SET_MAX_UNLOCK	= 0x03,
	ATA_SET_MAX_FREEZE_LOCK	= 0x04,

	/* feature values for DEVICE CONFIGURATION OVERLAY */
	ATA_DCO_RESTORE		= 0xC0,
	ATA_DCO_FREEZE_LOCK	= 0xC1,
	ATA_DCO_IDENTIFY	= 0xC2,
	ATA_DCO_SET		= 0xC3,

	/* ATAPI stuff */
	ATAPI_PKT_DMA		= (1 << 0),
	ATAPI_DMADIR		= (1 << 2),	/* ATAPI data dir:
						   0=to device, 1=to host */
	ATAPI_CDB_LEN		= 16,

	/* PMP stuff */
	SATA_PMP_MAX_PORTS	= 15,
	SATA_PMP_CTRL_PORT	= 15,

	SATA_PMP_GSCR_DWORDS	= 128,
	SATA_PMP_GSCR_PROD_ID	= 0,
	SATA_PMP_GSCR_REV	= 1,
	SATA_PMP_GSCR_PORT_INFO	= 2,
	SATA_PMP_GSCR_ERROR	= 32,
	SATA_PMP_GSCR_ERROR_EN	= 33,
	SATA_PMP_GSCR_FEAT	= 64,
	SATA_PMP_GSCR_FEAT_EN	= 96,

	SATA_PMP_PSCR_STATUS	= 0,
	SATA_PMP_PSCR_ERROR	= 1,
	SATA_PMP_PSCR_CONTROL	= 2,

	SATA_PMP_FEAT_BIST	= (1 << 0),
	SATA_PMP_FEAT_PMREQ	= (1 << 1),
	SATA_PMP_FEAT_DYNSSC	= (1 << 2),
	SATA_PMP_FEAT_NOTIFY	= (1 << 3),

	/* cable types */
	ATA_CBL_NONE		= 0,
	ATA_CBL_PATA40		= 1,
	ATA_CBL_PATA80		= 2,
	ATA_CBL_PATA40_SHORT	= 3,	/* 40 wire cable to high UDMA spec */
	ATA_CBL_PATA_UNK	= 4,	/* don't know, maybe 80c? */
	ATA_CBL_PATA_IGN	= 5,	/* don't know, ignore cable handling */
	ATA_CBL_SATA		= 6,

	/* SATA Status and Control Registers */
	SCR_STATUS		= 0,
	SCR_ERROR		= 1,
	SCR_CONTROL		= 2,
	SCR_ACTIVE		= 3,
	SCR_NOTIFICATION	= 4,

	/* SError bits */
	SERR_DATA_RECOVERED	= (1 << 0), /* recovered data error */
	SERR_COMM_RECOVERED	= (1 << 1), /* recovered comm failure */
	SERR_DATA		= (1 << 8), /* unrecovered data error */
	SERR_PERSISTENT		= (1 << 9), /* persistent data/comm error */
	SERR_PROTOCOL		= (1 << 10), /* protocol violation */
	SERR_INTERNAL		= (1 << 11), /* host internal error */
	SERR_PHYRDY_CHG		= (1 << 16), /* PHY RDY changed */
	SERR_PHY_INT_ERR	= (1 << 17), /* PHY internal error */
	SERR_COMM_WAKE		= (1 << 18), /* Comm wake */
	SERR_10B_8B_ERR		= (1 << 19), /* 10b to 8b decode error */
	SERR_DISPARITY		= (1 << 20), /* Disparity */
	SERR_CRC		= (1 << 21), /* CRC error */
	SERR_HANDSHAKE		= (1 << 22), /* Handshake error */
	SERR_LINK_SEQ_ERR	= (1 << 23), /* Link sequence error */
	SERR_TRANS_ST_ERROR	= (1 << 24), /* Transport state trans. error */
	SERR_UNRECOG_FIS	= (1 << 25), /* Unrecognized FIS */
	SERR_DEV_XCHG		= (1 << 26), /* device exchanged */

	/* struct ata_taskfile flags */
	ATA_TFLAG_LBA48		= (1 << 0), /* enable 48-bit LBA and "HOB" */
	ATA_TFLAG_ISADDR	= (1 << 1), /* enable r/w to nsect/lba regs */
	ATA_TFLAG_DEVICE	= (1 << 2), /* enable r/w to device reg */
	ATA_TFLAG_WRITE		= (1 << 3), /* data dir: host->dev==1 (write) */
	ATA_TFLAG_LBA		= (1 << 4), /* enable LBA */
	ATA_TFLAG_FUA		= (1 << 5), /* enable FUA */
	ATA_TFLAG_POLLING	= (1 << 6), /* set nIEN to 1 and use polling */

	/* protocol flags */
	ATA_PROT_FLAG_PIO	= (1 << 0), /* is PIO */
	ATA_PROT_FLAG_DMA	= (1 << 1), /* is DMA */
	ATA_PROT_FLAG_DATA	= ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
	ATA_PROT_FLAG_NCQ	= (1 << 2), /* is NCQ */
	ATA_PROT_FLAG_ATAPI	= (1 << 3), /* is ATAPI */
};

enum ata_tf_protocols {
	/* ATA taskfile protocols */
	ATA_PROT_UNKNOWN,	/* unknown/invalid */
	ATA_PROT_NODATA,	/* no data */
	ATA_PROT_PIO,		/* PIO data xfer */
	ATA_PROT_DMA,		/* DMA */
	ATA_PROT_NCQ,		/* NCQ */
	ATAPI_PROT_NODATA,	/* packet command, no data */
	ATAPI_PROT_PIO,		/* packet command, PIO data xfer*/
	ATAPI_PROT_DMA,		/* packet command with special DMA sauce */
};

enum ata_ioctls {
	ATA_IOC_GET_IO32	= 0x309,
	ATA_IOC_SET_IO32	= 0x324,
};

enum ata_dev_typed {
	ATA_DEV_ATA,		/* ATA device */
	ATA_DEV_ATAPI,		/* ATAPI device */
	ATA_DEV_PMP,		/* Port Multiplier Port */
	ATA_DEV_UNKNOWN,	/* unknown */
};

struct ata_taskfile {
	unsigned long		flags;		/* ATA_TFLAG_xxx */
	u8			protocol;	/* ATA_PROT_xxx */

	u8			ctl;		/* control reg */

	u8			hob_feature;	/* additional data */
	u8			hob_nsect;	/* to support LBA48 */
	u8			hob_lbal;
	u8			hob_lbam;
	u8			hob_lbah;

	u8			feature;
	u8			nsect;
	u8			lbal;
	u8			lbam;
	u8			lbah;

	u8			device;

	u8			command;	/* IO operation */
};

/*
 * protocol tests
 */
static inline unsigned int ata_prot_flags(u8 prot)
{
	switch (prot) {
	case ATA_PROT_NODATA:
		return 0;
	case ATA_PROT_PIO:
		return ATA_PROT_FLAG_PIO;
	case ATA_PROT_DMA:
		return ATA_PROT_FLAG_DMA;
	case ATA_PROT_NCQ:
		return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
	case ATAPI_PROT_NODATA:
		return ATA_PROT_FLAG_ATAPI;
	case ATAPI_PROT_PIO:
		return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
	case ATAPI_PROT_DMA:
		return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
	}
	return 0;
}

static inline int ata_is_atapi(u8 prot)
{
	return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
}

static inline int ata_is_nodata(u8 prot)
{
	return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
}

static inline int ata_is_pio(u8 prot)
{
	return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
}

static inline int ata_is_dma(u8 prot)
{
	return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
}

static inline int ata_is_ncq(u8 prot)
{
	return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
}

static inline int ata_is_data(u8 prot)
{
	return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
}

/*
 * id tests
 */
#define ata_id_is_ata(id)		(((id)[0] & (1 << 15)) == 0)
#define ata_id_has_lba(id)		((id)[49] & (1 << 9))
#define ata_id_has_dma(id)		((id)[49] & (1 << 8))
#define ata_id_has_ncq(id)		((id)[76] & (1 << 8))
#define ata_id_queue_depth(id)		(((id)[75] & 0x1f) + 1)
#define ata_id_removeable(id)		((id)[0] & (1 << 7))
#define ata_id_iordy_disable(id)	((id)[49] & (1 << 10))
#define ata_id_has_iordy(id)		((id)[49] & (1 << 11))

#define ata_id_u32(id,n)	\
	(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
#define ata_id_u64(id,n)	\
	( ((u64) (id)[(n) + 3] << 48) | \
	  ((u64) (id)[(n) + 2] << 32) | \
	  ((u64) (id)[(n) + 1] << 16) | \
	  ((u64) (id)[(n) + 0]) )

#define ata_id_cdb_intr(id)		(((id)[0] & 0x60) == 0x20)

static inline int ata_id_has_fua(const u16 *id)
{
	if ((id[84] & 0xC000) != 0x4000)
		return 0;
	return id[84] & (1 << 6);
}

static inline int ata_id_has_flush(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[83] & (1 << 12);
}

static inline int ata_id_has_flush_ext(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[83] & (1 << 13);
}

static inline int ata_id_has_lba48(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	if (!ata_id_u64(id, 100))
		return 0;
	return id[83] & (1 << 10);
}

static inline int ata_id_hpa_enabled(const u16 *id)
{
	/* Yes children, word 83 valid bits cover word 82 data */
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	/* And 87 covers 85-87 */
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	/* Check command sets enabled as well as supported */
	if ((id[85] & ( 1 << 10)) == 0)
		return 0;
	return id[82] & (1 << 10);
}

static inline int ata_id_has_wcache(const u16 *id)
{
	/* Yes children, word 83 valid bits cover word 82 data */
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[82] & (1 << 5);
}

static inline int ata_id_has_pm(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[82] & (1 << 3);
}

static inline int ata_id_rahead_enabled(const u16 *id)
{
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	return id[85] & (1 << 6);
}

static inline int ata_id_wcache_enabled(const u16 *id)
{
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	return id[85] & (1 << 5);
}

static inline unsigned int ata_id_major_version(const u16 *id)
{
	unsigned int mver;

	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
		return 0;

	for (mver = 14; mver >= 1; mver--)
		if (id[ATA_ID_MAJOR_VER] & (1 << mver))
			break;
	return mver;
}

static inline int ata_id_is_sata(const u16 *id)
{
	return ata_id_major_version(id) >= 5 && id[93] == 0;
}

static inline int ata_id_has_tpm(const u16 *id)
{
	/* The TPM bits are only valid on ATA8 */
	if (ata_id_major_version(id) < 8)
		return 0;
	if ((id[48] & 0xC000) != 0x4000)
		return 0;
	return id[48] & (1 << 0);
}

static inline int ata_id_has_dword_io(const u16 *id)
{
	/* ATA 8 reuses this flag for "trusted" computing */
	if (ata_id_major_version(id) > 7)
		return 0;
	if (id[48] & (1 << 0))
		return 1;
	return 0;
}

static inline int ata_id_current_chs_valid(const u16 *id)
{
	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
	   has not been issued to the device then the values of
	   id[54] to id[56] are vendor specific. */
	return (id[53] & 0x01) && /* Current translation valid */
		id[54] &&  /* cylinders in current translation */
		id[55] &&  /* heads in current translation */
		id[55] <= 16 &&
		id[56];    /* sectors in current translation */
}

static inline int ata_id_is_cfa(const u16 *id)
{
	u16 v = id[0];
	if (v == 0x848A)	/* Standard CF */
		return 1;
	/* Could be CF hiding as standard ATA */
	if (ata_id_major_version(id) >= 3 &&  id[82] != 0xFFFF &&
			(id[82] & ( 1 << 2)))
		return 1;
	return 0;
}

static inline int ata_drive_40wire(const u16 *dev_id)
{
	if (ata_id_is_sata(dev_id))
		return 0;	/* SATA */
	if ((dev_id[93] & 0xE000) == 0x6000)
		return 0;	/* 80 wire */
	return 1;
}

static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
{
	if ((dev_id[93] & 0x2000) == 0x2000)
		return 0;	/* 80 wire */
	return 1;
}

static inline int atapi_cdb_len(const u16 *dev_id)
{
	u16 tmp = dev_id[0] & 0x3;
	switch (tmp) {
	case 0:		return 12;
	case 1:		return 16;
	default:	return -1;
	}
}

static inline int atapi_command_packet_set(const u16 *dev_id)
{
	return (dev_id[0] >> 8) & 0x1f;
}

static inline int atapi_id_dmadir(const u16 *dev_id)
{
	return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
}

static inline int is_multi_taskfile(struct ata_taskfile *tf)
{
	return (tf->command == ATA_CMD_READ_MULTI) ||
	       (tf->command == ATA_CMD_WRITE_MULTI) ||
	       (tf->command == ATA_CMD_READ_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
}

static inline int ata_ok(u8 status)
{
	return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
			== ATA_DRDY);
}

static inline int lba_28_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
}

static inline int lba_48_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
}

#define sata_pmp_gscr_vendor(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
#define sata_pmp_gscr_devid(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
#define sata_pmp_gscr_rev(gscr)		(((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
#define sata_pmp_gscr_ports(gscr)	((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)

u64 ata_id_n_sectors(u16 *id);
u32 ata_dev_classify(u32 sig);
void ata_id_c_string(const u16 *id, unsigned char *s,
			 unsigned int ofs, unsigned int len);
void ata_dump_id(u16 *id);
void ata_swap_buf_le16(u16 *buf, unsigned int buf_words);

#endif /* __LIBATA_H__ */
Commit	Line	Data
ffc664e8	1	/*
24b44844 DL	2	* Copyright 2003-2004 Red Hat, Inc. All rights reserved.
24b44844 DL	3	* Copyright 2003-2004 Jeff Garzik
ffc664e8 DL	4	* Copyright (C) 2008 Freescale Semiconductor, Inc.
	5	* Dave Liu <[email protected]>
	6	* port from libata of linux kernel
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*
	23	*/
	24
	25	#ifndef __LIBATA_H__
	26	#define __LIBATA_H__
	27
	28	#include <common.h>
	29
24b44844 DL	30	enum {
	31	/* various global constants */
	32	ATA_MAX_DEVICES = 2, /* per bus/port */
	33	ATA_MAX_PRD = 256, /* we could make these 256/256 */
	34	ATA_SECT_SIZE = 512,
	35	ATA_MAX_SECTORS_128 = 128,
	36	ATA_MAX_SECTORS = 256,
	37	ATA_MAX_SECTORS_LBA48 = 65535,
	38	ATA_MAX_SECTORS_TAPE = 65535,
	39
	40	ATA_ID_WORDS = 256,
	41	ATA_ID_SERNO = 10,
	42	ATA_ID_FW_REV = 23,
	43	ATA_ID_PROD = 27,
	44	ATA_ID_OLD_PIO_MODES = 51,
	45	ATA_ID_FIELD_VALID = 53,
	46	ATA_ID_LBA_SECTORS = 60,
	47	ATA_ID_MWDMA_MODES = 63,
	48	ATA_ID_PIO_MODES = 64,
	49	ATA_ID_EIDE_DMA_MIN = 65,
	50	ATA_ID_EIDE_PIO = 67,
	51	ATA_ID_EIDE_PIO_IORDY = 68,
	52	ATA_ID_PIO4 = (1 << 1),
	53	ATA_ID_QUEUE_DEPTH = 75,
	54	ATA_ID_SATA_CAP = 76,
	55	ATA_ID_SATA_FEATURES = 78,
	56	ATA_ID_SATA_FEATURES_EN = 79,
	57	ATA_ID_MAJOR_VER = 80,
	58	ATA_ID_MINOR_VER = 81,
	59	ATA_ID_UDMA_MODES = 88,
	60	ATA_ID_LBA48_SECTORS = 100,
	61
	62	ATA_ID_SERNO_LEN = 20,
	63	ATA_ID_FW_REV_LEN = 8,
	64	ATA_ID_PROD_LEN = 40,
	65
	66	ATA_PCI_CTL_OFS = 2,
	67
	68	ATA_PIO0 = (1 << 0),
	69	ATA_PIO1 = ATA_PIO0 \| (1 << 1),
	70	ATA_PIO2 = ATA_PIO1 \| (1 << 2),
	71	ATA_PIO3 = ATA_PIO2 \| (1 << 3),
	72	ATA_PIO4 = ATA_PIO3 \| (1 << 4),
	73	ATA_PIO5 = ATA_PIO4 \| (1 << 5),
	74	ATA_PIO6 = ATA_PIO5 \| (1 << 6),
	75
	76	ATA_SWDMA0 = (1 << 0),
	77	ATA_SWDMA1 = ATA_SWDMA0 \| (1 << 1),
	78	ATA_SWDMA2 = ATA_SWDMA1 \| (1 << 2),
	79
	80	ATA_SWDMA2_ONLY = (1 << 2),
	81
	82	ATA_MWDMA0 = (1 << 0),
	83	ATA_MWDMA1 = ATA_MWDMA0 \| (1 << 1),
	84	ATA_MWDMA2 = ATA_MWDMA1 \| (1 << 2),
	85
	86	ATA_MWDMA12_ONLY = (1 << 1) \| (1 << 2),
	87	ATA_MWDMA2_ONLY = (1 << 2),
	88
	89	ATA_UDMA0 = (1 << 0),
	90	ATA_UDMA1 = ATA_UDMA0 \| (1 << 1),
	91	ATA_UDMA2 = ATA_UDMA1 \| (1 << 2),
	92	ATA_UDMA3 = ATA_UDMA2 \| (1 << 3),
	93	ATA_UDMA4 = ATA_UDMA3 \| (1 << 4),
94	ATA_UDMA5 = ATA_UDMA4 \| (1 << 5),
95	ATA_UDMA6 = ATA_UDMA5 \| (1 << 6),
96	ATA_UDMA7 = ATA_UDMA6 \| (1 << 7),
97	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
98
99	ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
100
101	/* DMA-related */
102	ATA_PRD_SZ = 8,
103	ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
104	ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
105
106	ATA_DMA_TABLE_OFS = 4,
107	ATA_DMA_STATUS = 2,
108	ATA_DMA_CMD = 0,
109	ATA_DMA_WR = (1 << 3),
110	ATA_DMA_START = (1 << 0),
111	ATA_DMA_INTR = (1 << 2),
112	ATA_DMA_ERR = (1 << 1),
113	ATA_DMA_ACTIVE = (1 << 0),
114
115	/* bits in ATA command block registers */
116	ATA_HOB = (1 << 7), /* LBA48 selector */
117	ATA_NIEN = (1 << 1), /* disable-irq flag */
118	ATA_LBA = (1 << 6), /* LBA28 selector */
119	ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
120	ATA_DEVICE_OBS = (1 << 7) \| (1 << 5), /* obs bits in dev reg */
121	ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
122	ATA_BUSY = (1 << 7), /* BSY status bit */
123	ATA_DRDY = (1 << 6), /* device ready */
124	ATA_DF = (1 << 5), /* device fault */
125	ATA_DRQ = (1 << 3), /* data request i/o */
126	ATA_ERR = (1 << 0), /* have an error */
127	ATA_SRST = (1 << 2), /* software reset */
128	ATA_ICRC = (1 << 7), /* interface CRC error */
129	ATA_UNC = (1 << 6), /* uncorrectable media error */
130	ATA_IDNF = (1 << 4), /* ID not found */
131	ATA_ABORTED = (1 << 2), /* command aborted */
132
133	/* ATA command block registers */
134	ATA_REG_DATA = 0x00,
135	ATA_REG_ERR = 0x01,
136	ATA_REG_NSECT = 0x02,
137	ATA_REG_LBAL = 0x03,
138	ATA_REG_LBAM = 0x04,
139	ATA_REG_LBAH = 0x05,
140	ATA_REG_DEVICE = 0x06,
141	ATA_REG_STATUS = 0x07,
142
143	ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
144	ATA_REG_CMD = ATA_REG_STATUS,
145	ATA_REG_BYTEL = ATA_REG_LBAM,
146	ATA_REG_BYTEH = ATA_REG_LBAH,
147	ATA_REG_DEVSEL = ATA_REG_DEVICE,
148	ATA_REG_IRQ = ATA_REG_NSECT,
149
150	/* ATA device commands */
151	ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
152	ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
153	ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
154	ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
155	ATA_CMD_EDD = 0x90, /* execute device diagnostic */
156	ATA_CMD_FLUSH = 0xE7,
157	ATA_CMD_FLUSH_EXT = 0xEA,
158	ATA_CMD_ID_ATA = 0xEC,
159	ATA_CMD_ID_ATAPI = 0xA1,
160	ATA_CMD_READ = 0xC8,
161	ATA_CMD_READ_EXT = 0x25,
162	ATA_CMD_WRITE = 0xCA,
163	ATA_CMD_WRITE_EXT = 0x35,
164	ATA_CMD_WRITE_FUA_EXT = 0x3D,
165	ATA_CMD_FPDMA_READ = 0x60,
166	ATA_CMD_FPDMA_WRITE = 0x61,
167	ATA_CMD_PIO_READ = 0x20,
168	ATA_CMD_PIO_READ_EXT = 0x24,
169	ATA_CMD_PIO_WRITE = 0x30,
170	ATA_CMD_PIO_WRITE_EXT = 0x34,
171	ATA_CMD_READ_MULTI = 0xC4,
172	ATA_CMD_READ_MULTI_EXT = 0x29,
173	ATA_CMD_WRITE_MULTI = 0xC5,
174	ATA_CMD_WRITE_MULTI_EXT = 0x39,
175	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
176	ATA_CMD_SET_FEATURES = 0xEF,
177	ATA_CMD_SET_MULTI = 0xC6,
178	ATA_CMD_PACKET = 0xA0,
179	ATA_CMD_VERIFY = 0x40,
180	ATA_CMD_VERIFY_EXT = 0x42,
181	ATA_CMD_STANDBYNOW1 = 0xE0,
182	ATA_CMD_IDLEIMMEDIATE = 0xE1,
183	ATA_CMD_SLEEP = 0xE6,
184	ATA_CMD_INIT_DEV_PARAMS = 0x91,
185	ATA_CMD_READ_NATIVE_MAX = 0xF8,
186	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
187	ATA_CMD_SET_MAX = 0xF9,
188	ATA_CMD_SET_MAX_EXT = 0x37,
189	ATA_CMD_READ_LOG_EXT = 0x2f,
190	ATA_CMD_PMP_READ = 0xE4,
191	ATA_CMD_PMP_WRITE = 0xE8,
192	ATA_CMD_CONF_OVERLAY = 0xB1,
193	ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
194
195	/* READ_LOG_EXT pages */
196	ATA_LOG_SATA_NCQ = 0x10,
197
198	/* READ/WRITE LONG (obsolete) */
199	ATA_CMD_READ_LONG = 0x22,
200	ATA_CMD_READ_LONG_ONCE = 0x23,
201	ATA_CMD_WRITE_LONG = 0x32,
202	ATA_CMD_WRITE_LONG_ONCE = 0x33,
ffc664e8	203
ffc664e8 DL	204	/* SETFEATURES stuff */
	205	SETFEATURES_XFER = 0x03,
	206	XFER_UDMA_7 = 0x47,
	207	XFER_UDMA_6 = 0x46,
	208	XFER_UDMA_5 = 0x45,
	209	XFER_UDMA_4 = 0x44,
	210	XFER_UDMA_3 = 0x43,
	211	XFER_UDMA_2 = 0x42,
	212	XFER_UDMA_1 = 0x41,
	213	XFER_UDMA_0 = 0x40,
24b44844 DL	214	XFER_MW_DMA_4 = 0x24, /* CFA only */
24b44844 DL	215	XFER_MW_DMA_3 = 0x23, /* CFA only */
ffc664e8 DL	216	XFER_MW_DMA_2 = 0x22,
	217	XFER_MW_DMA_1 = 0x21,
	218	XFER_MW_DMA_0 = 0x20,
24b44844 DL	219	XFER_SW_DMA_2 = 0x12,
	220	XFER_SW_DMA_1 = 0x11,
	221	XFER_SW_DMA_0 = 0x10,
	222	XFER_PIO_6 = 0x0E, /* CFA only */
	223	XFER_PIO_5 = 0x0D, /* CFA only */
ffc664e8 DL	224	XFER_PIO_4 = 0x0C,
	225	XFER_PIO_3 = 0x0B,
	226	XFER_PIO_2 = 0x0A,
	227	XFER_PIO_1 = 0x09,
	228	XFER_PIO_0 = 0x08,
	229	XFER_PIO_SLOW = 0x00,
	230
	231	SETFEATURES_WC_ON = 0x02, /* Enable write cache */
	232	SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
	233
	234	SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
24b44844 DL	235
	236	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
	237	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
	238
	239	/* SETFEATURE Sector counts for SATA features */
	240	SATA_AN = 0x05, /* Asynchronous Notification */
	241	SATA_DIPM = 0x03, /* Device Initiated Power Management */
	242
	243	/* feature values for SET_MAX */
	244	ATA_SET_MAX_ADDR = 0x00,
	245	ATA_SET_MAX_PASSWD = 0x01,
	246	ATA_SET_MAX_LOCK = 0x02,
	247	ATA_SET_MAX_UNLOCK = 0x03,
	248	ATA_SET_MAX_FREEZE_LOCK = 0x04,
	249
	250	/* feature values for DEVICE CONFIGURATION OVERLAY */
	251	ATA_DCO_RESTORE = 0xC0,
	252	ATA_DCO_FREEZE_LOCK = 0xC1,
	253	ATA_DCO_IDENTIFY = 0xC2,
	254	ATA_DCO_SET = 0xC3,
	255
	256	/* ATAPI stuff */
	257	ATAPI_PKT_DMA = (1 << 0),
	258	ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
	259	0=to device, 1=to host */
	260	ATAPI_CDB_LEN = 16,
	261
	262	/* PMP stuff */
	263	SATA_PMP_MAX_PORTS = 15,
	264	SATA_PMP_CTRL_PORT = 15,
	265
	266	SATA_PMP_GSCR_DWORDS = 128,
	267	SATA_PMP_GSCR_PROD_ID = 0,
	268	SATA_PMP_GSCR_REV = 1,
	269	SATA_PMP_GSCR_PORT_INFO = 2,
	270	SATA_PMP_GSCR_ERROR = 32,
	271	SATA_PMP_GSCR_ERROR_EN = 33,
	272	SATA_PMP_GSCR_FEAT = 64,
	273	SATA_PMP_GSCR_FEAT_EN = 96,
	274
	275	SATA_PMP_PSCR_STATUS = 0,
	276	SATA_PMP_PSCR_ERROR = 1,
	277	SATA_PMP_PSCR_CONTROL = 2,
	278
	279	SATA_PMP_FEAT_BIST = (1 << 0),
	280	SATA_PMP_FEAT_PMREQ = (1 << 1),
	281	SATA_PMP_FEAT_DYNSSC = (1 << 2),
	282	SATA_PMP_FEAT_NOTIFY = (1 << 3),
	283
	284	/* cable types */
	285	ATA_CBL_NONE = 0,
	286	ATA_CBL_PATA40 = 1,
	287	ATA_CBL_PATA80 = 2,
	288	ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
	289	ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
	290	ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
	291	ATA_CBL_SATA = 6,
	292
	293	/* SATA Status and Control Registers */
	294	SCR_STATUS = 0,
	295	SCR_ERROR = 1,
	296	SCR_CONTROL = 2,
	297	SCR_ACTIVE = 3,
	298	SCR_NOTIFICATION = 4,
299
300	/* SError bits */
301	SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
302	SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
303	SERR_DATA = (1 << 8), /* unrecovered data error */
304	SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
305	SERR_PROTOCOL = (1 << 10), /* protocol violation */
306	SERR_INTERNAL = (1 << 11), /* host internal error */
307	SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
308	SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
309	SERR_COMM_WAKE = (1 << 18), /* Comm wake */
310	SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
311	SERR_DISPARITY = (1 << 20), /* Disparity */
312	SERR_CRC = (1 << 21), /* CRC error */
313	SERR_HANDSHAKE = (1 << 22), /* Handshake error */
314	SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
315	SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
316	SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
317	SERR_DEV_XCHG = (1 << 26), /* device exchanged */
318
319	/* struct ata_taskfile flags */
320	ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
321	ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
322	ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
323	ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
324	ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
325	ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
326	ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
327
328	/* protocol flags */
329	ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
330	ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
331	ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO \| ATA_PROT_FLAG_DMA,
332	ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
333	ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
ffc664e8 DL	334	};
ffc664e8 DL	335
24b44844 DL	336	enum ata_tf_protocols {
	337	/* ATA taskfile protocols */
	338	ATA_PROT_UNKNOWN, /* unknown/invalid */
ffc664e8 DL	339	ATA_PROT_NODATA, /* no data */
	340	ATA_PROT_PIO, /* PIO data xfer */
	341	ATA_PROT_DMA, /* DMA */
	342	ATA_PROT_NCQ, /* NCQ */
24b44844 DL	343	ATAPI_PROT_NODATA, /* packet command, no data */
	344	ATAPI_PROT_PIO, /* packet command, PIO data xfer*/
	345	ATAPI_PROT_DMA, /* packet command with special DMA sauce */
	346	};
	347
	348	enum ata_ioctls {
	349	ATA_IOC_GET_IO32 = 0x309,
	350	ATA_IOC_SET_IO32 = 0x324,
ffc664e8 DL	351	};
	352
	353	enum ata_dev_typed {
	354	ATA_DEV_ATA, /* ATA device */
	355	ATA_DEV_ATAPI, /* ATAPI device */
	356	ATA_DEV_PMP, /* Port Multiplier Port */
	357	ATA_DEV_UNKNOWN, /* unknown */
	358	};
	359
24b44844 DL	360	struct ata_taskfile {
	361	unsigned long flags; /* ATA_TFLAG_xxx */
	362	u8 protocol; /* ATA_PROT_xxx */
ffc664e8	363
24b44844	364	u8 ctl; /* control reg */
ffc664e8	365
24b44844 DL	366	u8 hob_feature; /* additional data */
	367	u8 hob_nsect; /* to support LBA48 */
	368	u8 hob_lbal;
	369	u8 hob_lbam;
	370	u8 hob_lbah;
ffc664e8	371
24b44844 DL	372	u8 feature;
	373	u8 nsect;
	374	u8 lbal;
	375	u8 lbam;
	376	u8 lbah;
ffc664e8	377
24b44844	378	u8 device;
ffc664e8	379
24b44844	380	u8 command; /* IO operation */
ffc664e8 DL	381	};
ffc664e8 DL	382
24b44844 DL	383	/*
	384	* protocol tests
	385	*/
	386	static inline unsigned int ata_prot_flags(u8 prot)
	387	{
	388	switch (prot) {
	389	case ATA_PROT_NODATA:
	390	return 0;
	391	case ATA_PROT_PIO:
	392	return ATA_PROT_FLAG_PIO;
	393	case ATA_PROT_DMA:
	394	return ATA_PROT_FLAG_DMA;
	395	case ATA_PROT_NCQ:
	396	return ATA_PROT_FLAG_DMA \| ATA_PROT_FLAG_NCQ;
	397	case ATAPI_PROT_NODATA:
	398	return ATA_PROT_FLAG_ATAPI;
	399	case ATAPI_PROT_PIO:
	400	return ATA_PROT_FLAG_ATAPI \| ATA_PROT_FLAG_PIO;
	401	case ATAPI_PROT_DMA:
	402	return ATA_PROT_FLAG_ATAPI \| ATA_PROT_FLAG_DMA;
	403	}
	404	return 0;
	405	}
	406
	407	static inline int ata_is_atapi(u8 prot)
	408	{
	409	return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
	410	}
	411
	412	static inline int ata_is_nodata(u8 prot)
	413	{
	414	return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
	415	}
	416
	417	static inline int ata_is_pio(u8 prot)
	418	{
	419	return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
	420	}
	421
	422	static inline int ata_is_dma(u8 prot)
	423	{
	424	return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
	425	}
	426
	427	static inline int ata_is_ncq(u8 prot)
	428	{
	429	return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
	430	}
	431
	432	static inline int ata_is_data(u8 prot)
	433	{
	434	return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
	435	}
	436
	437	/*
	438	* id tests
	439	*/
ffc664e8	440	#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
ffc664e8 DL	441	#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
	442	#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
	443	#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
	444	#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
24b44844 DL	445	#define ata_id_removeable(id) ((id)[0] & (1 << 7))
	446	#define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
	447	#define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
ffc664e8	448
d049cc7f WD	449	#define ata_id_u32(id,n) \
	450	(((u32) (id)[(n) + 1] << 16) \| ((u32) (id)[(n)]))
	451	#define ata_id_u64(id,n) \
	452	( ((u64) (id)[(n) + 3] << 48) \| \
	453	((u64) (id)[(n) + 2] << 32) \| \
	454	((u64) (id)[(n) + 1] << 16) \| \
	455	((u64) (id)[(n) + 0]) )
ffc664e8	456
24b44844 DL	457	#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
	458
	459	static inline int ata_id_has_fua(const u16 *id)
	460	{
	461	if ((id[84] & 0xC000) != 0x4000)
	462	return 0;
	463	return id[84] & (1 << 6);
	464	}
	465
	466	static inline int ata_id_has_flush(const u16 *id)
	467	{
	468	if ((id[83] & 0xC000) != 0x4000)
	469	return 0;
	470	return id[83] & (1 << 12);
	471	}
	472
	473	static inline int ata_id_has_flush_ext(const u16 *id)
	474	{
	475	if ((id[83] & 0xC000) != 0x4000)
	476	return 0;
	477	return id[83] & (1 << 13);
	478	}
	479
	480	static inline int ata_id_has_lba48(const u16 *id)
	481	{
	482	if ((id[83] & 0xC000) != 0x4000)
	483	return 0;
	484	if (!ata_id_u64(id, 100))
	485	return 0;
	486	return id[83] & (1 << 10);
	487	}
	488
	489	static inline int ata_id_hpa_enabled(const u16 *id)
	490	{
	491	/* Yes children, word 83 valid bits cover word 82 data */
	492	if ((id[83] & 0xC000) != 0x4000)
	493	return 0;
	494	/* And 87 covers 85-87 */
	495	if ((id[87] & 0xC000) != 0x4000)
	496	return 0;
	497	/* Check command sets enabled as well as supported */
	498	if ((id[85] & ( 1 << 10)) == 0)
	499	return 0;
	500	return id[82] & (1 << 10);
	501	}
	502
	503	static inline int ata_id_has_wcache(const u16 *id)
	504	{
	505	/* Yes children, word 83 valid bits cover word 82 data */
	506	if ((id[83] & 0xC000) != 0x4000)
	507	return 0;
	508	return id[82] & (1 << 5);
	509	}
	510
	511	static inline int ata_id_has_pm(const u16 *id)
	512	{
	513	if ((id[83] & 0xC000) != 0x4000)
	514	return 0;
	515	return id[82] & (1 << 3);
	516	}
	517
	518	static inline int ata_id_rahead_enabled(const u16 *id)
	519	{
	520	if ((id[87] & 0xC000) != 0x4000)
521	return 0;
522	return id[85] & (1 << 6);
523	}
524
525	static inline int ata_id_wcache_enabled(const u16 *id)
526	{
527	if ((id[87] & 0xC000) != 0x4000)
528	return 0;
529	return id[85] & (1 << 5);
530	}
ffc664e8 DL	531
	532	static inline unsigned int ata_id_major_version(const u16 *id)
	533	{
	534	unsigned int mver;
	535
	536	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
	537	return 0;
	538
	539	for (mver = 14; mver >= 1; mver--)
	540	if (id[ATA_ID_MAJOR_VER] & (1 << mver))
	541	break;
	542	return mver;
	543	}
	544
	545	static inline int ata_id_is_sata(const u16 *id)
	546	{
	547	return ata_id_major_version(id) >= 5 && id[93] == 0;
	548	}
	549
24b44844 DL	550	static inline int ata_id_has_tpm(const u16 *id)
	551	{
	552	/* The TPM bits are only valid on ATA8 */
	553	if (ata_id_major_version(id) < 8)
	554	return 0;
	555	if ((id[48] & 0xC000) != 0x4000)
	556	return 0;
	557	return id[48] & (1 << 0);
	558	}
	559
	560	static inline int ata_id_has_dword_io(const u16 *id)
	561	{
	562	/* ATA 8 reuses this flag for "trusted" computing */
	563	if (ata_id_major_version(id) > 7)
	564	return 0;
	565	if (id[48] & (1 << 0))
	566	return 1;
	567	return 0;
	568	}
	569
	570	static inline int ata_id_current_chs_valid(const u16 *id)
	571	{
	572	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
	573	has not been issued to the device then the values of
	574	id[54] to id[56] are vendor specific. */
	575	return (id[53] & 0x01) && /* Current translation valid */
	576	id[54] && /* cylinders in current translation */
	577	id[55] && /* heads in current translation */
	578	id[55] <= 16 &&
	579	id[56]; /* sectors in current translation */
	580	}
	581
	582	static inline int ata_id_is_cfa(const u16 *id)
	583	{
	584	u16 v = id[0];
	585	if (v == 0x848A) /* Standard CF */
	586	return 1;
	587	/* Could be CF hiding as standard ATA */
	588	if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
	589	(id[82] & ( 1 << 2)))
	590	return 1;
	591	return 0;
	592	}
	593
	594	static inline int ata_drive_40wire(const u16 *dev_id)
	595	{
	596	if (ata_id_is_sata(dev_id))
	597	return 0; /* SATA */
	598	if ((dev_id[93] & 0xE000) == 0x6000)
	599	return 0; /* 80 wire */
	600	return 1;
	601	}
	602
	603	static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
	604	{
	605	if ((dev_id[93] & 0x2000) == 0x2000)
	606	return 0; /* 80 wire */
	607	return 1;
	608	}
	609
	610	static inline int atapi_cdb_len(const u16 *dev_id)
	611	{
	612	u16 tmp = dev_id[0] & 0x3;
	613	switch (tmp) {
614	case 0: return 12;
615	case 1: return 16;
616	default: return -1;
617	}
618	}
619
620	static inline int atapi_command_packet_set(const u16 *dev_id)
621	{
622	return (dev_id[0] >> 8) & 0x1f;
623	}
624
625	static inline int atapi_id_dmadir(const u16 *dev_id)
626	{
627	return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
628	}
629
630	static inline int is_multi_taskfile(struct ata_taskfile *tf)
631	{
632	return (tf->command == ATA_CMD_READ_MULTI) \|\|
633	(tf->command == ATA_CMD_WRITE_MULTI) \|\|
634	(tf->command == ATA_CMD_READ_MULTI_EXT) \|\|
635	(tf->command == ATA_CMD_WRITE_MULTI_EXT) \|\|
636	(tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
637	}
638
639	static inline int ata_ok(u8 status)
640	{
641	return ((status & (ATA_BUSY \| ATA_DRDY \| ATA_DF \| ATA_DRQ \| ATA_ERR))
642	== ATA_DRDY);
643	}
644
645	static inline int lba_28_ok(u64 block, u32 n_block)
646	{
647	/* check the ending block number */
648	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
649	}
650
651	static inline int lba_48_ok(u64 block, u32 n_block)
652	{
653	/* check the ending block number */
654	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
655	}
656
657	#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
658	#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
659	#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
660	#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
661
ffc664e8 DL	662	u64 ata_id_n_sectors(u16 *id);
	663	u32 ata_dev_classify(u32 sig);
	664	void ata_id_c_string(const u16 id, unsigned char s,
	665	unsigned int ofs, unsigned int len);
	666	void ata_dump_id(u16 *id);
	667	void ata_swap_buf_le16(u16 *buf, unsigned int buf_words);
	668
	669	#endif /* __LIBATA_H__ */