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cd782635 TR |
1 | /* |
2 | * Copyright (c) 2009 Wind River Systems, Inc. | |
3 | * Tom Rix <Tom.Rix at windriver.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License as | |
7 | * published by the Free Software Foundation; either version 2 of | |
8 | * the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
18 | * MA 02111-1307 USA | |
19 | * | |
2c155130 TR |
20 | * twl4030_power_reset_init is derived from code on omapzoom, |
21 | * git://git.omapzoom.com/repo/u-boot.git | |
cd782635 TR |
22 | * |
23 | * Copyright (C) 2007-2009 Texas Instruments, Inc. | |
2c155130 TR |
24 | * |
25 | * twl4030_power_init is from cpu/omap3/common.c, power_init_r | |
26 | * | |
27 | * (C) Copyright 2004-2008 | |
28 | * Texas Instruments, <www.ti.com> | |
29 | * | |
30 | * Author : | |
31 | * Sunil Kumar <sunilsaini05 at gmail.com> | |
32 | * Shashi Ranjan <shashiranjanmca05 at gmail.com> | |
33 | * | |
34 | * Derived from Beagle Board and 3430 SDP code by | |
35 | * Richard Woodruff <r-woodruff2 at ti.com> | |
36 | * Syed Mohammed Khasim <khasim at ti.com> | |
37 | * | |
cd782635 TR |
38 | */ |
39 | ||
40 | #include <twl4030.h> | |
41 | ||
42 | /* | |
43 | * Power Reset | |
44 | */ | |
45 | void twl4030_power_reset_init(void) | |
46 | { | |
47 | u8 val = 0; | |
48 | if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, &val, | |
49 | TWL4030_PM_MASTER_P1_SW_EVENTS)) { | |
50 | printf("Error:TWL4030: failed to read the power register\n"); | |
51 | printf("Could not initialize hardware reset\n"); | |
52 | } else { | |
53 | val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON; | |
54 | if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, val, | |
55 | TWL4030_PM_MASTER_P1_SW_EVENTS)) { | |
56 | printf("Error:TWL4030: failed to write the power register\n"); | |
57 | printf("Could not initialize hardware reset\n"); | |
58 | } | |
59 | } | |
60 | } | |
61 | ||
2c155130 | 62 | /* |
5a0a82f4 | 63 | * Set Device Group and Voltage |
2c155130 | 64 | */ |
5a0a82f4 SS |
65 | void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, |
66 | u8 dev_grp, u8 dev_grp_sel) | |
67 | { | |
61712bca | 68 | int ret; |
5a0a82f4 SS |
69 | |
70 | /* Select the Voltage */ | |
61712bca | 71 | ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_val, |
5a0a82f4 | 72 | vsel_reg); |
61712bca | 73 | if (ret != 0) { |
dfe36109 | 74 | printf("Could not write vsel to reg %02x (%d)\n", |
61712bca GI |
75 | vsel_reg, ret); |
76 | return; | |
77 | } | |
78 | ||
79 | /* Select the Device Group (enable the supply if dev_grp_sel != 0) */ | |
80 | ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp_sel, | |
81 | dev_grp); | |
82 | if (ret != 0) | |
dfe36109 | 83 | printf("Could not write grp_sel to reg %02x (%d)\n", |
61712bca | 84 | dev_grp, ret); |
5a0a82f4 | 85 | } |
2c155130 TR |
86 | |
87 | void twl4030_power_init(void) | |
88 | { | |
2c155130 | 89 | /* set VAUX3 to 2.8V */ |
5a0a82f4 SS |
90 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED, |
91 | TWL4030_PM_RECEIVER_VAUX3_VSEL_28, | |
92 | TWL4030_PM_RECEIVER_VAUX3_DEV_GRP, | |
93 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
2c155130 TR |
94 | |
95 | /* set VPLL2 to 1.8V */ | |
5a0a82f4 SS |
96 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED, |
97 | TWL4030_PM_RECEIVER_VPLL2_VSEL_18, | |
98 | TWL4030_PM_RECEIVER_VPLL2_DEV_GRP, | |
99 | TWL4030_PM_RECEIVER_DEV_GRP_ALL); | |
2c155130 TR |
100 | |
101 | /* set VDAC to 1.8V */ | |
5a0a82f4 SS |
102 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED, |
103 | TWL4030_PM_RECEIVER_VDAC_VSEL_18, | |
104 | TWL4030_PM_RECEIVER_VDAC_DEV_GRP, | |
105 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
2c155130 TR |
106 | } |
107 | ||
fccc0fca TR |
108 | void twl4030_power_mmc_init(void) |
109 | { | |
528cdcaa | 110 | /* Set VMMC1 to 3.15 Volts */ |
5a0a82f4 | 111 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED, |
528cdcaa | 112 | TWL4030_PM_RECEIVER_VMMC1_VSEL_32, |
5a0a82f4 SS |
113 | TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, |
114 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
fccc0fca | 115 | } |