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54e999a3 PW |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Written-by: Prafulla Wadaskar <[email protected]> | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
54e999a3 PW |
7 | */ |
8 | ||
9 | /* | |
10 | * This file contains Marvell Board Specific common defincations. | |
11 | * This file should be included in board config header file. | |
12 | * | |
13 | * It supports common definations for Kirkwood platform | |
14 | * TBD: support for Orion5X platforms | |
15 | */ | |
16 | ||
17 | #ifndef _MV_COMMON_H | |
18 | #define _MV_COMMON_H | |
19 | ||
20 | /* | |
21 | * High Level Configuration Options (easy to change) | |
22 | */ | |
23 | #define CONFIG_MARVELL 1 | |
54e999a3 | 24 | |
8e14ed85 PW |
25 | /* |
26 | * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h | |
27 | */ | |
28 | #ifndef CONFIG_SYS_TEXT_BASE | |
29 | #define CONFIG_SYS_TEXT_BASE 0x00600000 | |
30 | #endif /* CONFIG_SYS_TEXT_BASE */ | |
31 | ||
0b20ed76 | 32 | /* additions for new ARM relocation support */ |
8e14ed85 | 33 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
0b20ed76 | 34 | |
54e999a3 PW |
35 | /* |
36 | * CLKs configurations | |
37 | */ | |
54e999a3 PW |
38 | |
39 | /* | |
40 | * NS16550 Configuration | |
41 | */ | |
42 | #define CONFIG_SYS_NS16550 | |
43 | #define CONFIG_SYS_NS16550_SERIAL | |
44 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
45 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK | |
8e14ed85 | 46 | #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE |
54e999a3 PW |
47 | |
48 | /* | |
49 | * Serial Port configuration | |
50 | * The following definitions let you select what serial you want to use | |
51 | * for your console driver. | |
52 | */ | |
53 | ||
54 | #define CONFIG_CONS_INDEX 1 /*Console on UART0 */ | |
55 | #define CONFIG_BAUDRATE 115200 | |
56 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ | |
57 | 115200,230400, 460800, 921600 } | |
58 | /* auto boot */ | |
59 | #define CONFIG_BOOTDELAY 3 /* default enable autoboot */ | |
b81d0ea7 | 60 | #define CONFIG_PREBOOT |
54e999a3 | 61 | |
ae68763b KS |
62 | #define CONFIG_OF_LIBFDT /* Device tree support */ |
63 | ||
54e999a3 PW |
64 | /* |
65 | * For booting Linux, the board info and command line data | |
66 | * have to be in the first 8 MB of memory, since this is | |
67 | * the maximum mapped by the Linux kernel during initialization. | |
68 | */ | |
69 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
70 | #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ | |
71 | #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ | |
72 | ||
54e999a3 PW |
73 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
74 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
75 | +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ | |
76 | ||
54e999a3 PW |
77 | /* |
78 | * Size of malloc() pool | |
79 | */ | |
bfbfab94 | 80 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */ |
54e999a3 PW |
81 | |
82 | /* | |
83 | * Other required minimal configurations | |
84 | */ | |
85 | #define CONFIG_SYS_LONGHELP | |
86 | #define CONFIG_AUTO_COMPLETE | |
87 | #define CONFIG_CMDLINE_EDITING | |
88 | #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ | |
89 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ | |
90 | #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ | |
844f07d8 | 91 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */ |
54e999a3 | 92 | #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ |
54e999a3 | 93 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
8e14ed85 PW |
94 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
95 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ | |
54e999a3 | 96 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
5a9749ee | 97 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
54e999a3 | 98 | |
2f795ac7 SG |
99 | /* ====> Include platform Common Definitions */ |
100 | #include <asm/arch/config.h> | |
101 | ||
8e14ed85 PW |
102 | /* |
103 | * DRAM Banks configuration, Custom config can be done in <board>.h | |
104 | */ | |
105 | #ifndef CONFIG_NR_DRAM_BANKS | |
106 | #define CONFIG_NR_DRAM_BANKS CONFIG_NR_DRAM_BANKS_MAX | |
107 | #else | |
108 | #if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX) | |
109 | #error CONFIG_NR_DRAM_BANKS Configurated more than available | |
110 | #endif | |
111 | #endif /* CONFIG_NR_DRAM_BANKS */ | |
112 | ||
2f795ac7 | 113 | /* ====> Include driver Common Definitions */ |
54e999a3 | 114 | /* |
cf946c6d | 115 | * Common NAND configuration |
54e999a3 | 116 | */ |
cf946c6d LW |
117 | #ifdef CONFIG_CMD_NAND |
118 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
cf946c6d LW |
119 | #endif |
120 | ||
121 | /* | |
122 | * Common SPI Flash configuration | |
123 | */ | |
124 | #ifdef CONFIG_CMD_SF | |
cf946c6d LW |
125 | #define CONFIG_SPI_FLASH_MACRONIX 1 |
126 | #endif | |
54e999a3 PW |
127 | |
128 | /* | |
cf946c6d | 129 | * Common USB/EHCI configuration |
54e999a3 PW |
130 | */ |
131 | #ifdef CONFIG_CMD_USB | |
132 | #define CONFIG_USB_EHCI /* Enable EHCI USB support */ | |
54e999a3 PW |
133 | #define CONFIG_USB_STORAGE |
134 | #define CONFIG_DOS_PARTITION | |
135 | #define CONFIG_ISO_PARTITION | |
136 | #define CONFIG_SUPPORT_VFAT | |
137 | #endif /* CONFIG_CMD_USB */ | |
138 | ||
54e999a3 PW |
139 | /* |
140 | * File system | |
141 | */ | |
cf946c6d | 142 | #ifdef CONFIG_SYS_MVFS |
54e999a3 PW |
143 | #define CONFIG_CMD_EXT2 |
144 | #define CONFIG_CMD_JFFS2 | |
145 | #define CONFIG_CMD_FAT | |
146 | #define CONFIG_CMD_UBI | |
147 | #define CONFIG_CMD_UBIFS | |
148 | #define CONFIG_RBTREE | |
149 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
150 | #define CONFIG_MTD_PARTITIONS | |
151 | #define CONFIG_CMD_MTDPARTS | |
152 | #define CONFIG_LZO | |
cf946c6d | 153 | #endif |
54e999a3 PW |
154 | |
155 | #endif /* _MV_COMMON_H */ |