[J-u-boot.git] / board / emk / top5200 / flash.c

/*
 * (C) Copyright 2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * (C) Copyright 2003
 * Reinhard Meyer, EMK Elektronik GmbH, [email protected]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>

flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/

typedef unsigned char FLASH_PORT_WIDTH;
typedef volatile unsigned char FLASH_PORT_WIDTHV;
#define	FLASH_ID_MASK	0xFF

#define FPW	FLASH_PORT_WIDTH
#define FPWV	FLASH_PORT_WIDTHV

#define FLASH_CYCLE1	0x0aaa
#define FLASH_CYCLE2	0x0555

/*-----------------------------------------------------------------------
 * Functions
 */
static ulong flash_get_size(FPWV *addr, flash_info_t *info);
static void flash_reset(flash_info_t *info);
static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
static flash_info_t *flash_get_info(ulong base);

/*-----------------------------------------------------------------------
 * flash_init()
 *
 * sets up flash_info and returns size of FLASH (bytes)
 */
unsigned long flash_init (void)
{
	unsigned long size = 0;
	int i = 0;
	extern void flash_preinit(void);
	extern void flash_afterinit(uint, ulong, ulong);
	ulong flashbase = CFG_FLASH_BASE;

	flash_preinit();

	/* There is only ONE FLASH device */
	memset(&flash_info[i], 0, sizeof(flash_info_t));
	flash_info[i].size =
			flash_get_size((FPW *)flashbase, &flash_info[i]);
	size += flash_info[i].size;

#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
	/* monitor protection ON by default */
	flash_protect(FLAG_PROTECT_SET,
		      CFG_MONITOR_BASE,
		      CFG_MONITOR_BASE+monitor_flash_len-1,
		      flash_get_info(CFG_MONITOR_BASE));
#endif

#ifdef	CFG_ENV_IS_IN_FLASH
	/* ENV protection ON by default */
	flash_protect(FLAG_PROTECT_SET,
		      CFG_ENV_ADDR,
		      CFG_ENV_ADDR+CFG_ENV_SIZE-1,
		      flash_get_info(CFG_ENV_ADDR));
#endif


	flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
	return size ? size : 1;
}

/*-----------------------------------------------------------------------
 */
static void flash_reset(flash_info_t *info)
{
	FPWV *base = (FPWV *)(info->start[0]);

	/* Put FLASH back in read mode */
	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
		*base = (FPW)0x00FF00FF;	/* Intel Read Mode */
	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
		*base = (FPW)0x00F000F0;	/* AMD Read Mode */
}

/*-----------------------------------------------------------------------
 */

static flash_info_t *flash_get_info(ulong base)
{
	int i;
	flash_info_t * info;

	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
		info = & flash_info[i];
		if (info->size &&
			info->start[0] <= base && base <= info->start[0] + info->size - 1)
			break;
	}

	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
}

/*-----------------------------------------------------------------------
 */

void flash_print_info (flash_info_t *info)
{
	int i;
	uchar *boottype;
	uchar *bootletter;
	uchar *fmt;
	uchar botbootletter[] = "B";
	uchar topbootletter[] = "T";
	uchar botboottype[] = "bottom boot sector";
	uchar topboottype[] = "top boot sector";

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_AMD:	printf ("AMD ");		break;
#if 0
	case FLASH_MAN_BM:	printf ("BRIGHT MICRO ");	break;
	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
	case FLASH_MAN_SST:	printf ("SST ");		break;
	case FLASH_MAN_STM:	printf ("STM ");		break;
	case FLASH_MAN_INTEL:	printf ("INTEL ");		break;
#endif
	default:		printf ("Unknown Vendor ");	break;
	}

	/* check for top or bottom boot, if it applies */
	if (info->flash_id & FLASH_BTYPE) {
		boottype = botboottype;
		bootletter = botbootletter;
	}
	else {
		boottype = topboottype;
		bootletter = topbootletter;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_AM160T:
	case FLASH_AM160B:
		fmt = "29LV160%s (16 Mbit, %s)\n";
		break;
	case FLASH_AMDLV065D:
		fmt = "29LV065 (64 Mbit, uniform sectors)\n";
		break;
	default:
		fmt = "Unknown Chip Type\n";
		break;
	}

	printf (fmt, bootletter, boottype);

	printf ("  Size: %ld MB in %d Sectors\n",
		info->size >> 20,
		info->sector_count);

	printf ("  Sector Start Addresses:");

	for (i=0; i<info->sector_count; ++i) {
		if ((i % 5) == 0) {
			printf ("\n   ");
		}

		printf (" %08lX%s", info->start[i],
			info->protect[i] ? " (RO)" : "     ");
	}

	printf ("\n");
}

/*-----------------------------------------------------------------------
 */

/*
 * The following code cannot be run from FLASH!
 */

ulong flash_get_size (FPWV *addr, flash_info_t *info)
{
	int		i;
	ulong	offset;

	/* Write auto select command: read Manufacturer ID */
	/* Write auto select command sequence and test FLASH answer */
	addr[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* for AMD, Intel ignores this */
	addr[FLASH_CYCLE2] = (FPW)0x00550055;	/* for AMD, Intel ignores this */
	addr[FLASH_CYCLE1] = (FPW)0x00900090;	/* selects Intel or AMD */

	/* The manufacturer codes are only 1 byte, so just use 1 byte.
	 * This works for any bus width and any FLASH device width.
	 */
	udelay(100);
	switch (addr[0] & 0xff) {

	case (uchar)AMD_MANUFACT:
		info->flash_id = FLASH_MAN_AMD;
		break;

#if 0
	case (uchar)INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;
#endif

	default:
		printf ("unknown vendor=%x ", addr[0] & 0xff);
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		break;
	}

	/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
	if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) {

	case (FPW)AMD_ID_LV160B:
		info->flash_id += FLASH_AM160B;
		info->sector_count = 35;
		info->size = 0x00200000;
#ifdef CFG_LOWBOOT
		offset = 0;
#else
		offset = 0x00e00000;
#endif
		info->start[0] = (ulong)addr + offset;
		info->start[1] = (ulong)addr + offset + 0x4000;
		info->start[2] = (ulong)addr + offset + 0x6000;
		info->start[3] = (ulong)addr + offset + 0x8000;
		for (i = 4; i < info->sector_count; i++)
		{
			info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
		}
		break;

	case (FPW)AMD_ID_LV065D:
		info->flash_id += FLASH_AMDLV065D;
		info->sector_count = 128;
		info->size = 0x00800000;
#ifdef CFG_LOWBOOT
		offset = 0;
#else
		offset = 0x00800000;
#endif
		for( i = 0; i < info->sector_count; i++ )
			info->start[i] = (ulong)addr + offset + (i * 0x10000);
		break;				/* => 8 or 16 MB	*/

	default:
		printf ("unknown AMD device=%x ", (FPW)addr[2]);
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		return (0);			/* => no or unknown flash */
	}

	/* Put FLASH back in read mode */
	flash_reset(info);

	return (info->size);
}

/*-----------------------------------------------------------------------
 */

int	flash_erase (flash_info_t *info, int s_first, int s_last)
{
	FPWV *addr;
	int flag, prot, sect;
	int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
	ulong start, now, last;
	int rcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_AMDLV065D:
		break;
	case FLASH_UNKNOWN:
	default:
		printf ("Can't erase unknown flash type %08lx - aborted\n",
			info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect=s_first; sect<=s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("\n");
	}

	last  = get_timer(0);

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect<=s_last && rcode == 0; sect++) {

		if (info->protect[sect] != 0)	/* protected, skip it */
			continue;

		/* Disable interrupts which might cause a timeout here */
		flag = disable_interrupts();

		addr = (FPWV *)(info->start[sect]);
		if (intel) {
			*addr = (FPW)0x00500050; /* clear status register */
			*addr = (FPW)0x00200020; /* erase setup */
			*addr = (FPW)0x00D000D0; /* erase confirm */
		}
		else {
			/* must be AMD style if not Intel */
			FPWV *base;		/* first address in bank */

			base = (FPWV *)(info->start[0]);
			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
			base[FLASH_CYCLE1] = (FPW)0x00800080;	/* erase mode */
			base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
			base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
			*addr = (FPW)0x00300030;	/* erase sector */
		}

		/* re-enable interrupts if necessary */
		if (flag)
			enable_interrupts();

		start = get_timer(0);

		/* wait at least 50us for AMD, 80us for Intel.
		 * Let's wait 1 ms.
		 */
		udelay (1000);

		while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
			if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
				printf ("Timeout\n");

				if (intel) {
					/* suspend erase	*/
					*addr = (FPW)0x00B000B0;
				}

				flash_reset(info);	/* reset to read mode */
				rcode = 1;		/* failed */
				break;
			}

			/* show that we're waiting */
			if ((get_timer(last)) > CFG_HZ) {/* every second */
				putc ('.');
				last = get_timer(0);
			}
		}

		/* show that we're waiting */
		if ((get_timer(last)) > CFG_HZ) {	/* every second */
			putc ('.');
			last = get_timer(0);
		}

		flash_reset(info);	/* reset to read mode	*/
	}

	printf (" done\n");
	return rcode;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
	FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
	int bytes;	  /* number of bytes to program in current word		*/
	int left;	  /* number of bytes left to program			*/
	int i, res;

	for (left = cnt, res = 0;
		 left > 0 && res == 0;
		 addr += sizeof(data), left -= sizeof(data) - bytes) {

		bytes = addr & (sizeof(data) - 1);
		addr &= ~(sizeof(data) - 1);

		/* combine source and destination data so can program
		 * an entire word of 16 or 32 bits
		 */
		for (i = 0; i < sizeof(data); i++) {
			data <<= 8;
			if (i < bytes || i - bytes >= left )
				data += *((uchar *)addr + i);
			else
				data += *src++;
		}

		/* write one word to the flash */
		switch (info->flash_id & FLASH_VENDMASK) {
		case FLASH_MAN_AMD:
			res = write_word_amd(info, (FPWV *)addr, data);
			break;
		default:
			/* unknown flash type, error! */
			printf ("missing or unknown FLASH type\n");
			res = 1;	/* not really a timeout, but gives error */
			break;
		}
	}

	return (res);
}

/*-----------------------------------------------------------------------
 * Write a word to Flash for AMD FLASH
 * A word is 16 or 32 bits, whichever the bus width of the flash bank
 * (not an individual chip) is.
 *
 * returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
{
	ulong start;
	int flag;
	int res = 0;	/* result, assume success	*/
	FPWV *base;		/* first address in flash bank	*/

	/* Check if Flash is (sufficiently) erased */
	if ((*dest & data) != data) {
		return (2);
	}


	base = (FPWV *)(info->start[0]);

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	base[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* unlock */
	base[FLASH_CYCLE2] = (FPW)0x00550055;	/* unlock */
	base[FLASH_CYCLE1] = (FPW)0x00A000A0;	/* selects program mode */

	*dest = data;		/* start programming the data	*/

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	start = get_timer (0);

	/* data polling for D7 */
	while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
			*dest = (FPW)0x00F000F0;	/* reset bank */
			res = 1;
		}
	}

	return (res);
}
Commit	Line	Data
c1896004 WD	1	/*
	2	* (C) Copyright 2003
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
d4ca31c4 WD	5	* (C) Copyright 2003
	6	* Reinhard Meyer, EMK Elektronik GmbH, [email protected]
	7	*
c1896004 WD	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#include <common.h>
	28
	29	flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
	30
	31	typedef unsigned char FLASH_PORT_WIDTH;
	32	typedef volatile unsigned char FLASH_PORT_WIDTHV;
	33	#define FLASH_ID_MASK 0xFF
	34
	35	#define FPW FLASH_PORT_WIDTH
	36	#define FPWV FLASH_PORT_WIDTHV
	37
	38	#define FLASH_CYCLE1 0x0aaa
	39	#define FLASH_CYCLE2 0x0555
	40
	41	/*-----------------------------------------------------------------------
	42	* Functions
	43	*/
	44	static ulong flash_get_size(FPWV addr, flash_info_t info);
	45	static void flash_reset(flash_info_t *info);
	46	static int write_word_amd(flash_info_t info, FPWV dest, FPW data);
	47	static flash_info_t *flash_get_info(ulong base);
	48
	49	/*-----------------------------------------------------------------------
	50	* flash_init()
	51	*
	52	* sets up flash_info and returns size of FLASH (bytes)
	53	*/
	54	unsigned long flash_init (void)
	55	{
	56	unsigned long size = 0;
d4ca31c4	57	int i = 0;
c1896004 WD	58	extern void flash_preinit(void);
	59	extern void flash_afterinit(uint, ulong, ulong);
	60	ulong flashbase = CFG_FLASH_BASE;
	61
	62	flash_preinit();
	63
	64	/* There is only ONE FLASH device */
d4ca31c4 WD	65	memset(&flash_info[i], 0, sizeof(flash_info_t));
	66	flash_info[i].size =
	67	flash_get_size((FPW *)flashbase, &flash_info[i]);
	68	size += flash_info[i].size;
c1896004 WD	69
	70	#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
	71	/* monitor protection ON by default */
	72	flash_protect(FLAG_PROTECT_SET,
	73	CFG_MONITOR_BASE,
	74	CFG_MONITOR_BASE+monitor_flash_len-1,
	75	flash_get_info(CFG_MONITOR_BASE));
	76	#endif
	77
	78	#ifdef CFG_ENV_IS_IN_FLASH
	79	/* ENV protection ON by default */
	80	flash_protect(FLAG_PROTECT_SET,
	81	CFG_ENV_ADDR,
	82	CFG_ENV_ADDR+CFG_ENV_SIZE-1,
	83	flash_get_info(CFG_ENV_ADDR));
	84	#endif
	85
	86
d4ca31c4	87	flash_afterinit(i, flash_info[i].start[0], flash_info[i].size);
c1896004 WD	88	return size ? size : 1;
	89	}
	90
	91	/*-----------------------------------------------------------------------
	92	*/
	93	static void flash_reset(flash_info_t *info)
	94	{
	95	FPWV base = (FPWV )(info->start[0]);
	96
	97	/* Put FLASH back in read mode */
	98	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
	99	base = (FPW)0x00FF00FF; / Intel Read Mode */
	100	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
	101	base = (FPW)0x00F000F0; / AMD Read Mode */
	102	}
	103
	104	/*-----------------------------------------------------------------------
	105	*/
	106
	107	static flash_info_t *flash_get_info(ulong base)
	108	{
	109	int i;
	110	flash_info_t * info;
	111
	112	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
	113	info = & flash_info[i];
	114	if (info->size &&
	115	info->start[0] <= base && base <= info->start[0] + info->size - 1)
	116	break;
	117	}
	118
	119	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
	120	}
	121
	122	/*-----------------------------------------------------------------------
	123	*/
	124
	125	void flash_print_info (flash_info_t *info)
	126	{
	127	int i;
	128	uchar *boottype;
	129	uchar *bootletter;
	130	uchar *fmt;
	131	uchar botbootletter[] = "B";
	132	uchar topbootletter[] = "T";
	133	uchar botboottype[] = "bottom boot sector";
	134	uchar topboottype[] = "top boot sector";
	135
	136	if (info->flash_id == FLASH_UNKNOWN) {
	137	printf ("missing or unknown FLASH type\n");
	138	return;
	139	}
	140
	141	switch (info->flash_id & FLASH_VENDMASK) {
	142	case FLASH_MAN_AMD: printf ("AMD "); break;
	143	#if 0
	144	case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
	145	case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
	146	case FLASH_MAN_SST: printf ("SST "); break;
	147	case FLASH_MAN_STM: printf ("STM "); break;
	148	case FLASH_MAN_INTEL: printf ("INTEL "); break;
	149	#endif
	150	default: printf ("Unknown Vendor "); break;
	151	}
152
153	/* check for top or bottom boot, if it applies */
154	if (info->flash_id & FLASH_BTYPE) {
155	boottype = botboottype;
156	bootletter = botbootletter;
d4ca31c4 WD	157	}
d4ca31c4 WD	158	else {
c1896004 WD	159	boottype = topboottype;
	160	bootletter = topbootletter;
	161	}
	162
	163	switch (info->flash_id & FLASH_TYPEMASK) {
	164	case FLASH_AM160T:
	165	case FLASH_AM160B:
	166	fmt = "29LV160%s (16 Mbit, %s)\n";
	167	break;
	168	case FLASH_AMDLV065D:
	169	fmt = "29LV065 (64 Mbit, uniform sectors)\n";
	170	break;
	171	default:
	172	fmt = "Unknown Chip Type\n";
	173	break;
	174	}
	175
	176	printf (fmt, bootletter, boottype);
	177
	178	printf (" Size: %ld MB in %d Sectors\n",
	179	info->size >> 20,
	180	info->sector_count);
	181
	182	printf (" Sector Start Addresses:");
	183
	184	for (i=0; i<info->sector_count; ++i) {
	185	if ((i % 5) == 0) {
	186	printf ("\n ");
	187	}
	188
	189	printf (" %08lX%s", info->start[i],
	190	info->protect[i] ? " (RO)" : " ");
	191	}
	192
	193	printf ("\n");
	194	}
	195
	196	/*-----------------------------------------------------------------------
	197	*/
	198
	199	/*
	200	* The following code cannot be run from FLASH!
	201	*/
	202
	203	ulong flash_get_size (FPWV addr, flash_info_t info)
	204	{
	205	int i;
	206	ulong offset;
	207
	208	/* Write auto select command: read Manufacturer ID */
	209	/* Write auto select command sequence and test FLASH answer */
	210	addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
	211	addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
	212	addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
	213
	214	/* The manufacturer codes are only 1 byte, so just use 1 byte.
	215	* This works for any bus width and any FLASH device width.
	216	*/
	217	udelay(100);
	218	switch (addr[0] & 0xff) {
	219
	220	case (uchar)AMD_MANUFACT:
	221	info->flash_id = FLASH_MAN_AMD;
	222	break;
223
224	#if 0
225	case (uchar)INTEL_MANUFACT:
226	info->flash_id = FLASH_MAN_INTEL;
227	break;
228	#endif
229
230	default:
231	printf ("unknown vendor=%x ", addr[0] & 0xff);
232	info->flash_id = FLASH_UNKNOWN;
233	info->sector_count = 0;
234	info->size = 0;
235	break;
236	}
237
238	/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
239	if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) {
240
241	case (FPW)AMD_ID_LV160B:
242	info->flash_id += FLASH_AM160B;
243	info->sector_count = 35;
244	info->size = 0x00200000;
d4ca31c4 WD	245	#ifdef CFG_LOWBOOT
	246	offset = 0;
	247	#else
c1896004	248	offset = 0x00e00000;
d4ca31c4	249	#endif
c1896004 WD	250	info->start[0] = (ulong)addr + offset;
	251	info->start[1] = (ulong)addr + offset + 0x4000;
	252	info->start[2] = (ulong)addr + offset + 0x6000;
	253	info->start[3] = (ulong)addr + offset + 0x8000;
d4ca31c4 WD	254	for (i = 4; i < info->sector_count; i++)
d4ca31c4 WD	255	{
c1896004 WD	256	info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
	257	}
	258	break;
	259
	260	case (FPW)AMD_ID_LV065D:
	261	info->flash_id += FLASH_AMDLV065D;
	262	info->sector_count = 128;
	263	info->size = 0x00800000;
d4ca31c4 WD	264	#ifdef CFG_LOWBOOT
	265	offset = 0;
	266	#else
c1896004	267	offset = 0x00800000;
d4ca31c4 WD	268	#endif
d4ca31c4 WD	269	for( i = 0; i < info->sector_count; i++ )
c1896004 WD	270	info->start[i] = (ulong)addr + offset + (i * 0x10000);
	271	break; /* => 8 or 16 MB */
	272
	273	default:
	274	printf ("unknown AMD device=%x ", (FPW)addr[2]);
	275	info->flash_id = FLASH_UNKNOWN;
	276	info->sector_count = 0;
	277	info->size = 0;
	278	return (0); /* => no or unknown flash */
	279	}
	280
	281	/* Put FLASH back in read mode */
	282	flash_reset(info);
	283
	284	return (info->size);
	285	}
	286
	287	/*-----------------------------------------------------------------------
	288	*/
	289
	290	int flash_erase (flash_info_t *info, int s_first, int s_last)
	291	{
	292	FPWV *addr;
	293	int flag, prot, sect;
	294	int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL;
	295	ulong start, now, last;
	296	int rcode = 0;
	297
	298	if ((s_first < 0) \|\| (s_first > s_last)) {
	299	if (info->flash_id == FLASH_UNKNOWN) {
	300	printf ("- missing\n");
	301	} else {
	302	printf ("- no sectors to erase\n");
	303	}
	304	return 1;
	305	}
	306
	307	switch (info->flash_id & FLASH_TYPEMASK) {
	308	case FLASH_AMDLV065D:
	309	break;
	310	case FLASH_UNKNOWN:
	311	default:
	312	printf ("Can't erase unknown flash type %08lx - aborted\n",
	313	info->flash_id);
	314	return 1;
	315	}
	316
	317	prot = 0;
	318	for (sect=s_first; sect<=s_last; ++sect) {
	319	if (info->protect[sect]) {
	320	prot++;
	321	}
	322	}
	323
	324	if (prot) {
	325	printf ("- Warning: %d protected sectors will not be erased!\n",
	326	prot);
	327	} else {
	328	printf ("\n");
	329	}
	330
	331	last = get_timer(0);
	332
	333	/* Start erase on unprotected sectors */
334	for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
335
336	if (info->protect[sect] != 0) /* protected, skip it */
337	continue;
338
339	/* Disable interrupts which might cause a timeout here */
340	flag = disable_interrupts();
341
342	addr = (FPWV *)(info->start[sect]);
343	if (intel) {
344	addr = (FPW)0x00500050; / clear status register */
345	addr = (FPW)0x00200020; / erase setup */
346	addr = (FPW)0x00D000D0; / erase confirm */
347	}
348	else {
349	/* must be AMD style if not Intel */
350	FPWV base; / first address in bank */
351
352	base = (FPWV *)(info->start[0]);
353	base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
354	base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
355	base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */
356	base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
357	base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
358	addr = (FPW)0x00300030; / erase sector */
359	}
360
361	/* re-enable interrupts if necessary */
362	if (flag)
363	enable_interrupts();
364
365	start = get_timer(0);
366
367	/* wait at least 50us for AMD, 80us for Intel.
368	* Let's wait 1 ms.
369	*/
370	udelay (1000);
371
372	while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) {
373	if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
374	printf ("Timeout\n");
375
376	if (intel) {
377	/* suspend erase */
378	*addr = (FPW)0x00B000B0;
379	}
380
381	flash_reset(info); /* reset to read mode */
382	rcode = 1; /* failed */
383	break;
384	}
385
386	/* show that we're waiting */
387	if ((get_timer(last)) > CFG_HZ) {/* every second */
388	putc ('.');
389	last = get_timer(0);
390	}
391	}
392
393	/* show that we're waiting */
394	if ((get_timer(last)) > CFG_HZ) { /* every second */
395	putc ('.');
396	last = get_timer(0);
397	}
398
399	flash_reset(info); /* reset to read mode */
400	}
401
402	printf (" done\n");
403	return rcode;
404	}
405
406	/*-----------------------------------------------------------------------
407	* Copy memory to flash, returns:
408	* 0 - OK
409	* 1 - write timeout
410	* 2 - Flash not erased
411	*/
412	int write_buff (flash_info_t info, uchar src, ulong addr, ulong cnt)
413	{
414	FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
415	int bytes; /* number of bytes to program in current word */
416	int left; /* number of bytes left to program */
417	int i, res;
418
419	for (left = cnt, res = 0;
420	left > 0 && res == 0;
421	addr += sizeof(data), left -= sizeof(data) - bytes) {
422
423	bytes = addr & (sizeof(data) - 1);
424	addr &= ~(sizeof(data) - 1);
425
426	/* combine source and destination data so can program
427	* an entire word of 16 or 32 bits
428	*/
429	for (i = 0; i < sizeof(data); i++) {
430	data <<= 8;
431	if (i < bytes \|\| i - bytes >= left )
432	data += ((uchar )addr + i);
433	else
434	data += *src++;
435	}
436
437	/* write one word to the flash */
438	switch (info->flash_id & FLASH_VENDMASK) {
439	case FLASH_MAN_AMD:
440	res = write_word_amd(info, (FPWV *)addr, data);
441	break;
442	default:
443	/* unknown flash type, error! */
444	printf ("missing or unknown FLASH type\n");
445	res = 1; /* not really a timeout, but gives error */
446	break;
447	}
448	}
449
450	return (res);
451	}
452
453	/*-----------------------------------------------------------------------
454	* Write a word to Flash for AMD FLASH
455	* A word is 16 or 32 bits, whichever the bus width of the flash bank
456	* (not an individual chip) is.
457	*
458	* returns:
459	* 0 - OK
460	* 1 - write timeout
461	* 2 - Flash not erased
462	*/
463	static int write_word_amd (flash_info_t info, FPWV dest, FPW data)
464	{
465	ulong start;
466	int flag;
467	int res = 0; /* result, assume success */
468	FPWV base; / first address in flash bank */
469
470	/* Check if Flash is (sufficiently) erased */
471	if ((*dest & data) != data) {
472	return (2);
473	}
474
475
476	base = (FPWV *)(info->start[0]);
477
478	/* Disable interrupts which might cause a timeout here */
479	flag = disable_interrupts();
480
481	base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
482	base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
483	base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
484
485	dest = data; / start programming the data */
486
487	/* re-enable interrupts if necessary */
488	if (flag)
489	enable_interrupts();
490
491	start = get_timer (0);
492
493	/* data polling for D7 */
494	while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
495	if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
496	dest = (FPW)0x00F000F0; / reset bank */
497	res = 1;
498	}
499	}
500
501	return (res);
502	}