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51422665 SSM |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Configuation settings for the SAM9X60EK board. | |
4 | * | |
5 | * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries | |
6 | * | |
7 | * Author: Sandeep Sheriker M <[email protected]> | |
8 | */ | |
9 | ||
10 | #ifndef __CONFIG_H__ | |
11 | #define __CONFIG_H__ | |
12 | ||
13 | /* ARM asynchronous clock */ | |
14 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
15 | #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ | |
16 | ||
51422665 SSM |
17 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
18 | #define CONFIG_USART_ID 0 /* ignored in arm */ | |
19 | ||
51422665 SSM |
20 | /* |
21 | * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) | |
22 | * NB: in this case, USB 1.1 devices won't be recognized. | |
23 | */ | |
24 | ||
25 | /* SDRAM */ | |
26 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
27 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ | |
28 | ||
29 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
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30 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \ |
31 | GENERATED_GBL_DATA_SIZE) | |
51422665 | 32 | |
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33 | /* NAND flash */ |
34 | #ifdef CONFIG_CMD_NAND | |
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35 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
36 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
37 | #define CONFIG_SYS_NAND_MASK_ALE BIT(21) | |
38 | #define CONFIG_SYS_NAND_MASK_CLE BIT(22) | |
39 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 | |
40 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 | |
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41 | #endif |
42 | ||
51422665 SSM |
43 | #ifdef CONFIG_SD_BOOT |
44 | /* bootstrap + u-boot + env + linux in sd card */ | |
8ed15e4a TA |
45 | |
46 | #elif defined(CONFIG_NAND_BOOT) | |
47 | /* bootstrap + u-boot + env + linux in nandflash */ | |
8c04ea7c TA |
48 | |
49 | #elif defined(CONFIG_QSPI_BOOT) | |
50 | /* bootstrap + u-boot + env + linux in SPI NOR flash */ | |
51422665 SSM |
51 | #endif |
52 | ||
51422665 | 53 | #endif |