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Commit | Line | Data |
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77754408 DN |
1 | # |
2 | # (C) Copyright 2000-2003 | |
3 | # Wolfgang Denk, DENX Software Engineering, [email protected]. | |
4 | # | |
5 | # Copyright (C) 2012 Altera Corporation <www.altera.com> | |
6 | # | |
1a459660 | 7 | # SPDX-License-Identifier: GPL-2.0+ |
77754408 DN |
8 | # |
9 | ||
4ddd541d | 10 | obj-y += misc.o timer.o reset_manager.o clock_manager.o \ |
e5ad7d98 DN |
11 | fpga_manager.o board.o |
12 | ||
177ba1f9 | 13 | obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clock_manager_arria10.o \ |
caf36e1e | 14 | pinmux_arria10.o \ |
177ba1f9 | 15 | reset_manager_arria10.o |
827e6a7e | 16 | |
bd48c061 | 17 | obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o |
ca62d2e1 MV |
18 | |
19 | # QTS-generated config file wrappers | |
de778115 | 20 | obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += scan_manager.o wrap_pll_config.o \ |
4ddd541d | 21 | clock_manager_gen5.o reset_manager_gen5.o \ |
d1c559af | 22 | misc_gen5.o system_manager_gen5.o |
ca62d2e1 MV |
23 | obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o \ |
24 | wrap_sdram_config.o | |
25 | CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) | |
26 | CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR) | |
27 | CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR) | |
28 | CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR) |