[J-u-boot.git] / drivers / mmc / mmc_write.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2008, Freescale Semiconductor, Inc
 * Andy Fleming
 *
 * Based vaguely on the Linux code
 */

#include <config.h>
#include <common.h>
#include <blk.h>
#include <dm.h>
#include <part.h>
#include <div64.h>
#include <linux/math64.h>
#include "mmc_private.h"

static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
{
	struct mmc_cmd cmd;
	ulong end;
	int err, start_cmd, end_cmd;

	if (mmc->high_capacity) {
		end = start + blkcnt - 1;
	} else {
		end = (start + blkcnt - 1) * mmc->write_bl_len;
		start *= mmc->write_bl_len;
	}

	if (IS_SD(mmc)) {
		start_cmd = SD_CMD_ERASE_WR_BLK_START;
		end_cmd = SD_CMD_ERASE_WR_BLK_END;
	} else {
		start_cmd = MMC_CMD_ERASE_GROUP_START;
		end_cmd = MMC_CMD_ERASE_GROUP_END;
	}

	cmd.cmdidx = start_cmd;
	cmd.cmdarg = start;
	cmd.resp_type = MMC_RSP_R1;

	err = mmc_send_cmd(mmc, &cmd, NULL);
	if (err)
		goto err_out;

	cmd.cmdidx = end_cmd;
	cmd.cmdarg = end;

	err = mmc_send_cmd(mmc, &cmd, NULL);
	if (err)
		goto err_out;

	cmd.cmdidx = MMC_CMD_ERASE;
	cmd.cmdarg = MMC_ERASE_ARG;
	cmd.resp_type = MMC_RSP_R1b;

	err = mmc_send_cmd(mmc, &cmd, NULL);
	if (err)
		goto err_out;

	return 0;

err_out:
	puts("mmc erase failed\n");
	return err;
}

#if CONFIG_IS_ENABLED(BLK)
ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
#else
ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
#endif
{
#if CONFIG_IS_ENABLED(BLK)
	struct blk_desc *block_dev = dev_get_uclass_plat(dev);
#endif
	int dev_num = block_dev->devnum;
	int err = 0;
	u32 start_rem, blkcnt_rem;
	struct mmc *mmc = find_mmc_device(dev_num);
	lbaint_t blk = 0, blk_r = 0;
	int timeout_ms = 1000;

	if (!mmc)
		return -1;

	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num,
				       block_dev->hwpart);
	if (err < 0)
		return -1;

	/*
	 * We want to see if the requested start or total block count are
	 * unaligned.  We discard the whole numbers and only care about the
	 * remainder.
	 */
	err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
	err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
	if (start_rem || blkcnt_rem)
		printf("\n\nCaution! Your devices Erase group is 0x%x\n"
		       "The erase range would be change to "
		       "0x" LBAF "~0x" LBAF "\n\n",
		       mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
		       ((start + blkcnt + mmc->erase_grp_size)
		       & ~(mmc->erase_grp_size - 1)) - 1);

	while (blk < blkcnt) {
		if (IS_SD(mmc) && mmc->ssr.au) {
			blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
				mmc->ssr.au : (blkcnt - blk);
		} else {
			blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
				mmc->erase_grp_size : (blkcnt - blk);
		}
		err = mmc_erase_t(mmc, start + blk, blk_r);
		if (err)
			break;

		blk += blk_r;

		/* Waiting for the ready status */
		if (mmc_poll_for_busy(mmc, timeout_ms))
			return 0;
	}

	return blk;
}

static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start,
		lbaint_t blkcnt, const void *src)
{
	struct mmc_cmd cmd;
	struct mmc_data data;
	int timeout_ms = 1000;

	if ((start + blkcnt) > mmc_get_blk_desc(mmc)->lba) {
		printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
		       start + blkcnt, mmc_get_blk_desc(mmc)->lba);
		return 0;
	}

	if (blkcnt == 0)
		return 0;
	else if (blkcnt == 1)
		cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
	else
		cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;

	if (mmc->high_capacity)
		cmd.cmdarg = start;
	else
		cmd.cmdarg = start * mmc->write_bl_len;

	cmd.resp_type = MMC_RSP_R1;

	data.src = src;
	data.blocks = blkcnt;
	data.blocksize = mmc->write_bl_len;
	data.flags = MMC_DATA_WRITE;

	if (mmc_send_cmd(mmc, &cmd, &data)) {
		printf("mmc write failed\n");
		return 0;
	}

	/* SPI multiblock writes terminate using a special
	 * token, not a STOP_TRANSMISSION request.
	 */
	if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
		cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
		cmd.cmdarg = 0;
		cmd.resp_type = MMC_RSP_R1b;
		if (mmc_send_cmd(mmc, &cmd, NULL)) {
			printf("mmc fail to send stop cmd\n");
			return 0;
		}
	}

	/* Waiting for the ready status */
	if (mmc_poll_for_busy(mmc, timeout_ms))
		return 0;

	return blkcnt;
}

#if CONFIG_IS_ENABLED(BLK)
ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
		 const void *src)
#else
ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
		 const void *src)
#endif
{
#if CONFIG_IS_ENABLED(BLK)
	struct blk_desc *block_dev = dev_get_uclass_plat(dev);
#endif
	int dev_num = block_dev->devnum;
	lbaint_t cur, blocks_todo = blkcnt;
	int err;

	struct mmc *mmc = find_mmc_device(dev_num);
	if (!mmc)
		return 0;

	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num, block_dev->hwpart);
	if (err < 0)
		return 0;

	if (mmc_set_blocklen(mmc, mmc->write_bl_len))
		return 0;

	do {
		cur = (blocks_todo > mmc->cfg->b_max) ?
			mmc->cfg->b_max : blocks_todo;
		if (mmc_write_blocks(mmc, start, cur, src) != cur)
			return 0;
		blocks_todo -= cur;
		start += cur;
		src += cur * mmc->write_bl_len;
	} while (blocks_todo > 0);

	return blkcnt;
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
da61fa5f PB	2	/*
	3	* Copyright 2008, Freescale Semiconductor, Inc
	4	* Andy Fleming
	5	*
	6	* Based vaguely on the Linux code
da61fa5f PB	7	*/
	8
	9	#include <config.h>
	10	#include <common.h>
e6f6f9e6	11	#include <blk.h>
33fb211d	12	#include <dm.h>
da61fa5f	13	#include <part.h>
180f87fc TR	14	#include <div64.h>
180f87fc TR	15	#include <linux/math64.h>
da61fa5f PB	16	#include "mmc_private.h"
	17
	18	static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
	19	{
	20	struct mmc_cmd cmd;
	21	ulong end;
	22	int err, start_cmd, end_cmd;
	23
	24	if (mmc->high_capacity) {
	25	end = start + blkcnt - 1;
	26	} else {
	27	end = (start + blkcnt - 1) * mmc->write_bl_len;
	28	start *= mmc->write_bl_len;
	29	}
	30
	31	if (IS_SD(mmc)) {
	32	start_cmd = SD_CMD_ERASE_WR_BLK_START;
	33	end_cmd = SD_CMD_ERASE_WR_BLK_END;
	34	} else {
	35	start_cmd = MMC_CMD_ERASE_GROUP_START;
	36	end_cmd = MMC_CMD_ERASE_GROUP_END;
	37	}
	38
	39	cmd.cmdidx = start_cmd;
	40	cmd.cmdarg = start;
	41	cmd.resp_type = MMC_RSP_R1;
	42
	43	err = mmc_send_cmd(mmc, &cmd, NULL);
	44	if (err)
	45	goto err_out;
	46
	47	cmd.cmdidx = end_cmd;
	48	cmd.cmdarg = end;
	49
	50	err = mmc_send_cmd(mmc, &cmd, NULL);
	51	if (err)
	52	goto err_out;
	53
	54	cmd.cmdidx = MMC_CMD_ERASE;
1aa2d074	55	cmd.cmdarg = MMC_ERASE_ARG;
da61fa5f PB	56	cmd.resp_type = MMC_RSP_R1b;
	57
	58	err = mmc_send_cmd(mmc, &cmd, NULL);
	59	if (err)
	60	goto err_out;
	61
	62	return 0;
	63
	64	err_out:
	65	puts("mmc erase failed\n");
	66	return err;
	67	}
	68
2a4bb3d2	69	#if CONFIG_IS_ENABLED(BLK)
561e624c SG	70	ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt)
	71	#else
	72	ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
	73	#endif
da61fa5f	74	{
2a4bb3d2	75	#if CONFIG_IS_ENABLED(BLK)
caa4daa2	76	struct blk_desc *block_dev = dev_get_uclass_plat(dev);
561e624c	77	#endif
bcce53d0	78	int dev_num = block_dev->devnum;
da61fa5f	79	int err = 0;
180f87fc	80	u32 start_rem, blkcnt_rem;
da61fa5f PB	81	struct mmc *mmc = find_mmc_device(dev_num);
da61fa5f PB	82	lbaint_t blk = 0, blk_r = 0;
6cf8a903	83	int timeout_ms = 1000;
da61fa5f PB	84
	85	if (!mmc)
	86	return -1;
	87
69f45cd5 SG	88	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num,
69f45cd5 SG	89	block_dev->hwpart);
873cc1d7 SW	90	if (err < 0)
	91	return -1;
	92
180f87fc TR	93	/*
	94	* We want to see if the requested start or total block count are
	95	* unaligned. We discard the whole numbers and only care about the
	96	* remainder.
	97	*/
	98	err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
	99	err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
	100	if (start_rem \|\| blkcnt_rem)
da61fa5f PB	101	printf("\n\nCaution! Your devices Erase group is 0x%x\n"
	102	"The erase range would be change to "
	103	"0x" LBAF "~0x" LBAF "\n\n",
	104	mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
	105	((start + blkcnt + mmc->erase_grp_size)
	106	& ~(mmc->erase_grp_size - 1)) - 1);
	107
	108	while (blk < blkcnt) {
e492dbb4 PF	109	if (IS_SD(mmc) && mmc->ssr.au) {
	110	blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
	111	mmc->ssr.au : (blkcnt - blk);
	112	} else {
	113	blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
	114	mmc->erase_grp_size : (blkcnt - blk);
	115	}
da61fa5f PB	116	err = mmc_erase_t(mmc, start + blk, blk_r);
	117	if (err)
	118	break;
	119
	120	blk += blk_r;
	121
	122	/* Waiting for the ready status */
6cf8a903	123	if (mmc_poll_for_busy(mmc, timeout_ms))
da61fa5f PB	124	return 0;
	125	}
	126
	127	return blk;
	128	}
	129
	130	static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start,
	131	lbaint_t blkcnt, const void *src)
	132	{
	133	struct mmc_cmd cmd;
	134	struct mmc_data data;
6cf8a903	135	int timeout_ms = 1000;
da61fa5f	136
c40fdca6	137	if ((start + blkcnt) > mmc_get_blk_desc(mmc)->lba) {
da61fa5f	138	printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
c40fdca6	139	start + blkcnt, mmc_get_blk_desc(mmc)->lba);
da61fa5f PB	140	return 0;
	141	}
	142
	143	if (blkcnt == 0)
	144	return 0;
	145	else if (blkcnt == 1)
	146	cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
	147	else
	148	cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
	149
	150	if (mmc->high_capacity)
	151	cmd.cmdarg = start;
	152	else
	153	cmd.cmdarg = start * mmc->write_bl_len;
	154
	155	cmd.resp_type = MMC_RSP_R1;
	156
	157	data.src = src;
	158	data.blocks = blkcnt;
	159	data.blocksize = mmc->write_bl_len;
	160	data.flags = MMC_DATA_WRITE;
	161
	162	if (mmc_send_cmd(mmc, &cmd, &data)) {
	163	printf("mmc write failed\n");
	164	return 0;
	165	}
	166
	167	/* SPI multiblock writes terminate using a special
	168	* token, not a STOP_TRANSMISSION request.
	169	*/
	170	if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
	171	cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
	172	cmd.cmdarg = 0;
	173	cmd.resp_type = MMC_RSP_R1b;
	174	if (mmc_send_cmd(mmc, &cmd, NULL)) {
	175	printf("mmc fail to send stop cmd\n");
	176	return 0;
	177	}
	178	}
	179
	180	/* Waiting for the ready status */
6cf8a903	181	if (mmc_poll_for_busy(mmc, timeout_ms))
da61fa5f PB	182	return 0;
	183
	184	return blkcnt;
	185	}
	186
2a4bb3d2	187	#if CONFIG_IS_ENABLED(BLK)
33fb211d SG	188	ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
	189	const void *src)
	190	#else
4101f687	191	ulong mmc_bwrite(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
7c4213f6	192	const void *src)
33fb211d	193	#endif
da61fa5f	194	{
2a4bb3d2	195	#if CONFIG_IS_ENABLED(BLK)
caa4daa2	196	struct blk_desc *block_dev = dev_get_uclass_plat(dev);
33fb211d	197	#endif
bcce53d0	198	int dev_num = block_dev->devnum;
da61fa5f	199	lbaint_t cur, blocks_todo = blkcnt;
873cc1d7	200	int err;
da61fa5f PB	201
	202	struct mmc *mmc = find_mmc_device(dev_num);
	203	if (!mmc)
	204	return 0;
	205
69f45cd5	206	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num, block_dev->hwpart);
873cc1d7 SW	207	if (err < 0)
	208	return 0;
	209
da61fa5f PB	210	if (mmc_set_blocklen(mmc, mmc->write_bl_len))
	211	return 0;
	212
	213	do {
93bfd616 PA	214	cur = (blocks_todo > mmc->cfg->b_max) ?
93bfd616 PA	215	mmc->cfg->b_max : blocks_todo;
da61fa5f PB	216	if (mmc_write_blocks(mmc, start, cur, src) != cur)
	217	return 0;
	218	blocks_todo -= cur;
	219	start += cur;
	220	src += cur * mmc->write_bl_len;
	221	} while (blocks_todo > 0);
	222
	223	return blkcnt;
	224	}