[J-u-boot.git] / include / configs / taurus.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
 * (C) Copyright 2013 Siemens AG
 *
 * Based on:
 * U-Boot file: include/configs/at91sam9260ek.h
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <[email protected]>
 * Lead Tech Design <www.leadtechdesign.com>
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>
#include <linux/sizes.h>

/*
 * Warning: changing CONFIG_SYS_TEXT_BASE requires
 * adapting the initial boot program.
 * Since the linker has to swallow that define, we must use a pure
 * hex number here!
 */

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */

/* Misc CPU related */

#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS

/*
 * SDRAM: 1 bank, min 32, max 128 MB
 * Initialized before u-boot gets started.
 */
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
#endif

/* USB */
#if defined(CONFIG_BOARD_TAURUS)
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2

/* USB DFU support */

#define CONFIG_USB_GADGET_AT91

/* DFU class support */
#define DFU_MANIFEST_POLL_TIMEOUT	25000
#endif

/* SPI EEPROM */
#define TAURUS_SPI_MASK (1 << 4)

#if defined(CONFIG_SPL_BUILD)
/* SPL related */
#endif

/* bootstrap in spi flash , u-boot + env + linux in nandflash */

#ifndef CONFIG_SPL_BUILD
#if defined(CONFIG_BOARD_AXM)
#define CONFIG_EXTRA_ENV_SETTINGS \
	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
		"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
	"boot_retries=0\0" \
	"ethact=macb0\0" \
	"flash_nfs=run nand_kernel;run nfsargs;run addip;" \
		"upgrade_available;bootm ${kernel_ram};reset\0" \
	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
		"bootm ${kernel_ram};reset\0" \
	"flash_self_test=run nand_kernel;run setbootargs addtest;" \
		"upgrade_available;bootm ${kernel_ram};reset\0" \
	"hostname=systemone\0" \
	"kernel_Off=0x00200000\0" \
	"kernel_Off_fallback=0x03800000\0" \
	"kernel_ram=0x21500000\0" \
	"kernel_size=0x00400000\0" \
	"kernel_size_fallback=0x00400000\0" \
	"loads_echo=1\0" \
	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
		"${kernel_size}\0" \
	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
		"run nfsargs;run addip;upgrade_available;" \
		"bootm ${kernel_ram};reset\0" \
	"netdev=eth0\0" \
	"nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
		"rw nfsroot=${serverip}:${rootpath} " \
		"at91sam9_wdt.wdt_timeout=16\0" \
	"partitionset_active=A\0" \
	"preboot=echo;echo Type 'run flash_self' to use kernel and root " \
		"filesystem on memory;echo Type 'run flash_nfs' to use " \
		"kernel from memory and root filesystem over NFS;echo Type " \
		"'run net_nfs' to get Kernel over TFTP and mount root " \
		"filesystem over NFS;echo\0" \
	"project_dir=systemone\0" \
	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
	"rootfs=/dev/mtdblock5\0" \
	"rootfs_fallback=/dev/mtdblock7\0" \
	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
		"root=${rootfs} rootfstype=jffs2 panic=7 " \
		"at91sam9_wdt.wdt_timeout=16\0" \
	"stderr=serial\0" \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"upgrade_available=0\0"
#endif
#endif /* #ifndef CONFIG_SPL_BUILD */

/* Defines for SPL */
#define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
					CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN

#define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)

#define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
#define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
#define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE

#define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
#define CONFIG_SYS_NAND_ECCSIZE		256
#define CONFIG_SYS_NAND_ECCBYTES	3
#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
					  48, 49, 50, 51, 52, 53, 54, 55, \
					  56, 57, 58, 59, 60, 61, 62, 63, }

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define AT91_PLL_LOCK_TIMEOUT		1000000
#define CONFIG_SYS_AT91_PLLA		0x202A3F01
#define CONFIG_SYS_MCKR			0x1300
#define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
#define CONFIG_SYS_AT91_PLLB		0x10193F05

#define CONFIG_SYS_SPL_LEN		CONFIG_SPL_PAD_TO

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
0f8bc283 HS	2	/*
	3	* Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
	4	* (C) Copyright 2013 Siemens AG
	5	*
	6	* Based on:
	7	* U-Boot file: include/configs/at91sam9260ek.h
	8	*
	9	* (C) Copyright 2007-2008
	10	* Stelian Pop <[email protected]>
	11	* Lead Tech Design <www.leadtechdesign.com>
0f8bc283 HS	12	*/
	13
	14	#ifndef __CONFIG_H
	15	#define __CONFIG_H
	16
	17	/*
	18	* SoC must be defined first, before hardware.h is included.
	19	* In this case SoC is defined in boards.cfg.
	20	*/
	21	#include <asm/hardware.h>
40540823	22	#include <linux/sizes.h>
0f8bc283	23
0f8bc283 HS	24	/*
	25	* Warning: changing CONFIG_SYS_TEXT_BASE requires
	26	* adapting the initial boot program.
	27	* Since the linker has to swallow that define, we must use a pure
	28	* hex number here!
	29	*/
	30
0f8bc283 HS	31	/* ARM asynchronous clock */
	32	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	33	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
0f8bc283 HS	34
0f8bc283 HS	35	/* Misc CPU related */
0cac0fb0	36
0f8bc283 HS	37	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
0f8bc283 HS	38	#define CONFIG_USART_ID ATMEL_ID_SYS
0f8bc283	39
0f8bc283 HS	40	/*
	41	* SDRAM: 1 bank, min 32, max 128 MB
	42	* Initialized before u-boot gets started.
	43	*/
0f8bc283	44	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
0ed366ff	45	#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
0f8bc283 HS	46
	47	/*
	48	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	49	* leaving the correct space for initial global data structure above
	50	* that address while providing maximum stack area below.
	51	*/
0ed366ff	52	#define CONFIG_SYS_INIT_SP_ADDR \
0f8bc283 HS	53	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
	54
	55	/* NAND flash */
	56	#ifdef CONFIG_CMD_NAND
0f8bc283 HS	57	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	58	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	59	#define CONFIG_SYS_NAND_DBW_8
	60	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	61	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	62	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	63	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
	64	#endif
	65
0f8bc283 HS	66	/* USB */
	67	#if defined(CONFIG_BOARD_TAURUS)
	68	#define CONFIG_USB_ATMEL
e8b81eef	69	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
0f8bc283 HS	70	#define CONFIG_USB_OHCI_NEW
	71	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	72	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
	73	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
	74	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
e8b81eef HS	75
e8b81eef HS	76	/* USB DFU support */
e8b81eef	77
e8b81eef HS	78	#define CONFIG_USB_GADGET_AT91
	79
	80	/* DFU class support */
e8b81eef	81	#define DFU_MANIFEST_POLL_TIMEOUT 25000
0f8bc283 HS	82	#endif
0f8bc283 HS	83
50921cdc	84	/* SPI EEPROM */
50921cdc	85	#define TAURUS_SPI_MASK (1 << 4)
50921cdc	86
a1655bb2 HS	87	#if defined(CONFIG_SPL_BUILD)
a1655bb2 HS	88	/* SPL related */
a1655bb2 HS	89	#endif
a1655bb2 HS	90
0f8bc283	91	/* bootstrap in spi flash , u-boot + env + linux in nandflash */
40540823	92
0cac0fb0 HS	93	#ifndef CONFIG_SPL_BUILD
	94	#if defined(CONFIG_BOARD_AXM)
	95	#define CONFIG_EXTRA_ENV_SETTINGS \
	96	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
	97	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
	98	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
	99	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
	100	"boot_retries=0\0" \
	101	"ethact=macb0\0" \
	102	"flash_nfs=run nand_kernel;run nfsargs;run addip;" \
	103	"upgrade_available;bootm ${kernel_ram};reset\0" \
	104	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
	105	"bootm ${kernel_ram};reset\0" \
	106	"flash_self_test=run nand_kernel;run setbootargs addtest;" \
	107	"upgrade_available;bootm ${kernel_ram};reset\0" \
	108	"hostname=systemone\0" \
	109	"kernel_Off=0x00200000\0" \
	110	"kernel_Off_fallback=0x03800000\0" \
	111	"kernel_ram=0x21500000\0" \
	112	"kernel_size=0x00400000\0" \
	113	"kernel_size_fallback=0x00400000\0" \
	114	"loads_echo=1\0" \
	115	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
	116	"${kernel_size}\0" \
	117	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
	118	"run nfsargs;run addip;upgrade_available;" \
	119	"bootm ${kernel_ram};reset\0" \
	120	"netdev=eth0\0" \
	121	"nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
	122	"rw nfsroot=${serverip}:${rootpath} " \
	123	"at91sam9_wdt.wdt_timeout=16\0" \
	124	"partitionset_active=A\0" \
	125	"preboot=echo;echo Type 'run flash_self' to use kernel and root " \
	126	"filesystem on memory;echo Type 'run flash_nfs' to use " \
	127	"kernel from memory and root filesystem over NFS;echo Type " \
	128	"'run net_nfs' to get Kernel over TFTP and mount root " \
	129	"filesystem over NFS;echo\0" \
	130	"project_dir=systemone\0" \
	131	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
	132	"rootfs=/dev/mtdblock5\0" \
	133	"rootfs_fallback=/dev/mtdblock7\0" \
	134	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
	135	"root=${rootfs} rootfstype=jffs2 panic=7 " \
	136	"at91sam9_wdt.wdt_timeout=16\0" \
	137	"stderr=serial\0" \
	138	"stdin=serial\0" \
	139	"stdout=serial\0" \
	140	"upgrade_available=0\0"
	141	#endif
	142	#endif /* #ifndef CONFIG_SPL_BUILD */
0f8bc283	143
237e3793	144	/* Defines for SPL */
40540823	145	#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
a1655bb2 HS	146	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
	147	CONFIG_SYS_MALLOC_LEN)
	148	#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
237e3793 HS	149
237e3793 HS	150	#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
0ed366ff	151	#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
237e3793	152
237e3793	153	#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
e8b81eef	154	#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
237e3793 HS	155	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
237e3793 HS	156	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
237e3793	157
0ed366ff	158	#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
237e3793 HS	159	#define CONFIG_SYS_NAND_ECCSIZE 256
237e3793 HS	160	#define CONFIG_SYS_NAND_ECCBYTES 3
237e3793 HS	161	#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
	162	48, 49, 50, 51, 52, 53, 54, 55, \
	163	56, 57, 58, 59, 60, 61, 62, 63, }
	164
237e3793 HS	165	#define CONFIG_SYS_MASTER_CLOCK 132096000
	166	#define AT91_PLL_LOCK_TIMEOUT 1000000
	167	#define CONFIG_SYS_AT91_PLLA 0x202A3F01
	168	#define CONFIG_SYS_MCKR 0x1300
	169	#define CONFIG_SYS_MCKR_CSS (0x02 \| CONFIG_SYS_MCKR)
	170	#define CONFIG_SYS_AT91_PLLB 0x10193F05
40540823	171
fc89afba SR	172	#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
fc89afba SR	173
0f8bc283	174	#endif