]>
Commit | Line | Data |
---|---|---|
b821e0db | 1 | CONFIG_ARM=y |
a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
abf8d963 | 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
b821e0db DB |
4 | CONFIG_ARCH_ROCKCHIP=y |
5 | CONFIG_SYS_TEXT_BASE=0x00200000 | |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
472a716b | 7 | CONFIG_NR_DRAM_BANKS=1 |
b821e0db | 8 | CONFIG_ENV_OFFSET=0x3F8000 |
2bba7807 | 9 | CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" |
b821e0db DB |
10 | CONFIG_ROCKCHIP_RK3328=y |
11 | CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y | |
12 | CONFIG_TPL_LIBCOMMON_SUPPORT=y | |
13 | CONFIG_TPL_LIBGENERIC_SUPPORT=y | |
9ca00684 | 14 | CONFIG_SPL_DRIVERS_MISC=y |
b821e0db | 15 | CONFIG_SPL_STACK_R_ADDR=0x600000 |
b821e0db DB |
16 | CONFIG_DEBUG_UART_BASE=0xFF130000 |
17 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
d46e86d2 | 18 | CONFIG_SYS_LOAD_ADDR=0x800800 |
b821e0db DB |
19 | CONFIG_DEBUG_UART=y |
20 | CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 | |
21 | # CONFIG_ANDROID_BOOT_IMAGE is not set | |
22 | CONFIG_FIT=y | |
23 | CONFIG_FIT_VERBOSE=y | |
24 | CONFIG_SPL_LOAD_FIT=y | |
25 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb" | |
b821e0db DB |
26 | # CONFIG_DISPLAY_CPUINFO is not set |
27 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
472a716b | 28 | CONFIG_MISC_INIT_R=y |
ca8a329a TR |
29 | CONFIG_SPL_MAX_SIZE=0x40000 |
30 | CONFIG_SPL_PAD_TO=0x7f8000 | |
b821e0db DB |
31 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
32 | CONFIG_TPL_SYS_MALLOC_SIMPLE=y | |
33 | CONFIG_SPL_STACK_R=y | |
975e7cf3 | 34 | CONFIG_SPL_I2C=y |
933b2f09 | 35 | CONFIG_SPL_POWER=y |
b821e0db DB |
36 | CONFIG_SPL_ATF=y |
37 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y | |
ca8a329a | 38 | CONFIG_TPL_MAX_SIZE=0x40000 |
b821e0db DB |
39 | CONFIG_CMD_BOOTZ=y |
40 | CONFIG_CMD_GPT=y | |
41 | CONFIG_CMD_MMC=y | |
42 | CONFIG_CMD_USB=y | |
43 | # CONFIG_CMD_SETEXPR is not set | |
44 | CONFIG_CMD_TIME=y | |
45 | CONFIG_SPL_OF_CONTROL=y | |
46 | CONFIG_TPL_OF_CONTROL=y | |
b821e0db DB |
47 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
48 | CONFIG_TPL_OF_PLATDATA=y | |
49 | CONFIG_ENV_IS_IN_MMC=y | |
50 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
51 | CONFIG_NET_RANDOM_ETHADDR=y | |
52 | CONFIG_TPL_DM=y | |
53 | CONFIG_REGMAP=y | |
54 | CONFIG_SPL_REGMAP=y | |
55 | CONFIG_TPL_REGMAP=y | |
56 | CONFIG_SYSCON=y | |
57 | CONFIG_SPL_SYSCON=y | |
58 | CONFIG_TPL_SYSCON=y | |
59 | CONFIG_CLK=y | |
60 | CONFIG_SPL_CLK=y | |
61 | CONFIG_FASTBOOT_BUF_ADDR=0x800800 | |
62 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y | |
63 | CONFIG_ROCKCHIP_GPIO=y | |
64 | CONFIG_SYS_I2C_ROCKCHIP=y | |
65 | CONFIG_MMC_DW=y | |
66 | CONFIG_MMC_DW_ROCKCHIP=y | |
67 | CONFIG_SF_DEFAULT_SPEED=20000000 | |
68 | CONFIG_DM_ETH=y | |
69 | CONFIG_ETH_DESIGNWARE=y | |
70 | CONFIG_GMAC_ROCKCHIP=y | |
71 | CONFIG_PINCTRL=y | |
72 | CONFIG_SPL_PINCTRL=y | |
73 | CONFIG_DM_PMIC=y | |
74 | CONFIG_PMIC_RK8XX=y | |
7abf178b | 75 | CONFIG_SPL_PMIC_RK8XX=y |
b821e0db DB |
76 | CONFIG_SPL_DM_REGULATOR=y |
77 | CONFIG_REGULATOR_PWM=y | |
78 | CONFIG_DM_REGULATOR_FIXED=y | |
79 | CONFIG_SPL_DM_REGULATOR_FIXED=y | |
80 | CONFIG_REGULATOR_RK8XX=y | |
81 | CONFIG_PWM_ROCKCHIP=y | |
82 | CONFIG_RAM=y | |
83 | CONFIG_SPL_RAM=y | |
84 | CONFIG_TPL_RAM=y | |
85 | CONFIG_DM_RESET=y | |
86 | CONFIG_BAUDRATE=1500000 | |
87 | CONFIG_DEBUG_UART_SHIFT=2 | |
472a716b | 88 | CONFIG_SYSINFO=y |
b821e0db DB |
89 | CONFIG_SYSRESET=y |
90 | # CONFIG_TPL_SYSRESET is not set | |
91 | CONFIG_USB=y | |
92 | CONFIG_USB_XHCI_HCD=y | |
93 | CONFIG_USB_XHCI_DWC3=y | |
94 | CONFIG_USB_EHCI_HCD=y | |
95 | CONFIG_USB_EHCI_GENERIC=y | |
96 | CONFIG_USB_OHCI_HCD=y | |
97 | CONFIG_USB_OHCI_GENERIC=y | |
98 | CONFIG_USB_DWC2=y | |
99 | CONFIG_USB_DWC3=y | |
100 | # CONFIG_USB_DWC3_GADGET is not set | |
101 | CONFIG_USB_GADGET=y | |
102 | CONFIG_USB_GADGET_DWC2_OTG=y | |
103 | CONFIG_SPL_TINY_MEMSET=y | |
104 | CONFIG_TPL_TINY_MEMSET=y | |
105 | CONFIG_ERRNO_STR=y |