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riscv: ax25: add SPL support
[J-u-boot.git] / board / AndesTech / ax25-ae350 / ax25-ae350.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
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2/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <[email protected]>
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5 */
6
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7#include <common.h>
8#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
9#include <netdev.h>
10#endif
11#include <linux/io.h>
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12#include <faraday/ftsmc020.h>
13#include <fdtdec.h>
edf0acb3 14#include <dm.h>
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15
16DECLARE_GLOBAL_DATA_PTR;
17
48cbf624 18extern phys_addr_t prior_stage_fdt_address;
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19/*
20 * Miscellaneous platform dependent initializations
21 */
22
23int board_init(void)
24{
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25 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
26
27 return 0;
28}
29
30int dram_init(void)
31{
32 unsigned long sdram_base = PHYS_SDRAM_0;
33 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
34 unsigned long actual_size;
35
36 actual_size = get_ram_size((void *)sdram_base, expected_size);
37 gd->ram_size = actual_size;
38
39 if (expected_size != actual_size) {
40 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
41 actual_size >> 20, expected_size >> 20);
42 }
43
44 return 0;
45}
46
47int dram_init_banksize(void)
48{
49 gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
50 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
51 gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
52 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
53
54 return 0;
55}
56
57#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
58int board_eth_init(bd_t *bd)
59{
60 return ftmac100_initialize(bd);
61}
62#endif
63
64ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
65{
66 return 0;
67}
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68
69void *board_fdt_blob_setup(void)
70{
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71 return (void *)CONFIG_SYS_FDT_BASE;
72}
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73
74int smc_init(void)
75{
76 int node = -1;
77 const char *compat = "andestech,atfsmc020";
78 void *blob = (void *)gd->fdt_blob;
79 fdt_addr_t addr;
80 struct ftsmc020_bank *regs;
81
82 node = fdt_node_offset_by_compatible(blob, -1, compat);
83 if (node < 0)
84 return -FDT_ERR_NOTFOUND;
85
86 addr = fdtdec_get_addr(blob, node, "reg");
87
88 if (addr == FDT_ADDR_T_NONE)
89 return -EINVAL;
90
91 regs = (struct ftsmc020_bank *)addr;
92 regs->cr &= ~FTSMC020_BANK_WPROT;
93
94 return 0;
95}
96
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97static void v5l2_init(void)
98{
99 struct udevice *dev;
100
101 uclass_get_device(UCLASS_CACHE, 0, &dev);
102}
103
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104#ifdef CONFIG_BOARD_EARLY_INIT_F
105int board_early_init_f(void)
106{
107 smc_init();
edf0acb3 108 v5l2_init();
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109
110 return 0;
111}
112#endif
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