]> Git Repo - J-u-boot.git/blame - cmd/cache.c
Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
[J-u-boot.git] / cmd / cache.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
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WD
2/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, [email protected].
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5 */
6
7/*
8 * Cache support: switch on or off, get status
9 */
3863585b 10#include <command.h>
9edefc27 11#include <cpu_func.h>
d0c4c338 12#include <linux/compiler.h>
3863585b 13
d0c4c338
MM
14static int parse_argv(const char *);
15
23498935 16void __weak invalidate_icache_all(void)
d0c4c338 17{
23498935
SK
18 /* please define arch specific invalidate_icache_all */
19 puts("No arch specific invalidate_icache_all available!\n");
d0c4c338 20}
3863585b 21
c2a2123e
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22__weak void noncached_set_region(void)
23{
24}
25
09140113
SG
26static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc,
27 char *const argv[])
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28{
29 switch (argc) {
f043dc28 30 case 2: /* on / off / flush */
d0c4c338 31 switch (parse_argv(argv[1])) {
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JH
32 case 0:
33 icache_disable();
3863585b 34 break;
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JH
35 case 1:
36 icache_enable();
3863585b 37 break;
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JH
38 case 2:
39 invalidate_icache_all();
d0c4c338 40 break;
f043dc28
EP
41 default:
42 return CMD_RET_USAGE;
3863585b 43 }
36180d96 44 break;
3863585b 45 case 1: /* get status */
e9455fcc 46 printf("Instruction Cache is %s\n",
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47 icache_status() ? "ON" : "OFF");
48 return 0;
49 default:
4c12eeb8 50 return CMD_RET_USAGE;
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51 }
52 return 0;
53}
54
23498935 55void __weak flush_dcache_all(void)
d0c4c338 56{
23498935
SK
57 puts("No arch specific flush_dcache_all available!\n");
58 /* please define arch specific flush_dcache_all */
d0c4c338
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59}
60
09140113
SG
61static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc,
62 char *const argv[])
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63{
64 switch (argc) {
f043dc28 65 case 2: /* on / off / flush */
d0c4c338 66 switch (parse_argv(argv[1])) {
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JH
67 case 0:
68 dcache_disable();
3863585b 69 break;
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JH
70 case 1:
71 dcache_enable();
c2a2123e 72 noncached_set_region();
3863585b 73 break;
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JH
74 case 2:
75 flush_dcache_all();
d0c4c338 76 break;
f043dc28
EP
77 default:
78 return CMD_RET_USAGE;
3863585b 79 }
e9455fcc 80 break;
3863585b 81 case 1: /* get status */
e9455fcc 82 printf("Data (writethrough) Cache is %s\n",
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83 dcache_status() ? "ON" : "OFF");
84 return 0;
85 default:
4c12eeb8 86 return CMD_RET_USAGE;
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87 }
88 return 0;
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89}
90
d0c4c338 91static int parse_argv(const char *s)
3863585b 92{
e9455fcc
JH
93 if (strcmp(s, "flush") == 0)
94 return 2;
95 else if (strcmp(s, "on") == 0)
96 return 1;
97 else if (strcmp(s, "off") == 0)
98 return 0;
99
100 return -1;
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101}
102
8bde7f77 103
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104U_BOOT_CMD(
105 icache, 2, 1, do_icache,
2fb2604d 106 "enable or disable instruction cache",
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107 "[on, off, flush]\n"
108 " - enable, disable, or flush instruction cache"
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109);
110
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111U_BOOT_CMD(
112 dcache, 2, 1, do_dcache,
2fb2604d 113 "enable or disable data cache",
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114 "[on, off, flush]\n"
115 " - enable, disable, or flush data (writethrough) cache"
8bde7f77 116);
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