[J-u-boot.git] / include / configs / evb4510.h

/*
 * Copyright (c) 2004	Cucy Systems (http://www.cucy.com)
 * Curt Brune <[email protected]>
 *
 * Configuation settings for evb4510 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * If we are developing, we might want to start u-boot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 *
 * Also swap the flash1 and flash2 addresses during debug.
 *
 * #define CONFIG_SKIP_LOWLEVEL_INIT
 */

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM7		1	/* This is a ARM7 CPU	 */
#define CONFIG_ARM_THUMB	1	/* this is an ARM7TDMI	 */
#define CONFIG_S3C4510B		1	/* it's a S3C4510B chip	 */
#define CONFIG_EVB4510		1	/* on an EVB4510 Board	 */
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF

#define CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ    (4*1024)
#define CONFIG_STACKSIZE_FIQ    (4*1024)

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_S3C4510_ETH   1
#define CONFIG_DRIVER_S3C4510_I2C   1
#define CONFIG_DRIVER_S3C4510_UART  1
#define CONFIG_DRIVER_S3C4510_FLASH 1

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use Serial line 1, could also use 2 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		19200

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING


#define CONFIG_ETHADDR		00:40:95:36:35:33
#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_IPADDR		10.0.0.11
#define CONFIG_SERVERIP		10.0.0.1
#define CONFIG_CMDLINE_TAG	/* submit bootargs to kernel */

#define CONFIG_BOOTDELAY	2
#define CONFIG_BOOTCOMMAND	"tftp 100000 uImage"
/* #define CONFIG_BOOTARGS	"console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	19200		/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP				/* undef to save memory */
#define CONFIG_SYS_PROMPT		"evb4510 # "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16		/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */

#define CONFIG_CMDLINE_TAG                      /* allow passing of command line args to linux */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0x00780000	/* 4 ... 8 MB in DRAM	*/

#define CONFIG_SYS_LOAD_ADDR		0x00000000	/* default load address */

#define CONFIG_SYS_SYS_CLK_FREQ	50000000	/* CPU freq: 50 MHz */
#define CONFIG_SYS_HZ			1000		/* decrementer freq: 1 KHz */

						/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map after relocation
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 banks of DRAM */
#define PHYS_SDRAM_1		0x00000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x00800000 /* 8 MB */

#define PHYS_FLASH_1		0x01000000 /* Flash Bank #1 */
#define PHYS_FLASH_1_SIZE	0x00200000 /* 2 MB (one chip, 8bit access) */

#define PHYS_FLASH_2		0x02000000 /* Flash Bank #2 */
#define PHYS_FLASH_2_SIZE	0x00080000 /* 512KB (one chip, 8bit access) */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
#define CONFIG_SYS_FLASH_SIZE		PHYS_FLASH_1_SIZE

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT	35	/* max number of sectors on one chip */
#define CONFIG_SYS_MAIN_SECT_SIZE	0x00010000  /* main size of sectors on one chip */

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(4*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ) /* Timeout for Flash Write */

/* environment settings */
#define CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_ENV_IS_NOWHERE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x20000) /* environment start address */
#define CONFIG_ENV_SECT_SIZE	0x10000	   /* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE		0x1000	   /* max size for environment */

#endif	/* __CONFIG_H */
Commit	Line	Data
39539887 WD	1	/*
	2	* Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
	3	* Curt Brune <[email protected]>
	4	*
	5	* Configuation settings for evb4510 board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* If we are developing, we might want to start u-boot from ram
	31	* so we MUST NOT initialize critical regs like mem-timing ...
	32	*
	33	* Also swap the flash1 and flash2 addresses during debug.
	34	*
8aa1a2d1	35	* #define CONFIG_SKIP_LOWLEVEL_INIT
39539887	36	*/
39539887 WD	37
	38	/*
	39	* High Level Configuration Options
	40	* (easy to change)
	41	*/
	42	#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
	43	#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
	44	#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
	45	#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
e47f2db5 A	46	#define CONFIG_SYS_ICACHE_OFF
e47f2db5 A	47	#define CONFIG_SYS_DCACHE_OFF
39539887	48
a1f4a3dd WD	49	#define CONFIG_USE_IRQ
	50	#define CONFIG_STACKSIZE_IRQ (4*1024)
	51	#define CONFIG_STACKSIZE_FIQ (4*1024)
39539887 WD	52
	53	/*
	54	* Size of malloc() pool
	55	*/
6d0f6bcf	56	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
39539887 WD	57
	58	/*
	59	* Hardware drivers
	60	*/
	61	#define CONFIG_DRIVER_S3C4510_ETH 1
	62	#define CONFIG_DRIVER_S3C4510_I2C 1
	63	#define CONFIG_DRIVER_S3C4510_UART 1
	64	#define CONFIG_DRIVER_S3C4510_FLASH 1
	65
	66	/*
	67	* select serial console configuration
	68	*/
a1f4a3dd	69	#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */
39539887 WD	70
	71	/* allow to overwrite serial and ethaddr */
	72	#define CONFIG_ENV_OVERWRITE
	73
	74	#define CONFIG_BAUDRATE 19200
	75
2fd90ce5 JL	76	/*
	77	* BOOTP options
	78	*/
	79	#define CONFIG_BOOTP_SUBNETMASK
	80	#define CONFIG_BOOTP_GATEWAY
	81	#define CONFIG_BOOTP_HOSTNAME
	82	#define CONFIG_BOOTP_BOOTPATH
	83	#define CONFIG_BOOTP_BOOTFILESIZE
39539887	84
39539887	85
1bec3d30 JL	86	/*
	87	* Command line configuration.
	88	*/
	89	#include <config_cmd_default.h>
	90
	91	#define CONFIG_CMD_PING
	92
	93
39539887 WD	94	#define CONFIG_ETHADDR 00:40:95:36:35:33
	95	#define CONFIG_NETMASK 255.255.255.0
	96	#define CONFIG_IPADDR 10.0.0.11
	97	#define CONFIG_SERVERIP 10.0.0.1
	98	#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
	99
a1f4a3dd WD	100	#define CONFIG_BOOTDELAY 2
a1f4a3dd WD	101	#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
53677ef1	102	/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
39539887	103
1bec3d30	104	#if defined(CONFIG_CMD_KGDB)
39539887 WD	105	#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
	106	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
	107	#endif
	108
	109	/*
	110	* Miscellaneous configurable options
	111	*/
6d0f6bcf JCPV	112	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	113	#define CONFIG_SYS_PROMPT "evb4510 # " /* Monitor Command Prompt */
	114	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	115	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	116	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	117	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
39539887	118
a1f4a3dd WD	119	#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */
	120	#define CONFIG_SETUP_MEMORY_TAGS
	121	#define CONFIG_INITRD_TAG
	122
6d0f6bcf JCPV	123	#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
6d0f6bcf JCPV	124	#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
39539887	125
6d0f6bcf	126	#define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */
39539887	127
6d0f6bcf JCPV	128	#define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
6d0f6bcf JCPV	129	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 KHz */
39539887 WD	130
39539887 WD	131	/* valid baudrates */
6d0f6bcf	132	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
39539887 WD	133
	134	/*-----------------------------------------------------------------------
	135	* Stack sizes
	136	*
	137	* The stack sizes are set up in start.S using the settings below
	138	*/
	139	#define CONFIG_STACKSIZE (1281024) / regular stack */
	140	#ifdef CONFIG_USE_IRQ
	141	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	142	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	143	#endif
	144
	145	/*-----------------------------------------------------------------------
	146	* Physical Memory Map after relocation
	147	*/
	148	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
	149	#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
	150	#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
	151
	152	#define PHYS_FLASH_1 0x01000000 /* Flash Bank #1 */
	153	#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip, 8bit access) */
	154
	155	#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
	156	#define PHYS_FLASH_2_SIZE 0x00080000 /* 512KB (one chip, 8bit access) */
	157
6d0f6bcf JCPV	158	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
6d0f6bcf JCPV	159	#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_1_SIZE
39539887 WD	160
	161	/*-----------------------------------------------------------------------
	162	* FLASH and environment organization
	163	*/
6d0f6bcf JCPV	164	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	165	#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
	166	#define CONFIG_SYS_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
39539887 WD	167
39539887 WD	168	/* timeout values are in ticks */
6d0f6bcf JCPV	169	#define CONFIG_SYS_FLASH_ERASE_TOUT (4CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	170	#define CONFIG_SYS_FLASH_WRITE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Write */
39539887 WD	171
39539887 WD	172	/* environment settings */
5a1aceb0	173	#define CONFIG_ENV_IS_IN_FLASH
93f6d725	174	#undef CONFIG_ENV_IS_NOWHERE
39539887	175
6d0f6bcf	176	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x20000) /* environment start address */
0e8d1586 JCPV	177	#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
0e8d1586 JCPV	178	#define CONFIG_ENV_SIZE 0x1000 /* max size for environment */
39539887 WD	179
39539887 WD	180	#endif /* __CONFIG_H */