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Commit | Line | Data |
---|---|---|
dd84058d | 1 | CONFIG_PPC=y |
278b90ce | 2 | CONFIG_SYS_TEXT_BASE=0xFFF40000 |
a09fea1d | 3 | CONFIG_ENV_SIZE=0x2000 |
f7d0ae9c | 4 | CONFIG_DEFAULT_DEVICE_TREE="t2080qds" |
df59b7d2 | 5 | CONFIG_FSL_USE_PCA9547_MUX=y |
dd84058d | 6 | CONFIG_MPC85xx=y |
638d5be0 | 7 | CONFIG_TARGET_T2080QDS=y |
f252e261 | 8 | CONFIG_MPC85XX_HAVE_RESET_VECTOR=y |
73223f0e SG |
9 | CONFIG_FIT=y |
10 | CONFIG_FIT_VERBOSE=y | |
11 | CONFIG_OF_BOARD_SETUP=y | |
12 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
278b90ce | 13 | CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE" |
bb597c0e | 14 | CONFIG_BOOTDELAY=10 |
970bf860 TR |
15 | CONFIG_USE_BOOTCOMMAND=y |
16 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr" | |
02ddc147 | 17 | CONFIG_BOARD_EARLY_INIT_R=y |
adad96e6 | 18 | CONFIG_HUSH_PARSER=y |
89cb2b5f | 19 | CONFIG_CMD_GREPENV=y |
ef0f2f57 | 20 | # CONFIG_CMD_FLASH is not set |
88663126 | 21 | CONFIG_CMD_I2C=y |
89cb2b5f | 22 | CONFIG_CMD_MMC=y |
78d1e1d0 TR |
23 | CONFIG_CMD_USB=y |
24 | CONFIG_CMD_DHCP=y | |
89cb2b5f | 25 | CONFIG_CMD_MII=y |
78d1e1d0 | 26 | CONFIG_CMD_PING=y |
0fd2290c | 27 | CONFIG_MP=y |
89cb2b5f TR |
28 | CONFIG_CMD_EXT2=y |
29 | CONFIG_CMD_FAT=y | |
f252e261 | 30 | CONFIG_OF_CONTROL=y |
e91907a1 | 31 | CONFIG_ENV_OVERWRITE=y |
5dc4dfd2 | 32 | CONFIG_ENV_IS_IN_REMOTE=y |
a09fea1d | 33 | CONFIG_ENV_ADDR=0xFFE20000 |
02dc1599 | 34 | CONFIG_DM=y |
28522678 | 35 | CONFIG_FSL_CAAM=y |
efb5dab7 | 36 | CONFIG_DYNAMIC_DDR_CLK_FREQ=y |
95372165 TR |
37 | CONFIG_DDR_ECC=y |
38 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
b11dc33e | 39 | CONFIG_DM_I2C=y |
55dabcc8 | 40 | CONFIG_SPL_SYS_I2C_LEGACY=y |
6d5d0c95 TR |
41 | CONFIG_SYS_I2C_FSL=y |
42 | CONFIG_SYS_FSL_I2C_OFFSET=0x118000 | |
43 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
44 | CONFIG_SYS_FSL_I2C2_OFFSET=0x118100 | |
45 | CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y | |
46 | CONFIG_SYS_FSL_I2C3_OFFSET=0x119000 | |
47 | CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y | |
48 | CONFIG_SYS_FSL_I2C4_OFFSET=0x119100 | |
88cd7d0e | 49 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
07dea2e7 | 50 | CONFIG_FSL_ESDHC=y |
0cfccb54 | 51 | CONFIG_MTD=y |
b24550ac | 52 | CONFIG_DM_SPI_FLASH=y |
14453fbf | 53 | CONFIG_SF_DEFAULT_SPEED=10000000 |
68d53420 BM |
54 | CONFIG_SPI_FLASH_EON=y |
55 | CONFIG_SPI_FLASH_STMICRO=y | |
56 | CONFIG_SPI_FLASH_SST=y | |
3146f0c0 | 57 | CONFIG_PHYLIB=y |
1c650108 | 58 | CONFIG_PHY_AQUANTIA=y |
306881a0 TR |
59 | CONFIG_PHY_REALTEK=y |
60 | CONFIG_PHY_TERANETICS=y | |
61 | CONFIG_PHY_VITESSE=y | |
a77fda1f | 62 | CONFIG_E1000=y |
cc1e98b5 | 63 | CONFIG_FMAN_ENET=y |
a97a071d | 64 | CONFIG_SYS_FMAN_FW_ADDR=0xFFE00000 |
d7869b21 | 65 | CONFIG_MII=y |
70833d53 HZ |
66 | CONFIG_DM_PCI_COMPAT=y |
67 | CONFIG_PCIE_FSL=y | |
344a0e43 | 68 | CONFIG_SYS_QE_FMAN_FW_IN_REMOTE=y |
9e39003e | 69 | CONFIG_SYS_NS16550=y |
f1b1f770 | 70 | CONFIG_SPI=y |
b24550ac | 71 | CONFIG_DM_SPI=y |
e5d5d447 | 72 | CONFIG_FSL_ESPI=y |
645176d1 TR |
73 | CONFIG_USB=y |
74 | CONFIG_USB_STORAGE=y | |
69be8fd1 MS |
75 | CONFIG_ADDR_MAP=y |
76 | CONFIG_SYS_NUM_ADDR_MAP=64 |