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Commit | Line | Data |
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de1b686b SH |
1 | /* |
2 | * SMSC LAN9[12]1[567] Network driver | |
3 | * | |
cce9cfda | 4 | * (c) 2007 Pengutronix, Sascha Hauer <[email protected]> |
de1b686b SH |
5 | * |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #include <common.h> | |
de1b686b | 26 | #include <command.h> |
736fead8 | 27 | #include <malloc.h> |
de1b686b SH |
28 | #include <net.h> |
29 | #include <miiphy.h> | |
30 | ||
75ba6d69 | 31 | #include "smc911x.h" |
de1b686b | 32 | |
736fead8 | 33 | u32 pkt_data_pull(struct eth_device *dev, u32 addr) \ |
890a02e8 | 34 | __attribute__ ((weak, alias ("smc911x_reg_read"))); |
736fead8 | 35 | void pkt_data_push(struct eth_device *dev, u32 addr, u32 val) \ |
890a02e8 | 36 | __attribute__ ((weak, alias ("smc911x_reg_write"))); |
33314470 | 37 | |
45b6b65c | 38 | static void smc911x_handle_mac_address(struct eth_device *dev) |
de1b686b SH |
39 | { |
40 | unsigned long addrh, addrl; | |
736fead8 | 41 | uchar *m = dev->enetaddr; |
de1b686b | 42 | |
736fead8 BW |
43 | addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24); |
44 | addrh = m[4] | (m[5] << 8); | |
45 | smc911x_set_mac_csr(dev, ADDRL, addrl); | |
46 | smc911x_set_mac_csr(dev, ADDRH, addrh); | |
de1b686b | 47 | |
736fead8 | 48 | printf(DRIVERNAME ": MAC %pM\n", m); |
de1b686b SH |
49 | } |
50 | ||
6af1d41a | 51 | static int smc911x_eth_phy_read(struct eth_device *dev, |
736fead8 | 52 | u8 phy, u8 reg, u16 *val) |
de1b686b | 53 | { |
736fead8 | 54 | while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) |
3e0f331c | 55 | ; |
de1b686b | 56 | |
736fead8 BW |
57 | smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 | |
58 | MII_ACC_MII_BUSY); | |
de1b686b | 59 | |
736fead8 | 60 | while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) |
3e0f331c | 61 | ; |
de1b686b | 62 | |
736fead8 | 63 | *val = smc911x_get_mac_csr(dev, MII_DATA); |
de1b686b SH |
64 | |
65 | return 0; | |
66 | } | |
67 | ||
6af1d41a | 68 | static int smc911x_eth_phy_write(struct eth_device *dev, |
736fead8 | 69 | u8 phy, u8 reg, u16 val) |
de1b686b | 70 | { |
736fead8 | 71 | while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) |
3e0f331c | 72 | ; |
de1b686b | 73 | |
736fead8 BW |
74 | smc911x_set_mac_csr(dev, MII_DATA, val); |
75 | smc911x_set_mac_csr(dev, MII_ACC, | |
de1b686b SH |
76 | phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE); |
77 | ||
736fead8 | 78 | while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) |
3e0f331c | 79 | ; |
de1b686b SH |
80 | return 0; |
81 | } | |
82 | ||
736fead8 | 83 | static int smc911x_phy_reset(struct eth_device *dev) |
de1b686b SH |
84 | { |
85 | u32 reg; | |
86 | ||
736fead8 | 87 | reg = smc911x_reg_read(dev, PMT_CTRL); |
de1b686b SH |
88 | reg &= ~0xfffff030; |
89 | reg |= PMT_CTRL_PHY_RST; | |
736fead8 | 90 | smc911x_reg_write(dev, PMT_CTRL, reg); |
de1b686b SH |
91 | |
92 | mdelay(100); | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
736fead8 | 97 | static void smc911x_phy_configure(struct eth_device *dev) |
de1b686b SH |
98 | { |
99 | int timeout; | |
100 | u16 status; | |
101 | ||
736fead8 | 102 | smc911x_phy_reset(dev); |
de1b686b | 103 | |
6af1d41a | 104 | smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET); |
de1b686b | 105 | mdelay(1); |
6af1d41a HR |
106 | smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1); |
107 | smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE | | |
8ef583a0 | 108 | BMCR_ANRESTART); |
de1b686b SH |
109 | |
110 | timeout = 5000; | |
111 | do { | |
112 | mdelay(1); | |
113 | if ((timeout--) == 0) | |
114 | goto err_out; | |
115 | ||
6af1d41a | 116 | if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0) |
de1b686b | 117 | goto err_out; |
8ef583a0 | 118 | } while (!(status & BMSR_LSTATUS)); |
de1b686b SH |
119 | |
120 | printf(DRIVERNAME ": phy initialized\n"); | |
121 | ||
122 | return; | |
123 | ||
124 | err_out: | |
125 | printf(DRIVERNAME ": autonegotiation timed out\n"); | |
126 | } | |
127 | ||
736fead8 | 128 | static void smc911x_enable(struct eth_device *dev) |
de1b686b SH |
129 | { |
130 | /* Enable TX */ | |
736fead8 | 131 | smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF); |
de1b686b | 132 | |
736fead8 | 133 | smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000); |
de1b686b | 134 | |
736fead8 | 135 | smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON); |
de1b686b SH |
136 | |
137 | /* no padding to start of packets */ | |
736fead8 | 138 | smc911x_reg_write(dev, RX_CFG, 0); |
de1b686b | 139 | |
736fead8 BW |
140 | smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN | |
141 | MAC_CR_HBDIS); | |
de1b686b SH |
142 | |
143 | } | |
144 | ||
736fead8 | 145 | static int smc911x_init(struct eth_device *dev, bd_t * bd) |
de1b686b | 146 | { |
2a6cc97b | 147 | struct chip_id *id = dev->priv; |
de1b686b | 148 | |
4946775c | 149 | printf(DRIVERNAME ": detected %s controller\n", id->name); |
de1b686b | 150 | |
736fead8 | 151 | smc911x_reset(dev); |
de1b686b SH |
152 | |
153 | /* Configure the PHY, initialize the link state */ | |
736fead8 | 154 | smc911x_phy_configure(dev); |
de1b686b | 155 | |
45b6b65c | 156 | smc911x_handle_mac_address(dev); |
de1b686b SH |
157 | |
158 | /* Turn on Tx + Rx */ | |
736fead8 | 159 | smc911x_enable(dev); |
de1b686b SH |
160 | |
161 | return 0; | |
de1b686b SH |
162 | } |
163 | ||
736fead8 BW |
164 | static int smc911x_send(struct eth_device *dev, |
165 | volatile void *packet, int length) | |
de1b686b SH |
166 | { |
167 | u32 *data = (u32*)packet; | |
168 | u32 tmplen; | |
169 | u32 status; | |
170 | ||
736fead8 BW |
171 | smc911x_reg_write(dev, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG | |
172 | TX_CMD_A_INT_LAST_SEG | length); | |
173 | smc911x_reg_write(dev, TX_DATA_FIFO, length); | |
de1b686b SH |
174 | |
175 | tmplen = (length + 3) / 4; | |
176 | ||
3e0f331c | 177 | while (tmplen--) |
736fead8 | 178 | pkt_data_push(dev, TX_DATA_FIFO, *data++); |
de1b686b SH |
179 | |
180 | /* wait for transmission */ | |
736fead8 BW |
181 | while (!((smc911x_reg_read(dev, TX_FIFO_INF) & |
182 | TX_FIFO_INF_TSUSED) >> 16)); | |
de1b686b SH |
183 | |
184 | /* get status. Ignore 'no carrier' error, it has no meaning for | |
185 | * full duplex operation | |
186 | */ | |
736fead8 BW |
187 | status = smc911x_reg_read(dev, TX_STATUS_FIFO) & |
188 | (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL | | |
189 | TX_STS_MANY_DEFER | TX_STS_UNDERRUN); | |
de1b686b | 190 | |
3e0f331c | 191 | if (!status) |
de1b686b SH |
192 | return 0; |
193 | ||
194 | printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n", | |
195 | status & TX_STS_LOC ? "TX_STS_LOC " : "", | |
196 | status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "", | |
197 | status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "", | |
198 | status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "", | |
199 | status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : ""); | |
200 | ||
201 | return -1; | |
202 | } | |
203 | ||
736fead8 | 204 | static void smc911x_halt(struct eth_device *dev) |
de1b686b | 205 | { |
736fead8 | 206 | smc911x_reset(dev); |
de1b686b SH |
207 | } |
208 | ||
736fead8 | 209 | static int smc911x_rx(struct eth_device *dev) |
de1b686b SH |
210 | { |
211 | u32 *data = (u32 *)NetRxPackets[0]; | |
212 | u32 pktlen, tmplen; | |
213 | u32 status; | |
214 | ||
736fead8 BW |
215 | if ((smc911x_reg_read(dev, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) { |
216 | status = smc911x_reg_read(dev, RX_STATUS_FIFO); | |
de1b686b SH |
217 | pktlen = (status & RX_STS_PKT_LEN) >> 16; |
218 | ||
736fead8 | 219 | smc911x_reg_write(dev, RX_CFG, 0); |
de1b686b | 220 | |
bd75db3f | 221 | tmplen = (pktlen + 3) / 4; |
3e0f331c | 222 | while (tmplen--) |
736fead8 | 223 | *data++ = pkt_data_pull(dev, RX_DATA_FIFO); |
de1b686b | 224 | |
3e0f331c | 225 | if (status & RX_STS_ES) |
de1b686b SH |
226 | printf(DRIVERNAME |
227 | ": dropped bad packet. Status: 0x%08x\n", | |
228 | status); | |
229 | else | |
230 | NetReceive(NetRxPackets[0], pktlen); | |
231 | } | |
232 | ||
233 | return 0; | |
234 | } | |
736fead8 | 235 | |
6af1d41a HR |
236 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) |
237 | /* wrapper for smc911x_eth_phy_read */ | |
24e16644 | 238 | static int smc911x_miiphy_read(const char *devname, u8 phy, u8 reg, u16 *val) |
6af1d41a HR |
239 | { |
240 | struct eth_device *dev = eth_get_dev_by_name(devname); | |
241 | if (dev) | |
242 | return smc911x_eth_phy_read(dev, phy, reg, val); | |
243 | return -1; | |
244 | } | |
245 | /* wrapper for smc911x_eth_phy_write */ | |
24e16644 | 246 | static int smc911x_miiphy_write(const char *devname, u8 phy, u8 reg, u16 val) |
6af1d41a HR |
247 | { |
248 | struct eth_device *dev = eth_get_dev_by_name(devname); | |
249 | if (dev) | |
250 | return smc911x_eth_phy_write(dev, phy, reg, val); | |
251 | return -1; | |
252 | } | |
253 | #endif | |
254 | ||
736fead8 BW |
255 | int smc911x_initialize(u8 dev_num, int base_addr) |
256 | { | |
257 | unsigned long addrl, addrh; | |
258 | struct eth_device *dev; | |
259 | ||
260 | dev = malloc(sizeof(*dev)); | |
261 | if (!dev) { | |
fbd47b67 | 262 | return -1; |
736fead8 BW |
263 | } |
264 | memset(dev, 0, sizeof(*dev)); | |
265 | ||
266 | dev->iobase = base_addr; | |
267 | ||
4bc3d2af SS |
268 | /* Try to detect chip. Will fail if not present. */ |
269 | if (smc911x_detect_chip(dev)) { | |
270 | free(dev); | |
271 | return 0; | |
272 | } | |
273 | ||
736fead8 BW |
274 | addrh = smc911x_get_mac_csr(dev, ADDRH); |
275 | addrl = smc911x_get_mac_csr(dev, ADDRL); | |
76771e59 SR |
276 | if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) { |
277 | /* address is obtained from optional eeprom */ | |
278 | dev->enetaddr[0] = addrl; | |
279 | dev->enetaddr[1] = addrl >> 8; | |
280 | dev->enetaddr[2] = addrl >> 16; | |
281 | dev->enetaddr[3] = addrl >> 24; | |
282 | dev->enetaddr[4] = addrh; | |
283 | dev->enetaddr[5] = addrh >> 8; | |
284 | } | |
736fead8 BW |
285 | |
286 | dev->init = smc911x_init; | |
287 | dev->halt = smc911x_halt; | |
288 | dev->send = smc911x_send; | |
289 | dev->recv = smc911x_rx; | |
290 | sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num); | |
291 | ||
292 | eth_register(dev); | |
6af1d41a HR |
293 | |
294 | #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) | |
295 | miiphy_register(dev->name, smc911x_miiphy_read, smc911x_miiphy_write); | |
296 | #endif | |
297 | ||
fbd47b67 | 298 | return 1; |
736fead8 | 299 | } |