projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 5c1fe1ff HS |
1 | /* |
| 2 | * Copyright (C) 2005-2006 Atmel Corporation | |
| 3 | * | |
| 4 | * See file CREDITS for list of people who contributed to this | |
| 5 | * project. | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or | |
| 8 | * modify it under the terms of the GNU General Public License as | |
| 9 | * published by the Free Software Foundation; either version 2 of | |
| 10 | * the License, or (at your option) any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License | |
| 18 | * along with this program; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 20 | * MA 02111-1307 USA | |
| 21 | */ | |
| 22 | #ifndef __DRIVERS_MACB_H__ | |
| 23 | #define __DRIVERS_MACB_H__ | |
| 24 | ||
| 25 | /* MACB register offsets */ | |
| 26 | #define MACB_NCR 0x0000 | |
| 27 | #define MACB_NCFGR 0x0004 | |
| 28 | #define MACB_NSR 0x0008 | |
| 29 | #define MACB_TSR 0x0014 | |
| 30 | #define MACB_RBQP 0x0018 | |
| 31 | #define MACB_TBQP 0x001c | |
| 32 | #define MACB_RSR 0x0020 | |
| 33 | #define MACB_ISR 0x0024 | |
| 34 | #define MACB_IER 0x0028 | |
| 35 | #define MACB_IDR 0x002c | |
| 36 | #define MACB_IMR 0x0030 | |
| 37 | #define MACB_MAN 0x0034 | |
| 38 | #define MACB_PTR 0x0038 | |
| 39 | #define MACB_PFR 0x003c | |
| 40 | #define MACB_FTO 0x0040 | |
| 41 | #define MACB_SCF 0x0044 | |
| 42 | #define MACB_MCF 0x0048 | |
| 43 | #define MACB_FRO 0x004c | |
| 44 | #define MACB_FCSE 0x0050 | |
| 45 | #define MACB_ALE 0x0054 | |
| 46 | #define MACB_DTF 0x0058 | |
| 47 | #define MACB_LCOL 0x005c | |
| 48 | #define MACB_EXCOL 0x0060 | |
| 49 | #define MACB_TUND 0x0064 | |
| 50 | #define MACB_CSE 0x0068 | |
| 51 | #define MACB_RRE 0x006c | |
| 52 | #define MACB_ROVR 0x0070 | |
| 53 | #define MACB_RSE 0x0074 | |
| 54 | #define MACB_ELE 0x0078 | |
| 55 | #define MACB_RJA 0x007c | |
| 56 | #define MACB_USF 0x0080 | |
| 57 | #define MACB_STE 0x0084 | |
| 58 | #define MACB_RLE 0x0088 | |
| 59 | #define MACB_TPF 0x008c | |
| 60 | #define MACB_HRB 0x0090 | |
| 61 | #define MACB_HRT 0x0094 | |
| 62 | #define MACB_SA1B 0x0098 | |
| 63 | #define MACB_SA1T 0x009c | |
| 64 | #define MACB_SA2B 0x00a0 | |
| 65 | #define MACB_SA2T 0x00a4 | |
| 66 | #define MACB_SA3B 0x00a8 | |
| 67 | #define MACB_SA3T 0x00ac | |
| 68 | #define MACB_SA4B 0x00b0 | |
| 69 | #define MACB_SA4T 0x00b4 | |
| 70 | #define MACB_TID 0x00b8 | |
| 71 | #define MACB_TPQ 0x00bc | |
| 72 | #define MACB_USRIO 0x00c0 | |
| 73 | #define MACB_WOL 0x00c4 | |
| 74 | ||
| 75 | /* Bitfields in NCR */ | |
| 76 | #define MACB_LB_OFFSET 0 | |
| 77 | #define MACB_LB_SIZE 1 | |
| 78 | #define MACB_LLB_OFFSET 1 | |
| 79 | #define MACB_LLB_SIZE 1 | |
| 80 | #define MACB_RE_OFFSET 2 | |
| 81 | #define MACB_RE_SIZE 1 | |
| 82 | #define MACB_TE_OFFSET 3 | |
| 83 | #define MACB_TE_SIZE 1 | |
| 84 | #define MACB_MPE_OFFSET 4 | |
| 85 | #define MACB_MPE_SIZE 1 | |
| 86 | #define MACB_CLRSTAT_OFFSET 5 | |
| 87 | #define MACB_CLRSTAT_SIZE 1 | |
| 88 | #define MACB_INCSTAT_OFFSET 6 | |
| 89 | #define MACB_INCSTAT_SIZE 1 | |
| 90 | #define MACB_WESTAT_OFFSET 7 | |
| 91 | #define MACB_WESTAT_SIZE 1 | |
| 92 | #define MACB_BP_OFFSET 8 | |
| 93 | #define MACB_BP_SIZE 1 | |
| 94 | #define MACB_TSTART_OFFSET 9 | |
| 95 | #define MACB_TSTART_SIZE 1 | |
| 96 | #define MACB_THALT_OFFSET 10 | |
| 97 | #define MACB_THALT_SIZE 1 | |
| 98 | #define MACB_NCR_TPF_OFFSET 11 | |
| 99 | #define MACB_NCR_TPF_SIZE 1 | |
| 100 | #define MACB_TZQ_OFFSET 12 | |
| 101 | #define MACB_TZQ_SIZE 1 | |
| 102 | ||
| 103 | /* Bitfields in NCFGR */ | |
| 104 | #define MACB_SPD_OFFSET 0 | |
| 105 | #define MACB_SPD_SIZE 1 | |
| 106 | #define MACB_FD_OFFSET 1 | |
| 107 | #define MACB_FD_SIZE 1 | |
| 108 | #define MACB_BIT_RATE_OFFSET 2 | |
| 109 | #define MACB_BIT_RATE_SIZE 1 | |
| 110 | #define MACB_JFRAME_OFFSET 3 | |
| 111 | #define MACB_JFRAME_SIZE 1 | |
| 112 | #define MACB_CAF_OFFSET 4 | |
| 113 | #define MACB_CAF_SIZE 1 | |
| 114 | #define MACB_NBC_OFFSET 5 | |
| 115 | #define MACB_NBC_SIZE 1 | |
| 116 | #define MACB_NCFGR_MTI_OFFSET 6 | |
| 117 | #define MACB_NCFGR_MTI_SIZE 1 | |
| 118 | #define MACB_UNI_OFFSET 7 | |
| 119 | #define MACB_UNI_SIZE 1 | |
| 120 | #define MACB_BIG_OFFSET 8 | |
| 121 | #define MACB_BIG_SIZE 1 | |
| 122 | #define MACB_EAE_OFFSET 9 | |
| 123 | #define MACB_EAE_SIZE 1 | |
| 124 | #define MACB_CLK_OFFSET 10 | |
| 125 | #define MACB_CLK_SIZE 2 | |
| 126 | #define MACB_RTY_OFFSET 12 | |
| 127 | #define MACB_RTY_SIZE 1 | |
| 128 | #define MACB_PAE_OFFSET 13 | |
| 129 | #define MACB_PAE_SIZE 1 | |
| 130 | #define MACB_RBOF_OFFSET 14 | |
| 131 | #define MACB_RBOF_SIZE 2 | |
| 132 | #define MACB_RLCE_OFFSET 16 | |
| 133 | #define MACB_RLCE_SIZE 1 | |
| 134 | #define MACB_DRFCS_OFFSET 17 | |
| 135 | #define MACB_DRFCS_SIZE 1 | |
| 136 | #define MACB_EFRHD_OFFSET 18 | |
| 137 | #define MACB_EFRHD_SIZE 1 | |
| 138 | #define MACB_IRXFCS_OFFSET 19 | |
| 139 | #define MACB_IRXFCS_SIZE 1 | |
| 140 | ||
| 141 | /* Bitfields in NSR */ | |
| 142 | #define MACB_NSR_LINK_OFFSET 0 | |
| 143 | #define MACB_NSR_LINK_SIZE 1 | |
| 144 | #define MACB_MDIO_OFFSET 1 | |
| 145 | #define MACB_MDIO_SIZE 1 | |
| 146 | #define MACB_IDLE_OFFSET 2 | |
| 147 | #define MACB_IDLE_SIZE 1 | |
| 148 | ||
| 149 | /* Bitfields in TSR */ | |
| 150 | #define MACB_UBR_OFFSET 0 | |
| 151 | #define MACB_UBR_SIZE 1 | |
| 152 | #define MACB_COL_OFFSET 1 | |
| 153 | #define MACB_COL_SIZE 1 | |
| 154 | #define MACB_TSR_RLE_OFFSET 2 | |
| 155 | #define MACB_TSR_RLE_SIZE 1 | |
| 156 | #define MACB_TGO_OFFSET 3 | |
| 157 | #define MACB_TGO_SIZE 1 | |
| 158 | #define MACB_BEX_OFFSET 4 | |
| 159 | #define MACB_BEX_SIZE 1 | |
| 160 | #define MACB_COMP_OFFSET 5 | |
| 161 | #define MACB_COMP_SIZE 1 | |
| 162 | #define MACB_UND_OFFSET 6 | |
| 163 | #define MACB_UND_SIZE 1 | |
| 164 | ||
| 165 | /* Bitfields in RSR */ | |
| 166 | #define MACB_BNA_OFFSET 0 | |
| 167 | #define MACB_BNA_SIZE 1 | |
| 168 | #define MACB_REC_OFFSET 1 | |
| 169 | #define MACB_REC_SIZE 1 | |
| 170 | #define MACB_OVR_OFFSET 2 | |
| 171 | #define MACB_OVR_SIZE 1 | |
| 172 | ||
| 173 | /* Bitfields in ISR/IER/IDR/IMR */ | |
| 174 | #define MACB_MFD_OFFSET 0 | |
| 175 | #define MACB_MFD_SIZE 1 | |
| 176 | #define MACB_RCOMP_OFFSET 1 | |
| 177 | #define MACB_RCOMP_SIZE 1 | |
| 178 | #define MACB_RXUBR_OFFSET 2 | |
| 179 | #define MACB_RXUBR_SIZE 1 | |
| 180 | #define MACB_TXUBR_OFFSET 3 | |
| 181 | #define MACB_TXUBR_SIZE 1 | |
| 182 | #define MACB_ISR_TUND_OFFSET 4 | |
| 183 | #define MACB_ISR_TUND_SIZE 1 | |
| 184 | #define MACB_ISR_RLE_OFFSET 5 | |
| 185 | #define MACB_ISR_RLE_SIZE 1 | |
| 186 | #define MACB_TXERR_OFFSET 6 | |
| 187 | #define MACB_TXERR_SIZE 1 | |
| 188 | #define MACB_TCOMP_OFFSET 7 | |
| 189 | #define MACB_TCOMP_SIZE 1 | |
| 190 | #define MACB_ISR_LINK_OFFSET 9 | |
| 191 | #define MACB_ISR_LINK_SIZE 1 | |
| 192 | #define MACB_ISR_ROVR_OFFSET 10 | |
| 193 | #define MACB_ISR_ROVR_SIZE 1 | |
| 194 | #define MACB_HRESP_OFFSET 11 | |
| 195 | #define MACB_HRESP_SIZE 1 | |
| 196 | #define MACB_PFR_OFFSET 12 | |
| 197 | #define MACB_PFR_SIZE 1 | |
| 198 | #define MACB_PTZ_OFFSET 13 | |
| 199 | #define MACB_PTZ_SIZE 1 | |
| 200 | ||
| 201 | /* Bitfields in MAN */ | |
| 202 | #define MACB_DATA_OFFSET 0 | |
| 203 | #define MACB_DATA_SIZE 16 | |
| 204 | #define MACB_CODE_OFFSET 16 | |
| 205 | #define MACB_CODE_SIZE 2 | |
| 206 | #define MACB_REGA_OFFSET 18 | |
| 207 | #define MACB_REGA_SIZE 5 | |
| 208 | #define MACB_PHYA_OFFSET 23 | |
| 209 | #define MACB_PHYA_SIZE 5 | |
| 210 | #define MACB_RW_OFFSET 28 | |
| 211 | #define MACB_RW_SIZE 2 | |
| 212 | #define MACB_SOF_OFFSET 30 | |
| 213 | #define MACB_SOF_SIZE 2 | |
| 214 | ||
| 215 | /* Bitfields in USRIO */ | |
| 216 | #define MACB_MII_OFFSET 0 | |
| 217 | #define MACB_MII_SIZE 1 | |
| 218 | #define MACB_EAM_OFFSET 1 | |
| 219 | #define MACB_EAM_SIZE 1 | |
| 220 | #define MACB_TX_PAUSE_OFFSET 2 | |
| 221 | #define MACB_TX_PAUSE_SIZE 1 | |
| 222 | #define MACB_TX_PAUSE_ZERO_OFFSET 3 | |
| 223 | #define MACB_TX_PAUSE_ZERO_SIZE 1 | |
| 224 | ||
| 7263ef19 SP |
225 | /* Bitfields in USRIO (AT91) */ |
| 226 | #define MACB_RMII_OFFSET 0 | |
| 227 | #define MACB_RMII_SIZE 1 | |
| 228 | #define MACB_CLKEN_OFFSET 1 | |
| 229 | #define MACB_CLKEN_SIZE 1 | |
| 230 | ||
| 5c1fe1ff HS |
231 | /* Bitfields in WOL */ |
| 232 | #define MACB_IP_OFFSET 0 | |
| 233 | #define MACB_IP_SIZE 16 | |
| 234 | #define MACB_MAG_OFFSET 16 | |
| 235 | #define MACB_MAG_SIZE 1 | |
| 236 | #define MACB_ARP_OFFSET 17 | |
| 237 | #define MACB_ARP_SIZE 1 | |
| 238 | #define MACB_SA1_OFFSET 18 | |
| 239 | #define MACB_SA1_SIZE 1 | |
| 240 | #define MACB_WOL_MTI_OFFSET 19 | |
| 241 | #define MACB_WOL_MTI_SIZE 1 | |
| 242 | ||
| 243 | /* Constants for CLK */ | |
| 244 | #define MACB_CLK_DIV8 0 | |
| 245 | #define MACB_CLK_DIV16 1 | |
| 246 | #define MACB_CLK_DIV32 2 | |
| 247 | #define MACB_CLK_DIV64 3 | |
| 248 | ||
| 249 | /* Constants for MAN register */ | |
| 250 | #define MACB_MAN_SOF 1 | |
| 251 | #define MACB_MAN_WRITE 1 | |
| 252 | #define MACB_MAN_READ 2 | |
| 253 | #define MACB_MAN_CODE 2 | |
| 254 | ||
| 255 | /* Bit manipulation macros */ | |
| 256 | #define MACB_BIT(name) \ | |
| 257 | (1 << MACB_##name##_OFFSET) | |
| 258 | #define MACB_BF(name,value) \ | |
| 259 | (((value) & ((1 << MACB_##name##_SIZE) - 1)) \ | |
| 260 | << MACB_##name##_OFFSET) | |
| 261 | #define MACB_BFEXT(name,value)\ | |
| 262 | (((value) >> MACB_##name##_OFFSET) \ | |
| 263 | & ((1 << MACB_##name##_SIZE) - 1)) | |
| 264 | #define MACB_BFINS(name,value,old) \ | |
| 265 | (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \ | |
| 266 | << MACB_##name##_OFFSET)) \ | |
| 267 | | MACB_BF(name,value)) | |
| 268 | ||
| 269 | /* Register access macros */ | |
| 270 | #define macb_readl(port,reg) \ | |
| 271 | readl((port)->regs + MACB_##reg) | |
| 272 | #define macb_writel(port,reg,value) \ | |
| 273 | writel((value), (port)->regs + MACB_##reg) | |
| 274 | ||
| 275 | #endif /* __DRIVERS_MACB_H__ */ |