[J-u-boot.git] / include / ata.h

/*
 * (C) Copyright 2000
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * Most of the following information was derived from the document
 * "Information Technology - AT Attachment-3 Interface (ATA-3)"
 * which can be found at:
 * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
 * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
 * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
 */

#ifndef	_ATA_H
#define _ATA_H

/* Register addressing depends on the hardware design; for instance,
 * 8-bit (register) and 16-bit (data) accesses might use different
 * address spaces. This is implemented by the following definitions.
 */
#ifndef CFG_ATA_STRIDE
#define CFG_ATA_STRIDE	1
#endif

#define ATA_IO_DATA(x)	(CFG_ATA_DATA_OFFSET+((x) * CFG_ATA_STRIDE))
#define ATA_IO_REG(x)	(CFG_ATA_REG_OFFSET +((x) * CFG_ATA_STRIDE))
#define ATA_IO_ALT(x)	(CFG_ATA_ALT_OFFSET +((x) * CFG_ATA_STRIDE))

/*
 * I/O Register Descriptions
 */
#define ATA_DATA_REG	ATA_IO_DATA(0)
#define ATA_ERROR_REG	ATA_IO_REG(1)
#define ATA_SECT_CNT	ATA_IO_REG(2)
#define ATA_SECT_NUM	ATA_IO_REG(3)
#define ATA_CYL_LOW	ATA_IO_REG(4)
#define ATA_CYL_HIGH	ATA_IO_REG(5)
#define ATA_DEV_HD	ATA_IO_REG(6)
#define ATA_COMMAND	ATA_IO_REG(7)
#define ATA_DATA_EVEN	ATA_IO_REG(8)
#define ATA_DATA_ODD	ATA_IO_REG(9)
#define ATA_STATUS	ATA_COMMAND
#define ATA_DEV_CTL	ATA_IO_ALT(6)
#define ATA_LBA_LOW	ATA_SECT_NUM
#define ATA_LBA_MID	ATA_CYL_LOW
#define ATA_LBA_HIGH	ATA_CYL_HIGH
#define ATA_LBA_SEL	ATA_DEV_CTL

/*
 * Status register bits
 */
#define ATA_STAT_BUSY	0x80	/* Device Busy			*/
#define ATA_STAT_READY	0x40	/* Device Ready			*/
#define ATA_STAT_FAULT	0x20	/* Device Fault			*/
#define ATA_STAT_SEEK	0x10	/* Device Seek Complete		*/
#define ATA_STAT_DRQ	0x08	/* Data Request (ready)		*/
#define ATA_STAT_CORR	0x04	/* Corrected Data Error		*/
#define ATA_STAT_INDEX	0x02	/* Vendor specific		*/
#define ATA_STAT_ERR	0x01	/* Error			*/

/*
 * Device / Head Register Bits
 */
#define ATA_DEVICE(x)	((x & 1)<<4)
#define ATA_LBA		0xE0

/*
 * ATA Commands (only mandatory commands listed here)
 */
#define ATA_CMD_READ	0x20	/* Read Sectors (with retries)	*/
#define ATA_CMD_READN	0x21	/* Read Sectors ( no  retries)	*/
#define ATA_CMD_WRITE	0x30	/* Write Sectores (with retries)*/
#define ATA_CMD_WRITEN	0x31	/* Write Sectors  ( no  retries)*/
#define ATA_CMD_VRFY	0x40	/* Read Verify  (with retries)	*/
#define ATA_CMD_VRFYN	0x41	/* Read verify  ( no  retries)	*/
#define ATA_CMD_SEEK	0x70	/* Seek				*/
#define ATA_CMD_DIAG	0x90	/* Execute Device Diagnostic	*/
#define ATA_CMD_INIT	0x91	/* Initialize Device Parameters	*/
#define ATA_CMD_RD_MULT	0xC4	/* Read Multiple		*/
#define ATA_CMD_WR_MULT	0xC5	/* Write Multiple		*/
#define ATA_CMD_SETMULT	0xC6	/* Set Multiple Mode		*/
#define ATA_CMD_RD_DMA	0xC8	/* Read DMA (with retries)	*/
#define ATA_CMD_RD_DMAN	0xC9	/* Read DMS ( no  retries)	*/
#define ATA_CMD_WR_DMA	0xCA	/* Write DMA (with retries)	*/
#define ATA_CMD_WR_DMAN	0xCB	/* Write DMA ( no  retires)	*/
#define ATA_CMD_IDENT	0xEC	/* Identify Device		*/
#define ATA_CMD_SETF	0xEF	/* Set Features			*/
#define ATA_CMD_CHK_PWR	0xE5	/* Check Power Mode		*/

#define ATA_CMD_READ_EXT 0x24	/* Read Sectors (with retries)	with 48bit addressing */
#define ATA_CMD_WRITE_EXT	0x34	/* Write Sectores (with retries) with 48bit addressing */
#define ATA_CMD_VRFY_EXT	0x42	/* Read Verify	(with retries)	with 48bit addressing */

/*
 * ATAPI Commands
 */
#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */


#define ATAPI_CMD_INQUIRY 0x12
#define ATAPI_CMD_REQ_SENSE 0x03
#define ATAPI_CMD_READ_CAP 0x25
#define ATAPI_CMD_START_STOP 0x1B
#define ATAPI_CMD_READ_12 0xA8


#define ATA_GET_ERR()	inb(ATA_STATUS)
#define ATA_GET_STAT()	inb(ATA_STATUS)
#define ATA_OK_STAT(stat,good,bad)	(((stat)&((good)|(bad)))==(good))
#define ATA_BAD_R_STAT	(ATA_STAT_BUSY	| ATA_STAT_ERR)
#define ATA_BAD_W_STAT	(ATA_BAD_R_STAT	| ATA_STAT_FAULT)
#define ATA_BAD_STAT	(ATA_BAD_R_STAT	| ATA_STAT_DRQ)
#define ATA_DRIVE_READY	(ATA_READY_STAT	| ATA_STAT_SEEK)
#define ATA_DATA_READY	(ATA_STAT_DRQ)

#define ATA_BLOCKSIZE	512	/* bytes */
#define ATA_BLOCKSHIFT	9	/* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
#define ATA_SECTORWORDS	(512 / sizeof(unsigned long))

#ifndef ATA_RESET_TIME
#define ATA_RESET_TIME	60	/* spec allows up to 31 seconds */
#endif

/* ------------------------------------------------------------------------- */

/*
 * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
 */
typedef struct hd_driveid {
	unsigned short	config;		/* lots of obsolete bit flags */
	unsigned short	cyls;		/* "physical" cyls */
	unsigned short	reserved2;	/* reserved (word 2) */
	unsigned short	heads;		/* "physical" heads */
	unsigned short	track_bytes;	/* unformatted bytes per track */
	unsigned short	sector_bytes;	/* unformatted bytes per sector */
	unsigned short	sectors;	/* "physical" sectors per track */
	unsigned short	vendor0;	/* vendor unique */
	unsigned short	vendor1;	/* vendor unique */
	unsigned short	vendor2;	/* vendor unique */
	unsigned char	serial_no[20];	/* 0 = not_specified */
	unsigned short	buf_type;
	unsigned short	buf_size;	/* 512 byte increments; 0 = not_specified */
	unsigned short	ecc_bytes;	/* for r/w long cmds; 0 = not_specified */
	unsigned char	fw_rev[8];	/* 0 = not_specified */
	unsigned char	model[40];	/* 0 = not_specified */
	unsigned char	max_multsect;	/* 0=not_implemented */
	unsigned char	vendor3;	/* vendor unique */
	unsigned short	dword_io;	/* 0=not_implemented; 1=implemented */
	unsigned char	vendor4;	/* vendor unique */
	unsigned char	capability;	/* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
	unsigned short	reserved50;	/* reserved (word 50) */
	unsigned char	vendor5;	/* vendor unique */
	unsigned char	tPIO;		/* 0=slow, 1=medium, 2=fast */
	unsigned char	vendor6;	/* vendor unique */
	unsigned char	tDMA;		/* 0=slow, 1=medium, 2=fast */
	unsigned short	field_valid;	/* bits 0:cur_ok 1:eide_ok */
	unsigned short	cur_cyls;	/* logical cylinders */
	unsigned short	cur_heads;	/* logical heads */
	unsigned short	cur_sectors;	/* logical sectors per track */
	unsigned short	cur_capacity0;	/* logical total sectors on drive */
	unsigned short	cur_capacity1;	/*  (2 words, misaligned int)     */
	unsigned char	multsect;	/* current multiple sector count */
	unsigned char	multsect_valid;	/* when (bit0==1) multsect is ok */
	unsigned int	lba_capacity;	/* total number of sectors */
	unsigned short	dma_1word;	/* single-word dma info */
	unsigned short	dma_mword;	/* multiple-word dma info */
	unsigned short  eide_pio_modes; /* bits 0:mode3 1:mode4 */
	unsigned short  eide_dma_min;	/* min mword dma cycle time (ns) */
	unsigned short  eide_dma_time;	/* recommended mword dma cycle time (ns) */
	unsigned short  eide_pio;       /* min cycle time (ns), no IORDY  */
	unsigned short  eide_pio_iordy; /* min cycle time (ns), with IORDY */
	unsigned short	words69_70[2];	/* reserved words 69-70 */
	unsigned short	words71_74[4];	/* reserved words 71-74 */
	unsigned short  queue_depth;	/*  */
	unsigned short  words76_79[4];	/* reserved words 76-79 */
	unsigned short  major_rev_num;	/*  */
	unsigned short  minor_rev_num;	/*  */
	unsigned short  command_set_1;	/* bits 0:Smart 1:Security 2:Removable 3:PM */
	unsigned short	command_set_2;	/* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
	unsigned short  cfsse;		/* command set-feature supported extensions */
	unsigned short  cfs_enable_1;	/* command set-feature enabled */
	unsigned short  cfs_enable_2;	/* command set-feature enabled */
	unsigned short  csf_default;	/* command set-feature default */
	unsigned short  dma_ultra;	/*  */
	unsigned short	word89;		/* reserved (word 89) */
	unsigned short	word90;		/* reserved (word 90) */
	unsigned short	CurAPMvalues;	/* current APM values */
	unsigned short	word92;		/* reserved (word 92) */
	unsigned short	hw_config;	/* hardware config */
	unsigned short	words94_99[6];/* reserved words 94-99 */
	/*unsigned long long  lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */
	unsigned short	lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
	unsigned short	words104_125[22];/* reserved words 104-125 */
	unsigned short	last_lun;	/* reserved (word 126) */
	unsigned short	word127;	/* reserved (word 127) */
	unsigned short	dlf;		/* device lock function
					 * 15:9	reserved
					 * 8	security level 1:max 0:high
					 * 7:6	reserved
					 * 5	enhanced erase
					 * 4	expire
					 * 3	frozen
					 * 2	locked
					 * 1	en/disabled
					 * 0	capability
					 */
	unsigned short  csfo;		/* current set features options
					 * 15:4	reserved
					 * 3	auto reassign
					 * 2	reverting
					 * 1	read-look-ahead
					 * 0	write cache
					 */
	unsigned short	words130_155[26];/* reserved vendor words 130-155 */
	unsigned short	word156;
	unsigned short	words157_159[3];/* reserved vendor words 157-159 */
	unsigned short	words160_255[95];/* reserved words 160-255 */
} hd_driveid_t;


/*
 * PIO Mode Configuration
 *
 * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
 */

typedef struct {
	unsigned int	t_setup;	/* Setup  Time in [ns] or clocks	*/
	unsigned int	t_length;	/* Length Time in [ns] or clocks	*/
	unsigned int	t_hold;		/* Hold   Time in [ns] or clocks	*/
}
pio_config_t;

#define	IDE_MAX_PIO_MODE	4	/* max suppurted PIO mode		*/

/* ------------------------------------------------------------------------- */

#endif /* _ATA_H */
Commit	Line	Data
fe8c2806 WD	1	/*
	2	* (C) Copyright 2000
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* Most of the following information was derived from the document
	26	* "Information Technology - AT Attachment-3 Interface (ATA-3)"
	27	* which can be found at:
	28	* http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
	29	* ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
	30	* ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
	31	*/
	32
	33	#ifndef _ATA_H
	34	#define _ATA_H
	35
	36	/* Register addressing depends on the hardware design; for instance,
	37	* 8-bit (register) and 16-bit (data) accesses might use different
	38	* address spaces. This is implemented by the following definitions.
	39	*/
9fd5e31f WD	40	#ifndef CFG_ATA_STRIDE
	41	#define CFG_ATA_STRIDE 1
	42	#endif
fe8c2806	43
9fd5e31f WD	44	#define ATA_IO_DATA(x) (CFG_ATA_DATA_OFFSET+((x) * CFG_ATA_STRIDE))
	45	#define ATA_IO_REG(x) (CFG_ATA_REG_OFFSET +((x) * CFG_ATA_STRIDE))
	46	#define ATA_IO_ALT(x) (CFG_ATA_ALT_OFFSET +((x) * CFG_ATA_STRIDE))
fe8c2806 WD	47
	48	/*
	49	* I/O Register Descriptions
	50	*/
	51	#define ATA_DATA_REG ATA_IO_DATA(0)
	52	#define ATA_ERROR_REG ATA_IO_REG(1)
	53	#define ATA_SECT_CNT ATA_IO_REG(2)
	54	#define ATA_SECT_NUM ATA_IO_REG(3)
	55	#define ATA_CYL_LOW ATA_IO_REG(4)
	56	#define ATA_CYL_HIGH ATA_IO_REG(5)
	57	#define ATA_DEV_HD ATA_IO_REG(6)
	58	#define ATA_COMMAND ATA_IO_REG(7)
a522fa0e WD	59	#define ATA_DATA_EVEN ATA_IO_REG(8)
a522fa0e WD	60	#define ATA_DATA_ODD ATA_IO_REG(9)
fe8c2806 WD	61	#define ATA_STATUS ATA_COMMAND
	62	#define ATA_DEV_CTL ATA_IO_ALT(6)
	63	#define ATA_LBA_LOW ATA_SECT_NUM
	64	#define ATA_LBA_MID ATA_CYL_LOW
	65	#define ATA_LBA_HIGH ATA_CYL_HIGH
	66	#define ATA_LBA_SEL ATA_DEV_CTL
	67
	68	/*
	69	* Status register bits
	70	*/
	71	#define ATA_STAT_BUSY 0x80 /* Device Busy */
	72	#define ATA_STAT_READY 0x40 /* Device Ready */
	73	#define ATA_STAT_FAULT 0x20 /* Device Fault */
	74	#define ATA_STAT_SEEK 0x10 /* Device Seek Complete */
	75	#define ATA_STAT_DRQ 0x08 /* Data Request (ready) */
	76	#define ATA_STAT_CORR 0x04 /* Corrected Data Error */
	77	#define ATA_STAT_INDEX 0x02 /* Vendor specific */
	78	#define ATA_STAT_ERR 0x01 /* Error */
	79
	80	/*
	81	* Device / Head Register Bits
	82	*/
	83	#define ATA_DEVICE(x) ((x & 1)<<4)
	84	#define ATA_LBA 0xE0
	85
	86	/*
	87	* ATA Commands (only mandatory commands listed here)
	88	*/
	89	#define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */
	90	#define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */
	91	#define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/
	92	#define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/
	93	#define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */
	94	#define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */
	95	#define ATA_CMD_SEEK 0x70 /* Seek */
	96	#define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */
	97	#define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */
	98	#define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */
	99	#define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */
	100	#define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */
	101	#define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */
	102	#define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */
	103	#define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */
	104	#define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */
	105	#define ATA_CMD_IDENT 0xEC /* Identify Device */
	106	#define ATA_CMD_SETF 0xEF /* Set Features */
	107	#define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */
	108
c40b2956 WD	109	#define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */
	110	#define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */
	111	#define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */
	112
fe8c2806 WD	113	/*
	114	* ATAPI Commands
	115	*/
	116	#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
	117	#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */
	118
	119
	120	#define ATAPI_CMD_INQUIRY 0x12
	121	#define ATAPI_CMD_REQ_SENSE 0x03
	122	#define ATAPI_CMD_READ_CAP 0x25
	123	#define ATAPI_CMD_START_STOP 0x1B
	124	#define ATAPI_CMD_READ_12 0xA8
	125
	126
	127	#define ATA_GET_ERR() inb(ATA_STATUS)
	128	#define ATA_GET_STAT() inb(ATA_STATUS)
	129	#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)\|(bad)))==(good))
	130	#define ATA_BAD_R_STAT (ATA_STAT_BUSY \| ATA_STAT_ERR)
	131	#define ATA_BAD_W_STAT (ATA_BAD_R_STAT \| ATA_STAT_FAULT)
	132	#define ATA_BAD_STAT (ATA_BAD_R_STAT \| ATA_STAT_DRQ)
	133	#define ATA_DRIVE_READY (ATA_READY_STAT \| ATA_STAT_SEEK)
	134	#define ATA_DATA_READY (ATA_STAT_DRQ)
	135
	136	#define ATA_BLOCKSIZE 512 /* bytes */
	137	#define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
	138	#define ATA_SECTORWORDS (512 / sizeof(unsigned long))
	139
	140	#ifndef ATA_RESET_TIME
	141	#define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */
	142	#endif
	143
	144	/* ------------------------------------------------------------------------- */
	145
	146	/*
	147	* structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
	148	*/
	149	typedef struct hd_driveid {
	150	unsigned short config; /* lots of obsolete bit flags */
	151	unsigned short cyls; /* "physical" cyls */
	152	unsigned short reserved2; /* reserved (word 2) */
	153	unsigned short heads; /* "physical" heads */
	154	unsigned short track_bytes; /* unformatted bytes per track */
	155	unsigned short sector_bytes; /* unformatted bytes per sector */
	156	unsigned short sectors; /* "physical" sectors per track */
	157	unsigned short vendor0; /* vendor unique */
	158	unsigned short vendor1; /* vendor unique */
	159	unsigned short vendor2; /* vendor unique */
	160	unsigned char serial_no[20]; /* 0 = not_specified */
	161	unsigned short buf_type;
	162	unsigned short buf_size; /* 512 byte increments; 0 = not_specified */
	163	unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */
	164	unsigned char fw_rev[8]; /* 0 = not_specified */
	165	unsigned char model[40]; /* 0 = not_specified */
	166	unsigned char max_multsect; /* 0=not_implemented */
	167	unsigned char vendor3; /* vendor unique */
	168	unsigned short dword_io; /* 0=not_implemented; 1=implemented */
	169	unsigned char vendor4; /* vendor unique */
	170	unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
	171	unsigned short reserved50; /* reserved (word 50) */
	172	unsigned char vendor5; /* vendor unique */
	173	unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */
	174	unsigned char vendor6; /* vendor unique */
	175	unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */
	176	unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */
177	unsigned short cur_cyls; /* logical cylinders */
178	unsigned short cur_heads; /* logical heads */
179	unsigned short cur_sectors; /* logical sectors per track */
180	unsigned short cur_capacity0; /* logical total sectors on drive */
181	unsigned short cur_capacity1; /* (2 words, misaligned int) */
182	unsigned char multsect; /* current multiple sector count */
183	unsigned char multsect_valid; /* when (bit0==1) multsect is ok */
184	unsigned int lba_capacity; /* total number of sectors */
185	unsigned short dma_1word; /* single-word dma info */
186	unsigned short dma_mword; /* multiple-word dma info */
187	unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */
188	unsigned short eide_dma_min; /* min mword dma cycle time (ns) */
189	unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */
190	unsigned short eide_pio; /* min cycle time (ns), no IORDY */
191	unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */
192	unsigned short words69_70[2]; /* reserved words 69-70 */
193	unsigned short words71_74[4]; /* reserved words 71-74 */
194	unsigned short queue_depth; /* */
195	unsigned short words76_79[4]; /* reserved words 76-79 */
196	unsigned short major_rev_num; /* */
197	unsigned short minor_rev_num; /* */
198	unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */
c40b2956	199	unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
fe8c2806 WD	200	unsigned short cfsse; /* command set-feature supported extensions */
	201	unsigned short cfs_enable_1; /* command set-feature enabled */
	202	unsigned short cfs_enable_2; /* command set-feature enabled */
	203	unsigned short csf_default; /* command set-feature default */
	204	unsigned short dma_ultra; /* */
	205	unsigned short word89; /* reserved (word 89) */
	206	unsigned short word90; /* reserved (word 90) */
	207	unsigned short CurAPMvalues; /* current APM values */
	208	unsigned short word92; /* reserved (word 92) */
	209	unsigned short hw_config; /* hardware config */
c40b2956	210	unsigned short words94_99[6];/* reserved words 94-99 */
42dfe7a1	211	/unsigned long long lba48_capacity; /-- 4 16bit values containing lba 48 total number of sectors */
c40b2956 WD	212	unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
c40b2956 WD	213	unsigned short words104_125[22];/* reserved words 104-125 */
fe8c2806 WD	214	unsigned short last_lun; /* reserved (word 126) */
	215	unsigned short word127; /* reserved (word 127) */
	216	unsigned short dlf; /* device lock function
	217	* 15:9 reserved
	218	* 8 security level 1:max 0:high
	219	* 7:6 reserved
	220	* 5 enhanced erase
	221	* 4 expire
	222	* 3 frozen
	223	* 2 locked
	224	* 1 en/disabled
	225	* 0 capability
	226	*/
	227	unsigned short csfo; /* current set features options
	228	* 15:4 reserved
	229	* 3 auto reassign
	230	* 2 reverting
	231	* 1 read-look-ahead
	232	* 0 write cache
	233	*/
	234	unsigned short words130_155[26];/* reserved vendor words 130-155 */
	235	unsigned short word156;
	236	unsigned short words157_159[3];/* reserved vendor words 157-159 */
	237	unsigned short words160_255[95];/* reserved words 160-255 */
	238	} hd_driveid_t;
	239
	240
	241	/*
	242	* PIO Mode Configuration
	243	*
	244	* See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
	245	*/
	246
	247	typedef struct {
	248	unsigned int t_setup; /* Setup Time in [ns] or clocks */
	249	unsigned int t_length; /* Length Time in [ns] or clocks */
	250	unsigned int t_hold; /* Hold Time in [ns] or clocks */
	251	}
	252	pio_config_t;
	253
	254	#define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */
	255
	256	/* ------------------------------------------------------------------------- */
	257
	258	#endif /* _ATA_H */