[J-u-boot.git] / include / configs / cobra5272.h

/*
 * Configuation settings for the Sentec Cobra Board.
 *
 * (C) Copyright 2003 Josef Baumgartner <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/* ---
 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
 * Date: 2004-03-29
 * Author: Florian Schlote
 *
 * For a description of configuration options please refer also to the
 * general u-boot-1.x.x/README file
 * ---
 */

/* ---
 * board/config.h - configuration options, board specific
 * ---
 */

#ifndef _CONFIG_COBRA5272_H
#define _CONFIG_COBRA5272_H

/* ---
 * Define processor
 * possible values for Sentec board: only Coldfire M5272 processor supported
 * (please do not change)
 * ---
 */

#define CONFIG_MCF52x2			/* define processor family */
#define CONFIG_M5272			/* define processor type */

/* ---
 * Defines processor clock - important for correct timings concerning serial
 * interface etc.
 * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
 * ---
 */

#define CONFIG_SYS_HZ			1000
#define CONFIG_SYS_CLK			66000000
#define CONFIG_SYS_SDRAM_SIZE		16		/* SDRAM size in MB */

/* ---
 * Enable use of Ethernet
 * ---
 */
#define CONFIG_MCFFEC

/* Enable Dma Timer */
#define CONFIG_MCFTMR

/* ---
 * Define baudrate for UART1 (console output, tftp, ...)
 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
 * interface
 * ---
 */

#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT		(0)
#define CONFIG_BAUDRATE		19200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }

/* ---
 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
 * timeout acc. to your needs
 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
 * for 10 sec
 * ---
 */

#if 0
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
#endif

/* ---
 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
 * bootloader residing in flash ('chainloading'); if you want to use
 * chainloading or want to compile a u-boot binary that can be loaded into
 * RAM via BDM set
 *	"#if 0" to "#if 1"
 * You will need a first stage bootloader then, e. g. colilo or a working BDM
 * cable (Background Debug Mode)
 *
 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
 *
 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
 *
 * ---
 */

#if 0
#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
#endif

/* ---
 * Configuration for environment
 * Environment is embedded in u-boot in the second sector of the flash
 * ---
 */

#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_ENV_OFFSET		0x4000
#define CONFIG_ENV_SECT_SIZE	0x2000
#define CONFIG_ENV_IS_IN_FLASH	1
#else
#define CONFIG_ENV_ADDR		0xffe04000
#define CONFIG_ENV_SECT_SIZE	0x2000
#define CONFIG_ENV_IS_IN_FLASH	1
#endif


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_PING

#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_LOADB
#undef CONFIG_CMD_MII

#ifdef CONFIG_MCFFEC
#	define CONFIG_MII		1
#	define CONFIG_MII_INIT		1
#	define CONFIG_SYS_DISCOVER_PHY
#	define CONFIG_SYS_RX_ETH_BUFFER	8
#	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN

#	define CONFIG_SYS_FEC0_PINMUX		0
#	define CONFIG_SYS_FEC0_MIIBASE		CONFIG_SYS_FEC0_IOBASE
#	define MCFFEC_TOUT_LOOP		50000
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
#	ifndef CONFIG_SYS_DISCOVER_PHY
#		define FECDUPLEX	FULL
#		define FECSPEED		_100BASET
#	else
#		ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#			define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#		endif
#	endif			/* CONFIG_SYS_DISCOVER_PHY */
#endif

/*
 *-----------------------------------------------------------------------------
 * Define user parameters that have to be customized most likely
 *-----------------------------------------------------------------------------
 */

/*AUTOBOOT settings - booting images automatically by u-boot after power on*/

#define CONFIG_BOOTDELAY	5		/* used for autoboot, delay in
seconds u-boot will wait before starting defined (auto-)boot command, setting
to -1 disables delay, setting to 0 will too prevent access to u-boot command
interface: u-boot then has to reflashed */


/* The following settings will be contained in the environment block ; if you
want to use a neutral environment all those settings can be manually set in
u-boot: 'set' command */

#if 0

#define CONFIG_BOOTCOMMAND	"bootm 0xffe80000"	/*Autoboto command, please
enter a valid image address in flash */

#define CONFIG_BOOTARGS		" "			/* default bootargs that are
considered during boot */

/* User network settings */

#define CONFIG_ETHADDR 00:00:00:00:00:09	/* default ethernet MAC addr. */
#define CONFIG_IPADDR 192.168.100.2		/* default board IP address */
#define CONFIG_SERVERIP 192.168.100.1	/* default tftp server IP address */

#endif

#define CONFIG_SYS_PROMPT		"COBRA > "	/* Layout of u-boot prompt*/

#define CONFIG_SYS_LOAD_ADDR		0x20000		/*Defines default RAM address
from which user programs will be started */

/*---*/

#define CONFIG_SYS_LONGHELP				/* undef to save memory		*/

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size	*/
#else
#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

/*
 *-----------------------------------------------------------------------------
 * End of user parameters to be customized
 *-----------------------------------------------------------------------------
 */

/* ---
 * Defines memory range for test
 * ---
 */

#define CONFIG_SYS_MEMTEST_START	0x400
#define CONFIG_SYS_MEMTEST_END		0x380000

/* ---
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 * ---
 */

/* ---
 * Base register address
 * ---
 */

#define CONFIG_SYS_MBAR		0x10000000	/* Register Base Addrs */

/* ---
 * System Conf. Reg. & System Protection Reg.
 * ---
 */

#define CONFIG_SYS_SCR			0x0003
#define CONFIG_SYS_SPR			0xffff

/* ---
 * Ethernet settings
 * ---
 */

#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_ENET_BD_BASE	0x780000

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in internal SRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000	/* Size of used area in internal SRAM	*/
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 */
#define CONFIG_SYS_SDRAM_BASE		0x00000000

/*
 *-------------------------------------------------------------------------
 * RAM SIZE (is defined above)
 *-----------------------------------------------------------------------
 */

/* #define CONFIG_SYS_SDRAM_SIZE		16 */

/*
 *-----------------------------------------------------------------------
 */

#define CONFIG_SYS_FLASH_BASE		0xffe00000

#ifdef	CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_MONITOR_BASE	0x20000
#else
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
#endif

#define CONFIG_SYS_MONITOR_LEN		0x20000
#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
#define CONFIG_SYS_BOOTPARAMS_LEN	64*1024

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization ??
 */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
#define CONFIG_SYS_FLASH_ERASE_TOUT	1000	/* flash timeout */

/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CONFIG_SYS_CACHELINE_SIZE	16

#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 4)
#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
					 CF_ACR_EN | CF_ACR_SM_ALL)
#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
					 CF_CACR_DISD | CF_CACR_INVI | \
					 CF_CACR_CEIB | CF_CACR_DCM | \
					 CF_CACR_EUSP)

/*-----------------------------------------------------------------------
 * Memory bank definitions
 *
 * Please refer also to Motorola Coldfire user manual - Chapter XXX
 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
 */
#define CONFIG_SYS_BR0_PRELIM		0xFFE00201
#define CONFIG_SYS_OR0_PRELIM		0xFFE00014

#define CONFIG_SYS_BR1_PRELIM		0
#define CONFIG_SYS_OR1_PRELIM		0

#define CONFIG_SYS_BR2_PRELIM		0
#define CONFIG_SYS_OR2_PRELIM		0

#define CONFIG_SYS_BR3_PRELIM		0
#define CONFIG_SYS_OR3_PRELIM		0

#define CONFIG_SYS_BR4_PRELIM		0
#define CONFIG_SYS_OR4_PRELIM		0

#define CONFIG_SYS_BR5_PRELIM		0
#define CONFIG_SYS_OR5_PRELIM		0

#define CONFIG_SYS_BR6_PRELIM		0
#define CONFIG_SYS_OR6_PRELIM		0

#define CONFIG_SYS_BR7_PRELIM		0x00000701
#define CONFIG_SYS_OR7_PRELIM		0xFF00007C

/*-----------------------------------------------------------------------
 * LED config
 */
#define	LED_STAT_0	0xffff /*all LEDs off*/
#define	LED_STAT_1	0xfffe
#define	LED_STAT_2	0xfffd
#define	LED_STAT_3	0xfffb
#define	LED_STAT_4	0xfff7
#define	LED_STAT_5	0xffef
#define	LED_STAT_6	0xffdf
#define	LED_STAT_7	0xff00 /*all LEDs on*/

/*-----------------------------------------------------------------------
 * Port configuration (GPIO)
 */
#define CONFIG_SYS_PACNT		0x00000000		/* PortA control reg.: All pins are external
GPIO*/
#define CONFIG_SYS_PADDR		0x00FF			/* PortA direction reg.: PA7 to PA0 are outputs
(1^=output, 0^=input) */
#define CONFIG_SYS_PADAT		LED_STAT_0		/* PortA value reg.: Turn all LED off */
#define CONFIG_SYS_PBCNT		0x55554155		/* PortB control reg.: Ethernet/UART
configuration */
#define CONFIG_SYS_PBDDR		0x0000			/* PortB direction: All pins configured as inputs */
#define CONFIG_SYS_PBDAT		0x0000			/* PortB value reg. */
#define CONFIG_SYS_PDCNT		0x00000000		/* PortD control reg. */

#endif	/* _CONFIG_COBRA5272_H */
Commit	Line	Data
a562e1bd WD	1	/*
	2	* Configuation settings for the Sentec Cobra Board.
	3	*
	4	* (C) Copyright 2003 Josef Baumgartner <[email protected]>
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	/* ---
	26	* Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
	27	* Date: 2004-03-29
	28	* Author: Florian Schlote
	29	*
	30	* For a description of configuration options please refer also to the
	31	* general u-boot-1.x.x/README file
	32	* ---
	33	*/
	34
	35	/* ---
	36	* board/config.h - configuration options, board specific
	37	* ---
	38	*/
	39
	40	#ifndef _CONFIG_COBRA5272_H
	41	#define _CONFIG_COBRA5272_H
	42
	43	/* ---
	44	* Define processor
	45	* possible values for Sentec board: only Coldfire M5272 processor supported
	46	* (please do not change)
	47	* ---
	48	*/
	49
	50	#define CONFIG_MCF52x2 /* define processor family */
	51	#define CONFIG_M5272 /* define processor type */
	52
	53	/* ---
	54	* Defines processor clock - important for correct timings concerning serial
	55	* interface etc.
6d0f6bcf	56	* CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
a562e1bd WD	57	* ---
	58	*/
	59
6d0f6bcf JCPV	60	#define CONFIG_SYS_HZ 1000
	61	#define CONFIG_SYS_CLK 66000000
	62	#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
a562e1bd WD	63
	64	/* ---
	65	* Enable use of Ethernet
	66	* ---
	67	*/
6706424d	68	#define CONFIG_MCFFEC
a562e1bd	69
6706424d TL	70	/* Enable Dma Timer */
6706424d TL	71	#define CONFIG_MCFTMR
a562e1bd WD	72
	73	/* ---
	74	* Define baudrate for UART1 (console output, tftp, ...)
	75	* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
6d0f6bcf	76	* CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
a562e1bd WD	77	* interface
	78	* ---
	79	*/
	80
6706424d	81	#define CONFIG_MCFUART
6d0f6bcf	82	#define CONFIG_SYS_UART_PORT (0)
a562e1bd	83	#define CONFIG_BAUDRATE 19200
6d0f6bcf	84	#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
a562e1bd WD	85
	86	/* ---
	87	* set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
	88	* timeout acc. to your needs
	89	* #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
	90	* for 10 sec
	91	* ---
	92	*/
	93
	94	#if 0
	95	#define CONFIG_WATCHDOG
	96	#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
	97	#endif
	98
	99	/* ---
	100	* CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
	101	* bootloader residing in flash ('chainloading'); if you want to use
	102	* chainloading or want to compile a u-boot binary that can be loaded into
	103	* RAM via BDM set
53677ef1	104	* "#if 0" to "#if 1"
a562e1bd WD	105	* You will need a first stage bootloader then, e. g. colilo or a working BDM
	106	* cable (Background Debug Mode)
	107	*
	108	* Setting #if 0: u-boot will start from flash and relocate itself to RAM
	109	*
14d0a02a	110	* Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
a562e1bd WD	111	* in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
	112	*
	113	* ---
	114	*/
	115
	116	#if 0
	117	#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
	118	#endif
	119
	120	/* ---
	121	* Configuration for environment
	122	* Environment is embedded in u-boot in the second sector of the flash
	123	* ---
	124	*/
	125
	126	#ifndef CONFIG_MONITOR_IS_IN_RAM
0e8d1586 JCPV	127	#define CONFIG_ENV_OFFSET 0x4000
0e8d1586 JCPV	128	#define CONFIG_ENV_SECT_SIZE 0x2000
5a1aceb0	129	#define CONFIG_ENV_IS_IN_FLASH 1
a562e1bd	130	#else
0e8d1586 JCPV	131	#define CONFIG_ENV_ADDR 0xffe04000
0e8d1586 JCPV	132	#define CONFIG_ENV_SECT_SIZE 0x2000
5a1aceb0	133	#define CONFIG_ENV_IS_IN_FLASH 1
a562e1bd WD	134	#endif
a562e1bd WD	135
37e4f24b	136
80ff4f99 JL	137	/*
	138	* BOOTP options
	139	*/
	140	#define CONFIG_BOOTP_BOOTFILESIZE
	141	#define CONFIG_BOOTP_BOOTPATH
	142	#define CONFIG_BOOTP_GATEWAY
	143	#define CONFIG_BOOTP_HOSTNAME
	144
	145
37e4f24b JL	146	/*
37e4f24b JL	147	* Command line configuration.
a562e1bd	148	*/
37e4f24b JL	149	#include <config_cmd_default.h>
	150
	151	#define CONFIG_CMD_PING
a562e1bd	152
37e4f24b JL	153	#undef CONFIG_CMD_LOADS
	154	#undef CONFIG_CMD_LOADB
	155	#undef CONFIG_CMD_MII
a562e1bd	156
6706424d	157	#ifdef CONFIG_MCFFEC
6706424d	158	# define CONFIG_MII 1
0f3ba7e9	159	# define CONFIG_MII_INIT 1
6d0f6bcf JCPV	160	# define CONFIG_SYS_DISCOVER_PHY
	161	# define CONFIG_SYS_RX_ETH_BUFFER 8
	162	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
6706424d	163
6d0f6bcf JCPV	164	# define CONFIG_SYS_FEC0_PINMUX 0
6d0f6bcf JCPV	165	# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
53677ef1	166	# define MCFFEC_TOUT_LOOP 50000
6d0f6bcf JCPV	167	/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
6d0f6bcf JCPV	168	# ifndef CONFIG_SYS_DISCOVER_PHY
6706424d TL	169	# define FECDUPLEX FULL
	170	# define FECSPEED _100BASET
	171	# else
6d0f6bcf JCPV	172	# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
6d0f6bcf JCPV	173	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
6706424d	174	# endif
6d0f6bcf	175	# endif /* CONFIG_SYS_DISCOVER_PHY */
6706424d	176	#endif
a562e1bd WD	177
	178	/*
	179	*-----------------------------------------------------------------------------
	180	* Define user parameters that have to be customized most likely
	181	*-----------------------------------------------------------------------------
	182	*/
	183
	184	/AUTOBOOT settings - booting images automatically by u-boot after power on/
	185
	186	#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
	187	seconds u-boot will wait before starting defined (auto-)boot command, setting
	188	to -1 disables delay, setting to 0 will too prevent access to u-boot command
	189	interface: u-boot then has to reflashed */
	190
	191
	192	/* The following settings will be contained in the environment block ; if you
	193	want to use a neutral environment all those settings can be manually set in
	194	u-boot: 'set' command */
	195
	196	#if 0
	197
	198	#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
	199	enter a valid image address in flash */
	200
	201	#define CONFIG_BOOTARGS " " /* default bootargs that are
	202	considered during boot */
	203
	204	/* User network settings */
	205
	206	#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
	207	#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
	208	#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
	209
	210	#endif
	211
6d0f6bcf	212	#define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/
a562e1bd	213
6d0f6bcf	214	#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
a562e1bd WD	215	from which user programs will be started */
	216
	217	/---/
	218
6d0f6bcf	219	#define CONFIG_SYS_LONGHELP /* undef to save memory */
a562e1bd	220
37e4f24b	221	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	222	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
a562e1bd	223	#else
6d0f6bcf	224	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
a562e1bd	225	#endif
6d0f6bcf JCPV	226	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	227	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	228	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
a562e1bd WD	229
	230	/*
	231	*-----------------------------------------------------------------------------
	232	* End of user parameters to be customized
	233	*-----------------------------------------------------------------------------
	234	*/
	235
	236	/* ---
	237	* Defines memory range for test
	238	* ---
	239	*/
	240
6d0f6bcf JCPV	241	#define CONFIG_SYS_MEMTEST_START 0x400
6d0f6bcf JCPV	242	#define CONFIG_SYS_MEMTEST_END 0x380000
a562e1bd WD	243
	244	/* ---
	245	* Low Level Configuration Settings
	246	* (address mappings, register initial values, etc.)
	247	* You should know what you are doing if you make changes here.
	248	* ---
	249	*/
	250
	251	/* ---
	252	* Base register address
	253	* ---
	254	*/
	255
6d0f6bcf	256	#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
a562e1bd WD	257
	258	/* ---
	259	* System Conf. Reg. & System Protection Reg.
	260	* ---
	261	*/
	262
6d0f6bcf JCPV	263	#define CONFIG_SYS_SCR 0x0003
6d0f6bcf JCPV	264	#define CONFIG_SYS_SPR 0xffff
a562e1bd WD	265
	266	/* ---
	267	* Ethernet settings
	268	* ---
	269	*/
	270
6d0f6bcf JCPV	271	#define CONFIG_SYS_DISCOVER_PHY
6d0f6bcf JCPV	272	#define CONFIG_SYS_ENET_BD_BASE 0x780000
a562e1bd WD	273
	274	/*-----------------------------------------------------------------------
	275	* Definitions for initial stack pointer and data area (in internal SRAM)
	276	*/
6d0f6bcf	277	#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
553f0982	278	#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
25ddd1fb	279	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf	280	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
a562e1bd WD	281
	282	/*-----------------------------------------------------------------------
	283	* Start addresses for the final memory configuration
	284	* (Set up by the startup code)
6d0f6bcf	285	* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
a562e1bd	286	*/
6d0f6bcf	287	#define CONFIG_SYS_SDRAM_BASE 0x00000000
a562e1bd WD	288
	289	/*
	290	*-------------------------------------------------------------------------
	291	* RAM SIZE (is defined above)
	292	*-----------------------------------------------------------------------
	293	*/
	294
6d0f6bcf	295	/* #define CONFIG_SYS_SDRAM_SIZE 16 */
a562e1bd WD	296
	297	/*
	298	*-----------------------------------------------------------------------
	299	*/
	300
6d0f6bcf	301	#define CONFIG_SYS_FLASH_BASE 0xffe00000
a562e1bd WD	302
a562e1bd WD	303	#ifdef CONFIG_MONITOR_IS_IN_RAM
6d0f6bcf	304	#define CONFIG_SYS_MONITOR_BASE 0x20000
a562e1bd	305	#else
6d0f6bcf	306	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
a562e1bd WD	307	#endif
a562e1bd WD	308
6d0f6bcf JCPV	309	#define CONFIG_SYS_MONITOR_LEN 0x20000
	310	#define CONFIG_SYS_MALLOC_LEN (256 << 10)
	311	#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
a562e1bd WD	312
	313	/*
	314	* For booting Linux, the board info and command line data
	315	* have to be in the first 8 MB of memory, since this is
	316	* the maximum mapped by the Linux kernel during initialization ??
	317	*/
6d0f6bcf	318	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
a562e1bd WD	319
	320	/*-----------------------------------------------------------------------
	321	* FLASH organization
	322	*/
6d0f6bcf JCPV	323	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
	324	#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
	325	#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
a562e1bd WD	326
	327	/*-----------------------------------------------------------------------
	328	* Cache Configuration
	329	*/
6d0f6bcf	330	#define CONFIG_SYS_CACHELINE_SIZE 16
a562e1bd	331
dd9f054e	332	#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	333	CONFIG_SYS_INIT_RAM_SIZE - 8)
dd9f054e	334	#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	335	CONFIG_SYS_INIT_RAM_SIZE - 4)
dd9f054e TL	336	#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV \| CF_CACR_INVI)
	337	#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE \| \
	338	CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) \| \
	339	CF_ACR_EN \| CF_ACR_SM_ALL)
	340	#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB \| CF_CACR_CINV \| \
	341	CF_CACR_DISD \| CF_CACR_INVI \| \
	342	CF_CACR_CEIB \| CF_CACR_DCM \| \
	343	CF_CACR_EUSP)
	344
a562e1bd WD	345	/*-----------------------------------------------------------------------
	346	* Memory bank definitions
	347	*
	348	* Please refer also to Motorola Coldfire user manual - Chapter XXX
	349	* <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
	350	*/
6d0f6bcf JCPV	351	#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
6d0f6bcf JCPV	352	#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
a562e1bd	353
6d0f6bcf JCPV	354	#define CONFIG_SYS_BR1_PRELIM 0
6d0f6bcf JCPV	355	#define CONFIG_SYS_OR1_PRELIM 0
a562e1bd	356
6d0f6bcf JCPV	357	#define CONFIG_SYS_BR2_PRELIM 0
6d0f6bcf JCPV	358	#define CONFIG_SYS_OR2_PRELIM 0
a562e1bd	359
6d0f6bcf JCPV	360	#define CONFIG_SYS_BR3_PRELIM 0
6d0f6bcf JCPV	361	#define CONFIG_SYS_OR3_PRELIM 0
a562e1bd	362
6d0f6bcf JCPV	363	#define CONFIG_SYS_BR4_PRELIM 0
6d0f6bcf JCPV	364	#define CONFIG_SYS_OR4_PRELIM 0
a562e1bd	365
6d0f6bcf JCPV	366	#define CONFIG_SYS_BR5_PRELIM 0
6d0f6bcf JCPV	367	#define CONFIG_SYS_OR5_PRELIM 0
a562e1bd	368
6d0f6bcf JCPV	369	#define CONFIG_SYS_BR6_PRELIM 0
6d0f6bcf JCPV	370	#define CONFIG_SYS_OR6_PRELIM 0
a562e1bd	371
6d0f6bcf JCPV	372	#define CONFIG_SYS_BR7_PRELIM 0x00000701
6d0f6bcf JCPV	373	#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
a562e1bd WD	374
	375	/*-----------------------------------------------------------------------
	376	* LED config
	377	*/
	378	#define LED_STAT_0 0xffff /all LEDs off/
	379	#define LED_STAT_1 0xfffe
	380	#define LED_STAT_2 0xfffd
	381	#define LED_STAT_3 0xfffb
	382	#define LED_STAT_4 0xfff7
	383	#define LED_STAT_5 0xffef
	384	#define LED_STAT_6 0xffdf
	385	#define LED_STAT_7 0xff00 /all LEDs on/
	386
	387	/*-----------------------------------------------------------------------
	388	* Port configuration (GPIO)
	389	*/
6d0f6bcf	390	#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
a562e1bd	391	GPIO*/
6d0f6bcf	392	#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
a562e1bd	393	(1^=output, 0^=input) */
6d0f6bcf JCPV	394	#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
6d0f6bcf JCPV	395	#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
a562e1bd	396	configuration */
6d0f6bcf JCPV	397	#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
	398	#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
	399	#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
a562e1bd WD	400
a562e1bd WD	401	#endif /* _CONFIG_COBRA5272_H */