]> Git Repo - J-u-boot.git/blame - include/configs/mx53smd.h
mmc: complete unfinished move of CONFIG_MMC
[J-u-boot.git] / include / configs / mx53smd.h
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1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
c4c596fb 4 * Configuration settings for the MX53SMD Freescale board.
860b32ee 5 *
3765b3e7 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_MX53
13
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14#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
15
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16#include <asm/arch/imx-regs.h>
17
18#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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19#define CONFIG_SETUP_MEMORY_TAGS
20#define CONFIG_INITRD_TAG
fd622f23 21#define CONFIG_REVISION_TAG
860b32ee 22
18fb0e3c 23#define CONFIG_SYS_FSL_CLK
5a416df0 24
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25/* Size of malloc() pool */
26#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
27
28#define CONFIG_BOARD_EARLY_INIT_F
29#define CONFIG_MXC_GPIO
30
31#define CONFIG_MXC_UART
40f6fffe 32#define CONFIG_MXC_UART_BASE UART1_BASE
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33
34/* I2C Configs */
b089d039 35#define CONFIG_SYS_I2C
36#define CONFIG_SYS_I2C_MXC
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37#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
38#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 39#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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40
41/* MMC Configs */
42#define CONFIG_FSL_ESDHC
43#define CONFIG_SYS_FSL_ESDHC_ADDR 0
44#define CONFIG_SYS_FSL_ESDHC_NUM 1
45
860b32ee 46#define CONFIG_GENERIC_MMC
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47#define CONFIG_DOS_PARTITION
48
49/* Eth Configs */
50#define CONFIG_HAS_ETH1
860b32ee 51#define CONFIG_MII
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52
53#define CONFIG_FEC_MXC
54#define IMX_FEC_BASE FEC_BASE_ADDR
55#define CONFIG_FEC_MXC_PHYADDR 0x1F
56
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57/* allow to overwrite serial and ethaddr */
58#define CONFIG_ENV_OVERWRITE
59#define CONFIG_CONS_INDEX 1
60#define CONFIG_BAUDRATE 115200
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61
62/* Command definition */
860b32ee 63
28b119e9 64#define CONFIG_ETHPRIME "FEC0"
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65
66#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
67#define CONFIG_SYS_TEXT_BASE 0x77800000
68
69#define CONFIG_EXTRA_ENV_SETTINGS \
70 "script=boot.scr\0" \
71 "uimage=uImage\0" \
72 "mmcdev=0\0" \
73 "mmcpart=2\0" \
74 "mmcroot=/dev/mmcblk0p3 rw\0" \
75 "mmcrootfstype=ext3 rootwait\0" \
76 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
77 "root=${mmcroot} " \
78 "rootfstype=${mmcrootfstype}\0" \
79 "loadbootscript=" \
80 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
81 "bootscript=echo Running bootscript from mmc ...; " \
82 "source\0" \
83 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
84 "mmcboot=echo Booting from mmc ...; " \
85 "run mmcargs; " \
86 "bootm\0" \
87 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
88 "root=/dev/nfs " \
89 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
90 "netboot=echo Booting from net ...; " \
91 "run netargs; " \
92 "dhcp ${uimage}; bootm\0" \
93
94#define CONFIG_BOOTCOMMAND \
66968110 95 "mmc dev ${mmcdev}; if mmc rescan; then " \
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96 "if run loadbootscript; then " \
97 "run bootscript; " \
98 "else " \
99 "if run loaduimage; then " \
100 "run mmcboot; " \
101 "else run netboot; " \
102 "fi; " \
103 "fi; " \
104 "else run netboot; fi"
105#define CONFIG_ARP_TIMEOUT 200UL
106
107/* Miscellaneous configurable options */
108#define CONFIG_SYS_LONGHELP /* undef to save memory */
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109#define CONFIG_AUTO_COMPLETE
110#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
111
112/* Print Buffer Size */
113#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
114#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
115#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
116
117#define CONFIG_SYS_MEMTEST_START 0x70000000
869aed7b 118#define CONFIG_SYS_MEMTEST_END 0x70010000
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119
120#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
121
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122#define CONFIG_CMDLINE_EDITING
123
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124/* Physical Memory Map */
125#define CONFIG_NR_DRAM_BANKS 2
126#define PHYS_SDRAM_1 CSD0_BASE_ADDR
127#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
128#define PHYS_SDRAM_2 CSD1_BASE_ADDR
129#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
130#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
131
132#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
133#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
134#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
135
136#define CONFIG_SYS_INIT_SP_OFFSET \
137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
138#define CONFIG_SYS_INIT_SP_ADDR \
139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
140
141/* FLASH and environment organization */
142#define CONFIG_SYS_NO_FLASH
143
144#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
145#define CONFIG_ENV_SIZE (8 * 1024)
146#define CONFIG_ENV_IS_IN_MMC
147#define CONFIG_SYS_MMC_ENV_DEV 0
148
860b32ee 149#endif /* __CONFIG_H */
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