[J-u-boot.git] / drivers / mtd / spi / sf_params.c

/*
 * SPI flash Params table
 *
 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <spi_flash.h>

#include "sf_internal.h"

/* SPI/QSPI flash device params structure */
const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	0,		    SECT_4K},
	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	0,		    SECT_4K},
	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	0,		    SECT_4K},
	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	0,		    SECT_4K},
	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	0,		    SECT_4K},
	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
	{"AT25DF321",      0x1f4701, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON		/* EON */
	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	0,			  0},
	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	0,			  0},
	{"EN25S64",	   0x1c3817, 0x0,	64 * 1024,   128,	0,			  0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
	{"MX25L2006E",	   0xc22012, 0x0,	64 * 1024,     4,	0,			  0},
	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	0,			  0},
	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	0,			  0},
	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	0,			  0},
	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	0,			  0},
	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	0,			  0},
	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256, RD_FULL,		     WR_QPP},
	{"MX25L25635F",	   0xc22019, 0x0,	64 * 1024,   512, RD_FULL,		     WR_QPP},
	{"MX25L51235F",	   0xc2201a, 0x0,	64 * 1024,  1024, RD_FULL,		     WR_QPP},
	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256, RD_FULL,		     WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	0,			  0},
	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	0,			  0},
	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	0,			  0},
	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	0,			  0},
	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64, RD_FULL,		     WR_QPP},
	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256, RD_FULL,		     WR_QPP},
	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64, RD_FULL,		     WR_QPP},
	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128, RD_FULL,		     WR_QPP},
	{"S25FL128S_256K", 0x012018, 0x4d00,   256 * 1024,    64, RD_FULL,		     WR_QPP},
	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256, RD_FULL,		     WR_QPP},
	{"S25FL256S_256K", 0x010219, 0x4d00,   256 * 1024,   128, RD_FULL,		     WR_QPP},
	{"S25FL256S_64K",  0x010219, 0x4d01,	64 * 1024,   512, RD_FULL,		     WR_QPP},
	{"S25FL512S_256K", 0x010220, 0x4d00,   256 * 1024,   256, RD_FULL,		     WR_QPP},
	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024, RD_FULL,		     WR_QPP},
	{"S25FL512S_512K", 0x010220, 0x4f00,   256 * 1024,   256, RD_FULL,		     WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
	{"M25P10",	   0x202011, 0x0,	32 * 1024,     4,	0,			  0},
	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	0,			  0},
	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	0,			  0},
	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	0,			  0},
	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	0,			  0},
	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	0,			  0},
	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	0,			  0},
	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	0,			  0},
	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256, RD_FULL,		     WR_QPP},
	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, RD_FULL,		     WR_QPP},
	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST		/* SST */
	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,	0,          SECT_4K | SST_WP},
	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,	0,	    SECT_4K | SST_WP},
	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,	0,	    SECT_4K | SST_WP},
	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,	0,	    SECT_4K | SST_WP},
	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,	0,	    SECT_4K | SST_WP},
	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,       0,          SECT_4K | SST_WP},
	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,       0,	    SECT_4K | SST_WP},
	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,       0,	    SECT_4K | SST_WP},
	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,       0,	    SECT_4K | SST_WP},
#endif
#ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,	0,		           0},
	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,	0,		           0},
	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,	0,		           0},
	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,	0,		     SECT_4K},
	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,	0,		     SECT_4K},
	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,	0,		     SECT_4K},
	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128, RD_FULL,	    WR_QPP | SECT_4K},
	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256, RD_FULL,	    WR_QPP | SECT_4K},
#endif
	{},	/* Empty entry to terminate the list */
	/*
	 * Note:
	 * Below paired flash devices has similar spi_flash params.
	 * (S25FL129P_64K, S25FL128S_64K)
	 * (W25Q80BL, W25Q80BV)
	 * (W25Q16CL, W25Q16DV)
	 * (W25Q32BV, W25Q32FV_SPI)
	 * (W25Q64CV, W25Q64FV_SPI)
	 * (W25Q128BV, W25Q128FV_SPI)
	 * (W25Q32DW, W25Q32FV_QPI)
	 * (W25Q64DW, W25Q64FV_QPI)
	 * (W25Q128FW, W25Q128FV_QPI)
	 */
};
Commit	Line	Data
33adfb5f JT	1	/*
	2	* SPI flash Params table
	3	*
	4	* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#include <common.h>
	10	#include <spi_flash.h>
	11
	12	#include "sf_internal.h"
	13
	14	/* SPI/QSPI flash device params structure */
	15	const struct spi_flash_params spi_flash_params_table[] = {
	16	#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
	17	{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0, SECT_4K},
	18	{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0, SECT_4K},
	19	{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0, SECT_4K},
	20	{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0, SECT_4K},
	21	{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0, SECT_4K},
	22	{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0, SECT_4K},
	23	{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0, SECT_4K},
	24	{"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, 0, SECT_4K},
	25	#endif
	26	#ifdef CONFIG_SPI_FLASH_EON /* EON */
	27	{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0, 0},
	28	{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	29	{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0, 0},
	30	{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0, 0},
	31	#endif
	32	#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
	33	{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	34	{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	35	#endif
	36	#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
	37	{"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0, 0},
	38	{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0, 0},
	39	{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0, 0},
	40	{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0, 0},
	41	{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0, 0},
	42	{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0, 0},
5bb30f1a JT	43	{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
	44	{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP},
	45	{"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP},
	46	{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
33adfb5f JT	47	#endif
	48	#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
	49	{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0, 0},
	50	{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0, 0},
	51	{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0, 0},
	52	{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0, 0},
	53	{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP},
	54	{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP},
	55	{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP},
	56	{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP},
cfa90a63	57	{"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL, WR_QPP},
33adfb5f	58	{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP},
c1f93259	59	{"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP},
33adfb5f	60	{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP},
c1f93259	61	{"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP},
33adfb5f	62	{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP},
04728086	63	{"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP},
33adfb5f JT	64	#endif
	65	#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
	66	{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0, 0},
	67	{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0, 0},
	68	{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0, 0},
	69	{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0, 0},
	70	{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0, 0},
	71	{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0},
	72	{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0},
	73	{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0},
	74	{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP \| SECT_4K},
	75	{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP \| SECT_4K},
	76	{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP \| SECT_4K},
	77	{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP \| SECT_4K},
35a55fb5 SDPP	78	{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
35a55fb5 SDPP	79	{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
33adfb5f JT	80	{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP \| SECT_4K},
	81	{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP \| SECT_4K},
	82	{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP \| E_FSR \| SECT_4K},
	83	{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP \| E_FSR \| SECT_4K},
	84	{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP \| E_FSR \| SECT_4K},
	85	{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP \| E_FSR \| SECT_4K},
	86	#endif
	87	#ifdef CONFIG_SPI_FLASH_SST /* SST */
	88	{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
	89	{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
	90	{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, 0, SECT_4K \| SST_WP},
	91	{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, 0, SECT_4K \| SST_WP},
	92	{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0, SECT_4K},
	93	{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, 0, SECT_4K \| SST_WP},
	94	{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, 0, SECT_4K \| SST_WP},
	95	{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, 0, SECT_4K \| SST_WP},
	96	{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
	97	{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
	98	#endif
	99	#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
	100	{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0, 0},
	101	{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0, 0},
	102	{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0, 0},
	103	{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0, SECT_4K},
	104	{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0, SECT_4K},
	105	{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	106	{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	107	{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP \| SECT_4K},
	108	{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP \| SECT_4K},
	109	{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP \| SECT_4K},
	110	{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP \| SECT_4K},
	111	{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP \| SECT_4K},
	112	{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP \| SECT_4K},
	113	{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP \| SECT_4K},
	114	{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP \| SECT_4K},
	115	{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP \| SECT_4K},
	116	{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP \| SECT_4K},
	117	{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP \| SECT_4K},
	118	#endif
bf1a86fc	119	{}, /* Empty entry to terminate the list */
33adfb5f JT	120	/*
	121	* Note:
	122	* Below paired flash devices has similar spi_flash params.
	123	* (S25FL129P_64K, S25FL128S_64K)
	124	* (W25Q80BL, W25Q80BV)
	125	* (W25Q16CL, W25Q16DV)
	126	* (W25Q32BV, W25Q32FV_SPI)
	127	* (W25Q64CV, W25Q64FV_SPI)
	128	* (W25Q128BV, W25Q128FV_SPI)
	129	* (W25Q32DW, W25Q32FV_QPI)
	130	* (W25Q64DW, W25Q64FV_QPI)
	131	* (W25Q128FW, W25Q128FV_QPI)
	132	*/
	133	};