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3 | U-Boot for Wind River SBC834x Boards | |
4 | ==================================== | |
5 | ||
6 | ||
7 | The Wind River SBC834x board is a 6U form factor (not CPCI) reference | |
8 | design that uses the MPC8347E or MPC8349E processor. U-Boot support | |
9 | for this board is heavily based on the existing U-Boot support for | |
10 | Freescale MPC8349 reference boards. | |
11 | ||
12 | Support has been primarily tested on the SBC8349 version of the board, | |
13 | although earlier versions were also tested on the SBC8347. The primary | |
14 | difference in the two is the level of PCI functionality. | |
15 | ||
16 | http://www.windriver.com/products/OCD/SBC8347E_49E/ | |
17 | ||
18 | ||
19 | Flash Details: | |
20 | ============== | |
21 | ||
22 | The flash type is intel 28F640Jx (4096x16) [one device]. Base address | |
23 | is 0xFF80_0000 which is also where the Hardware Reset Configuration | |
24 | Word (HRCW) is stored. Caution should be used to not overwrite the | |
25 | HRCW, or "CF RCW" with a Wind River ICE will be required to restore | |
26 | the HRCW and allow the board to enter background mode for further | |
27 | steps in the flash process. | |
28 | ||
29 | ||
30 | Restoring a corrupted or missing flash image: | |
31 | ============================================= | |
32 | ||
33 | Details for storing U-boot to flash using a Wind River ICE can be found | |
34 | on page 19 of the board manual (request ERG-00328-001). The following | |
35 | is a summary of that information: | |
36 | ||
37 | - Connect ICE and establish connection to it from WorkBench/OCD. | |
38 | - Ensure you have background mode (BKM) in the OCD terminal window. | |
39 | - Select the appropriate flash type (listed above) | |
40 | - Prepare a u-boot image by using the Wind River Convert utility; | |
41 | by using "Convert and Add file" on the ELF file from your build. | |
42 | Convert from FFF0_0000 to FFFF_FFFF (or to FFF3_FFFF if you are | |
43 | trying to preserve your old environment settings). | |
44 | - Set the start address of the erase/flash process to FFF0_0000 | |
45 | - Set the target RAM required to 64kB. | |
46 | - Select sectors for erasing (see note on enviroment below) | |
47 | - Select Erase and Reprogram. | |
48 | ||
49 | Note that some versions of the register files used with Workbench | |
50 | would zero some TSEC registers, which inhibits ethernet operation | |
51 | by u-boot when this register file is played to the target. Using | |
52 | "INN" in the OCD terminal window instead of "IN" before the "GO" | |
53 | will not play the register file, and allow u-boot to use the TSEC | |
54 | interface while executed from the ICE "GO" command. | |
55 | ||
56 | Alternatively, you can locate the register file which will be named | |
57 | WRS_SBC8349_PCT00328001.reg or similar) and "REM" out all the lines | |
58 | beginning with "SCGA TSEC1" and "SCGA TSEC2". This allows you to | |
59 | use all the remaining register file content. | |
60 | ||
61 | If you wish to preserve your prior U-Boot environment settings, | |
62 | then convert (and erase to) 0xFFF3FFFF instead of 0xFFFFFFFF. | |
63 | The size for converting (and erasing) must be at least as large | |
64 | as u-boot.bin. | |
65 | ||
66 | ||
67 | Updating U-Boot with U-Boot: | |
68 | ============================ | |
69 | ||
70 | This procedure is very similar to other boards that have u-boot installed. | |
71 | Assuming that the network has been configured, and that the new u-boot.bin | |
72 | has been copied to the TFTP server, the commands are: | |
73 | ||
74 | tftp 200000 u-boot.bin | |
75 | protect off all | |
76 | erase fff00000 fff3ffff | |
77 | cp.b 200000 fff00000 3ffff | |
78 | protect on all | |
79 | ||
80 | ||
81 | PCI: | |
82 | ==== | |
83 | ||
84 | This board and U-Boot have been tested with PCI built in, on a SBC8349 | |
85 | and confirmed that the "pci" command showed the intel e1000 that was | |
86 | present in the PCI slot. Note that if a 33MHz 32bit card is inserted | |
87 | in the slot, then the whole board will clock down to a 33MHz base | |
88 | clock instead of the default 66MHz. This will change the baud clocks | |
89 | and mess up your serial console output. If you want to use a 33MHz PCI | |
90 | card, then you should build a U-Boot with #undef PCI_66M in the | |
91 | include/configs/sbc8349.h and store this to flash prior to powering down | |
92 | the board and inserting the 33MHz PCI card. | |
93 | ||
94 | By default PCI support is disabled to better support very early | |
95 | revision MPC834x chips with possible PCI issues. Also PCI support is | |
96 | untested on the sbc8347 variants at this point in time. | |
97 | ||
98 | ||
99 | Paul Gortmaker, 01/2007 |