[J-u-boot.git] / include / configs / socfpga_arria10_socdk.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  Copyright (C) 2015-2019 Altera Corporation <www.altera.com>
 */

#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
#define __CONFIG_SOCFGPA_ARRIA10_H__

#include <asm/arch/base_addr_a10.h>

/* Booting Linux */
#define CONFIG_LOADADDR		0x01000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/*
 * U-Boot general configurations
 */

/* Memory configurations  */
#define PHYS_SDRAM_1_SIZE		0x40000000

/*
 * Serial / UART configurations
 */
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}

/*
 * L4 OSC1 Timer 0
 */
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL			0xFFFFFFFF

/*
 * Flash configurations
 */
#define CONFIG_SYS_MAX_FLASH_BANKS     1

/* SPL memory allocation configuration, this is for FAT implementation */
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00015000

/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>

#endif	/* __CONFIG_SOCFGPA_ARRIA10_H__ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0 */
1b259403	2	/*
da0d5f6f	3	* Copyright (C) 2015-2019 Altera Corporation <www.altera.com>
1b259403 LFT	4	*/
	5
	6	#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
	7	#define __CONFIG_SOCFGPA_ARRIA10_H__
	8
	9	#include <asm/arch/base_addr_a10.h>
91d27a17	10
1b259403 LFT	11	/* Booting Linux */
	12	#define CONFIG_LOADADDR 0x01000000
	13	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	14
	15	/*
	16	* U-Boot general configurations
	17	*/
1b259403 LFT	18
	19	/* Memory configurations */
	20	#define PHYS_SDRAM_1_SIZE 0x40000000
	21
1b259403 LFT	22	/*
	23	* Serial / UART configurations
	24	*/
	25	#define CONFIG_SYS_NS16550_MEM32
	26	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
	27
	28	/*
	29	* L4 OSC1 Timer 0
	30	*/
	31	/* reload value when timer count to zero */
	32	#define TIMER_LOAD_VAL 0xFFFFFFFF
	33
	34	/*
	35	* Flash configurations
	36	*/
	37	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	38
da0d5f6f TFC	39	/* SPL memory allocation configuration, this is for FAT implementation */
	40	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000
	41
1b259403 LFT	42	/* The rest of the configuration is shared */
	43	#include <configs/socfpga_common.h>
	44
	45	#endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */