[J-u-boot.git] / include / configs / armadillo-800eva.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Configuation settings for the bonito board
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 */

#ifndef __ARMADILLO_800EVA_H
#define __ARMADILLO_800EVA_H

#define CONFIG_SH_GPIO_PFC

#include <asm/arch/rmobile.h>

#define BOARD_LATE_INIT

#define CONFIG_TMU_TIMER
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER	(TMU_BASE + 0xc)	/* TCNT0 */
#define CONFIG_SYS_TIMER_RATE		(CONFIG_SYS_CLK_FREQ / 4)

/* STACK */
#define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
#define STACK_AREA_SIZE				0xC000
#define LOW_LEVEL_MERAM_STACK	\
		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)

/* MEMORY */
#define ARMADILLO_800EVA_SDRAM_BASE	0x40000000
#define ARMADILLO_800EVA_SDRAM_SIZE	(512 * 1024 * 1024)

#define CONFIG_SYS_PBSIZE		256
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }

/* SCIF */
#define CONFIG_CONS_SCIF1
#define SCIF0_BASE		0xe6c40000
#define SCIF1_BASE		0xe6c50000
#define SCIF2_BASE		0xe6c60000
#define SCIF4_BASE		0xe6c80000
#define	CONFIG_SCIF_A

#undef	CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE		(ARMADILLO_800EVA_SDRAM_SIZE)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
					 64 * 1024 * 1024)

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

/* FLASH */
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_MAX_FLASH_SECT	512
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }

#define CONFIG_SYS_FLASH_ERASE_TOUT	3000
#define CONFIG_SYS_FLASH_WRITE_TOUT	3000
#define CONFIG_SYS_FLASH_LOCK_TOUT	3000
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000

/* ENV setting */
#define CONFIG_ENV_OVERWRITE	1

/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT	0
#define CONFIG_SH_ETHER_PHY_ADDR	0x0
#define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
#define CONFIG_SH_ETHER_SH7734_MII	(0x01)
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_BITBANGMII_MULTI

/* Board Clock */
#define CONFIG_SYS_CLK_FREQ	50000000
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ

#endif	/* __ARMADILLO_800EVA_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
1a31ca4a HS	2	/*
	3	* Configuation settings for the bonito board
	4	*
	5	* Copyright (C) 2012 Renesas Solutions Corp.
1a31ca4a HS	6	*/
	7
	8	#ifndef __ARMADILLO_800EVA_H
	9	#define __ARMADILLO_800EVA_H
	10
1a31ca4a HS	11	#define CONFIG_SH_GPIO_PFC
	12
	13	#include <asm/arch/rmobile.h>
	14
1a31ca4a HS	15	#define BOARD_LATE_INIT
1a31ca4a HS	16
1a31ca4a	17	#define CONFIG_TMU_TIMER
0e286c52 MV	18	#define CONFIG_SYS_TIMER_COUNTS_DOWN
	19	#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
	20	#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
1a31ca4a HS	21
	22	/* STACK */
	23	#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
	24	#define STACK_AREA_SIZE 0xC000
	25	#define LOW_LEVEL_MERAM_STACK \
	26	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
	27
	28	/* MEMORY */
	29	#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
	30	#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
	31
1a31ca4a	32	#define CONFIG_SYS_PBSIZE 256
1a31ca4a HS	33	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
	34
	35	/* SCIF */
1a31ca4a HS	36	#define CONFIG_CONS_SCIF1
	37	#define SCIF0_BASE 0xe6c40000
	38	#define SCIF1_BASE 0xe6c50000
	39	#define SCIF2_BASE 0xe6c60000
	40	#define SCIF4_BASE 0xe6c80000
	41	#define CONFIG_SCIF_A
1a31ca4a	42
1a31ca4a HS	43	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	44
	45	#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
	46	#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
	47	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
	48	64 * 1024 * 1024)
1a31ca4a HS	49
	50	#define CONFIG_SYS_MONITOR_BASE 0x00000000
	51	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
	52	#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
1a31ca4a	53	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
1a31ca4a HS	54
1a31ca4a HS	55	/* FLASH */
1a31ca4a HS	56	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	57	#define CONFIG_SYS_FLASH_BASE 0x00000000
	58	#define CONFIG_SYS_MAX_FLASH_SECT 512
	59	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	60	#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
	61
	62	#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
	63	#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
	64	#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
	65	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
	66
	67	/* ENV setting */
1a31ca4a	68	#define CONFIG_ENV_OVERWRITE 1
1a31ca4a HS	69
1a31ca4a HS	70	/* SH Ether */
1a31ca4a HS	71	#define CONFIG_SH_ETHER_USE_PORT 0
	72	#define CONFIG_SH_ETHER_PHY_ADDR 0x0
	73	#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
	74	#define CONFIG_SH_ETHER_SH7734_MII (0x01)
	75	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
1a31ca4a HS	76	#define CONFIG_BITBANGMII_MULTI
	77
	78	/* Board Clock */
	79	#define CONFIG_SYS_CLK_FREQ 50000000
717ceb63	80	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
1a31ca4a HS	81
1a31ca4a HS	82	#endif /* __ARMADILLO_800EVA_H */