[J-u-boot.git] / drivers / rtc / m48t35ax.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2001
 * Erik Theisen,  Wave 7 Optics, [email protected].
 */

/*
 * Date & Time support for ST Electronics M48T35Ax RTC
 */

/*#define       DEBUG */


#include <common.h>
#include <command.h>
#include <rtc.h>
#include <config.h>

static uchar rtc_read  (uchar reg);
static void  rtc_write (uchar reg, uchar val);

/* ------------------------------------------------------------------------- */

int rtc_get (struct rtc_time *tmp)
{
	uchar sec, min, hour, cent_day, date, month, year;
	uchar ccr;			/* Clock control register */

	/* Lock RTC for read using clock control register */
	ccr = rtc_read(0);
	ccr = ccr | 0x40;
	rtc_write(0, ccr);

	sec	= rtc_read (0x1);
	min	= rtc_read (0x2);
	hour	= rtc_read (0x3);
	cent_day= rtc_read (0x4);
	date	= rtc_read (0x5);
	month   = rtc_read (0x6);
	year	= rtc_read (0x7);

	/* UNLock RTC */
	ccr = rtc_read(0);
	ccr = ccr & 0xBF;
	rtc_write(0, ccr);

	debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
		"hr: %02x min: %02x sec: %02x\n",
		year, month, date, cent_day,
		hour, min, sec );

	tmp->tm_sec  = bcd2bin (sec  & 0x7F);
	tmp->tm_min  = bcd2bin (min  & 0x7F);
	tmp->tm_hour = bcd2bin (hour & 0x3F);
	tmp->tm_mday = bcd2bin (date & 0x3F);
	tmp->tm_mon  = bcd2bin (month & 0x1F);
	tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
	tmp->tm_wday = bcd2bin (cent_day & 0x07);
	tmp->tm_yday = 0;
	tmp->tm_isdst= 0;

	debug ( "Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	return 0;
}

int rtc_set (struct rtc_time *tmp)
{
	uchar ccr;			/* Clock control register */
	uchar century;

	debug ( "Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	/* Lock RTC for write using clock control register */
	ccr = rtc_read(0);
	ccr = ccr | 0x80;
	rtc_write(0, ccr);

	rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
	rtc_write (0x06, bin2bcd(tmp->tm_mon));
	rtc_write (0x05, bin2bcd(tmp->tm_mday));

	century = ((tmp->tm_year >= 2000) ? 0x10 : 0) | 0x20;
	rtc_write (0x04, bin2bcd(tmp->tm_wday) | century);

	rtc_write (0x03, bin2bcd(tmp->tm_hour));
	rtc_write (0x02, bin2bcd(tmp->tm_min ));
	rtc_write (0x01, bin2bcd(tmp->tm_sec ));

	/* UNLock RTC */
	ccr = rtc_read(0);
	ccr = ccr & 0x7F;
	rtc_write(0, ccr);

	return 0;
}

void rtc_reset (void)
{
	uchar val;

	/* Clear all clock control registers */
	rtc_write (0x0, 0x80);		/* No Read Lock or calibration */

	/* Clear stop bit */
	val = rtc_read (0x1);
	val &= 0x7f;
	rtc_write(0x1, val);

	/* Enable century / disable frequency test */
	val = rtc_read (0x4);
	val = (val & 0xBF) | 0x20;
	rtc_write(0x4, val);

	/* Clear write lock */
	rtc_write(0x0, 0);
}

/* ------------------------------------------------------------------------- */

static uchar rtc_read (uchar reg)
{
	return *(unsigned char *)
		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
}

static void rtc_write (uchar reg, uchar val)
{
	*(unsigned char *)
		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
affae2bf WD	2	/*
	3	* (C) Copyright 2001
	4	* Erik Theisen, Wave 7 Optics, [email protected].
affae2bf WD	5	*/
	6
	7	/*
	8	* Date & Time support for ST Electronics M48T35Ax RTC
	9	*/
	10
	11	/#define DEBUG /
	12
	13
	14	#include <common.h>
	15	#include <command.h>
	16	#include <rtc.h>
	17	#include <config.h>
	18
affae2bf WD	19	static uchar rtc_read (uchar reg);
affae2bf WD	20	static void rtc_write (uchar reg, uchar val);
affae2bf WD	21
	22	/* ------------------------------------------------------------------------- */
	23
b73a19e1	24	int rtc_get (struct rtc_time *tmp)
affae2bf WD	25	{
	26	uchar sec, min, hour, cent_day, date, month, year;
	27	uchar ccr; /* Clock control register */
	28
	29	/* Lock RTC for read using clock control register */
	30	ccr = rtc_read(0);
	31	ccr = ccr \| 0x40;
	32	rtc_write(0, ccr);
	33
	34	sec = rtc_read (0x1);
	35	min = rtc_read (0x2);
	36	hour = rtc_read (0x3);
	37	cent_day= rtc_read (0x4);
	38	date = rtc_read (0x5);
	39	month = rtc_read (0x6);
	40	year = rtc_read (0x7);
	41
	42	/* UNLock RTC */
	43	ccr = rtc_read(0);
	44	ccr = ccr & 0xBF;
	45	rtc_write(0, ccr);
	46
	47	debug ( "Get RTC year: %02x month: %02x date: %02x cent_day: %02x "
	48	"hr: %02x min: %02x sec: %02x\n",
	49	year, month, date, cent_day,
	50	hour, min, sec );
	51
	52	tmp->tm_sec = bcd2bin (sec & 0x7F);
	53	tmp->tm_min = bcd2bin (min & 0x7F);
	54	tmp->tm_hour = bcd2bin (hour & 0x3F);
	55	tmp->tm_mday = bcd2bin (date & 0x3F);
	56	tmp->tm_mon = bcd2bin (month & 0x1F);
	57	tmp->tm_year = bcd2bin (year) + ((cent_day & 0x10) ? 2000 : 1900);
	58	tmp->tm_wday = bcd2bin (cent_day & 0x07);
	59	tmp->tm_yday = 0;
	60	tmp->tm_isdst= 0;
	61
	62	debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	63	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	64	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
b73a19e1 YT	65
b73a19e1 YT	66	return 0;
affae2bf WD	67	}
affae2bf WD	68
d1e23194	69	int rtc_set (struct rtc_time *tmp)
affae2bf WD	70	{
	71	uchar ccr; /* Clock control register */
	72	uchar century;
	73
	74	debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	75	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	76	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	77
	78	/* Lock RTC for write using clock control register */
	79	ccr = rtc_read(0);
	80	ccr = ccr \| 0x80;
	81	rtc_write(0, ccr);
	82
	83	rtc_write (0x07, bin2bcd(tmp->tm_year % 100));
	84	rtc_write (0x06, bin2bcd(tmp->tm_mon));
	85	rtc_write (0x05, bin2bcd(tmp->tm_mday));
	86
	87	century = ((tmp->tm_year >= 2000) ? 0x10 : 0) \| 0x20;
	88	rtc_write (0x04, bin2bcd(tmp->tm_wday) \| century);
	89
	90	rtc_write (0x03, bin2bcd(tmp->tm_hour));
	91	rtc_write (0x02, bin2bcd(tmp->tm_min ));
	92	rtc_write (0x01, bin2bcd(tmp->tm_sec ));
	93
	94	/* UNLock RTC */
	95	ccr = rtc_read(0);
	96	ccr = ccr & 0x7F;
	97	rtc_write(0, ccr);
d1e23194 JCPV	98
d1e23194 JCPV	99	return 0;
affae2bf WD	100	}
	101
	102	void rtc_reset (void)
	103	{
	104	uchar val;
	105
	106	/* Clear all clock control registers */
	107	rtc_write (0x0, 0x80); /* No Read Lock or calibration */
	108
	109	/* Clear stop bit */
	110	val = rtc_read (0x1);
	111	val &= 0x7f;
	112	rtc_write(0x1, val);
	113
	114	/* Enable century / disable frequency test */
	115	val = rtc_read (0x4);
	116	val = (val & 0xBF) \| 0x20;
	117	rtc_write(0x4, val);
	118
	119	/* Clear write lock */
	120	rtc_write(0x0, 0);
	121	}
	122
	123	/* ------------------------------------------------------------------------- */
	124
	125	static uchar rtc_read (uchar reg)
	126	{
a4ca3799	127	return (unsigned char )
6d0f6bcf	128	((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
affae2bf WD	129	}
	130
	131	static void rtc_write (uchar reg, uchar val)
	132	{
	133	(unsigned char )
6d0f6bcf	134	((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
affae2bf	135	}