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5b845b66 | 1 | /* |
5da627a4 WD |
2 | * (C) Copyright 2003 |
3 | * Steven Scholz, imc Measurement & Control, [email protected] | |
4 | * | |
5b845b66 WD |
5 | * (C) Copyright 2002 |
6 | * Rich Ireland, Enterasys Networks, [email protected]. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | ||
5b845b66 WD |
28 | /* |
29 | * Altera FPGA support | |
30 | */ | |
31 | #include <common.h> | |
5da627a4 | 32 | #include <ACEX1K.h> |
3c735e74 | 33 | #include <stratixII.h> |
5b845b66 | 34 | |
5da627a4 WD |
35 | /* Define FPGA_DEBUG to get debug printf's */ |
36 | /* #define FPGA_DEBUG */ | |
5b845b66 WD |
37 | |
38 | #ifdef FPGA_DEBUG | |
39 | #define PRINTF(fmt,args...) printf (fmt ,##args) | |
40 | #else | |
41 | #define PRINTF(fmt,args...) | |
42 | #endif | |
43 | ||
5da627a4 | 44 | /* Local Static Functions */ |
3c735e74 | 45 | static int altera_validate (Altera_desc * desc, const char *fn); |
5da627a4 | 46 | |
5b845b66 | 47 | /* ------------------------------------------------------------------------- */ |
e6a857da | 48 | int altera_load(Altera_desc *desc, const void *buf, size_t bsize) |
5b845b66 | 49 | { |
5da627a4 WD |
50 | int ret_val = FPGA_FAIL; /* assume a failure */ |
51 | ||
64cd52ef | 52 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
53 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
54 | } else { | |
55 | switch (desc->family) { | |
56 | case Altera_ACEX1K: | |
f0ff4692 | 57 | case Altera_CYC2: |
0133502e | 58 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 WD |
59 | PRINTF ("%s: Launching the ACEX1K Loader...\n", |
60 | __FUNCTION__); | |
61 | ret_val = ACEX1K_load (desc, buf, bsize); | |
3c735e74 | 62 | #elif defined(CONFIG_FPGA_CYCLON2) |
f18361b9 | 63 | PRINTF ("%s: Launching the CYCLONE II Loader...\n", |
f0ff4692 SR |
64 | __FUNCTION__); |
65 | ret_val = CYC2_load (desc, buf, bsize); | |
5da627a4 WD |
66 | #else |
67 | printf ("%s: No support for ACEX1K devices.\n", | |
68 | __FUNCTION__); | |
69 | #endif | |
70 | break; | |
71 | ||
3c735e74 | 72 | #if defined(CONFIG_FPGA_STRATIX_II) |
73 | case Altera_StratixII: | |
74 | PRINTF ("%s: Launching the Stratix II Loader...\n", | |
75 | __FUNCTION__); | |
76 | ret_val = StratixII_load (desc, buf, bsize); | |
77 | break; | |
78 | #endif | |
5da627a4 WD |
79 | default: |
80 | printf ("%s: Unsupported family type, %d\n", | |
81 | __FUNCTION__, desc->family); | |
82 | } | |
83 | } | |
84 | ||
85 | return ret_val; | |
5b845b66 WD |
86 | } |
87 | ||
e6a857da | 88 | int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) |
5b845b66 | 89 | { |
5da627a4 WD |
90 | int ret_val = FPGA_FAIL; /* assume a failure */ |
91 | ||
64cd52ef | 92 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
93 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
94 | } else { | |
95 | switch (desc->family) { | |
96 | case Altera_ACEX1K: | |
0133502e | 97 | #if defined(CONFIG_FPGA_ACEX) |
5da627a4 WD |
98 | PRINTF ("%s: Launching the ACEX1K Reader...\n", |
99 | __FUNCTION__); | |
100 | ret_val = ACEX1K_dump (desc, buf, bsize); | |
101 | #else | |
102 | printf ("%s: No support for ACEX1K devices.\n", | |
103 | __FUNCTION__); | |
104 | #endif | |
105 | break; | |
106 | ||
3c735e74 | 107 | #if defined(CONFIG_FPGA_STRATIX_II) |
108 | case Altera_StratixII: | |
109 | PRINTF ("%s: Launching the Stratix II Reader...\n", | |
110 | __FUNCTION__); | |
111 | ret_val = StratixII_dump (desc, buf, bsize); | |
112 | break; | |
113 | #endif | |
5da627a4 WD |
114 | default: |
115 | printf ("%s: Unsupported family type, %d\n", | |
116 | __FUNCTION__, desc->family); | |
117 | } | |
118 | } | |
119 | ||
120 | return ret_val; | |
5b845b66 WD |
121 | } |
122 | ||
123 | int altera_info( Altera_desc *desc ) | |
124 | { | |
5da627a4 WD |
125 | int ret_val = FPGA_FAIL; |
126 | ||
64cd52ef | 127 | if (altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
128 | printf ("Family: \t"); |
129 | switch (desc->family) { | |
130 | case Altera_ACEX1K: | |
131 | printf ("ACEX1K\n"); | |
132 | break; | |
f0ff4692 SR |
133 | case Altera_CYC2: |
134 | printf ("CYCLON II\n"); | |
135 | break; | |
3c735e74 | 136 | case Altera_StratixII: |
137 | printf ("Stratix II\n"); | |
138 | break; | |
139 | /* Add new family types here */ | |
5da627a4 WD |
140 | default: |
141 | printf ("Unknown family type, %d\n", desc->family); | |
142 | } | |
143 | ||
144 | printf ("Interface type:\t"); | |
145 | switch (desc->iface) { | |
146 | case passive_serial: | |
147 | printf ("Passive Serial (PS)\n"); | |
148 | break; | |
149 | case passive_parallel_synchronous: | |
150 | printf ("Passive Parallel Synchronous (PPS)\n"); | |
151 | break; | |
152 | case passive_parallel_asynchronous: | |
153 | printf ("Passive Parallel Asynchronous (PPA)\n"); | |
154 | break; | |
155 | case passive_serial_asynchronous: | |
156 | printf ("Passive Serial Asynchronous (PSA)\n"); | |
157 | break; | |
158 | case altera_jtag_mode: /* Not used */ | |
159 | printf ("JTAG Mode\n"); | |
160 | break; | |
3c735e74 | 161 | case fast_passive_parallel: |
162 | printf ("Fast Passive Parallel (FPP)\n"); | |
163 | break; | |
164 | case fast_passive_parallel_security: | |
165 | printf | |
166 | ("Fast Passive Parallel with Security (FPPS) \n"); | |
167 | break; | |
5da627a4 WD |
168 | /* Add new interface types here */ |
169 | default: | |
170 | printf ("Unsupported interface type, %d\n", desc->iface); | |
171 | } | |
172 | ||
173 | printf ("Device Size: \t%d bytes\n" | |
174 | "Cookie: \t0x%x (%d)\n", | |
175 | desc->size, desc->cookie, desc->cookie); | |
176 | ||
177 | if (desc->iface_fns) { | |
178 | printf ("Device Function Table @ 0x%p\n", desc->iface_fns); | |
179 | switch (desc->family) { | |
180 | case Altera_ACEX1K: | |
f0ff4692 | 181 | case Altera_CYC2: |
0133502e | 182 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 | 183 | ACEX1K_info (desc); |
0133502e | 184 | #elif defined(CONFIG_FPGA_CYCLON2) |
f0ff4692 | 185 | CYC2_info (desc); |
5da627a4 WD |
186 | #else |
187 | /* just in case */ | |
188 | printf ("%s: No support for ACEX1K devices.\n", | |
189 | __FUNCTION__); | |
190 | #endif | |
191 | break; | |
3c735e74 | 192 | #if defined(CONFIG_FPGA_STRATIX_II) |
193 | case Altera_StratixII: | |
194 | StratixII_info (desc); | |
195 | break; | |
196 | #endif | |
5da627a4 WD |
197 | /* Add new family types here */ |
198 | default: | |
199 | /* we don't need a message here - we give one up above */ | |
b77fad3b | 200 | break; |
5da627a4 WD |
201 | } |
202 | } else { | |
203 | printf ("No Device Function Table.\n"); | |
204 | } | |
205 | ||
206 | ret_val = FPGA_SUCCESS; | |
207 | } else { | |
208 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); | |
209 | } | |
210 | ||
211 | return ret_val; | |
212 | } | |
213 | ||
5b845b66 WD |
214 | /* ------------------------------------------------------------------------- */ |
215 | ||
3c735e74 | 216 | static int altera_validate (Altera_desc * desc, const char *fn) |
5da627a4 | 217 | { |
472d5460 | 218 | int ret_val = false; |
5da627a4 WD |
219 | |
220 | if (desc) { | |
221 | if ((desc->family > min_altera_type) && | |
222 | (desc->family < max_altera_type)) { | |
223 | if ((desc->iface > min_altera_iface_type) && | |
224 | (desc->iface < max_altera_iface_type)) { | |
225 | if (desc->size) { | |
472d5460 | 226 | ret_val = true; |
5da627a4 WD |
227 | } else { |
228 | printf ("%s: NULL part size\n", fn); | |
229 | } | |
230 | } else { | |
231 | printf ("%s: Invalid Interface type, %d\n", | |
232 | fn, desc->iface); | |
233 | } | |
234 | } else { | |
235 | printf ("%s: Invalid family type, %d\n", fn, desc->family); | |
236 | } | |
237 | } else { | |
238 | printf ("%s: NULL descriptor!\n", fn); | |
239 | } | |
240 | ||
241 | return ret_val; | |
242 | } | |
5b845b66 WD |
243 | |
244 | /* ------------------------------------------------------------------------- */ |