[J-u-boot.git] / doc / SPI / README.altera_spi

SoCFPGA EPCS/EPCQx1 mini howto:
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work
Commit	Line	Data
df155672 MV	1	SoCFPGA EPCS/EPCQx1 mini howto:
	2	- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
	3	- The controller base address is the "Base" in QSys + 0x400
	4	- Set MSEL[4:0]=10010 (AS Standard)
	5	- Load the bitstream into FPGA, enable bridges
	6	- Only then will the driver work