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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
9c6a3c67 | 2 | /* |
7f0f1806 SA |
3 | * Copyright (C) 2020 Sean Anderson <[email protected]> |
4 | * Copyright (C) 2015 Masahiro Yamada <[email protected]> | |
9c6a3c67 MY |
5 | */ |
6 | ||
9d922450 | 7 | #include <dm.h> |
9c6a3c67 | 8 | #include <dm/pinctrl.h> |
7f0f1806 SA |
9 | #include <dt-bindings/pinctrl/sandbox-pinmux.h> |
10 | #include <log.h> | |
cd93d625 | 11 | #include <linux/bitops.h> |
9c6a3c67 | 12 | |
7f0f1806 SA |
13 | /* |
14 | * This driver emulates a pin controller with the following rules: | |
15 | * - The pinctrl config for each pin must be set individually | |
16 | * - The first three pins (P0-P2) must be muxed as a group | |
17 | * - The next two pins (P3-P4) must be muxed as a group | |
18 | * - The last four pins (P5-P8) must be muxed individually | |
19 | */ | |
20 | ||
9c6a3c67 | 21 | static const char * const sandbox_pins[] = { |
7f0f1806 SA |
22 | #define PIN(x) \ |
23 | [x] = "P" #x | |
24 | PIN(0), | |
25 | PIN(1), | |
26 | PIN(2), | |
27 | PIN(3), | |
28 | PIN(4), | |
29 | PIN(5), | |
30 | PIN(6), | |
31 | PIN(7), | |
32 | PIN(8), | |
33 | #undef PIN | |
9c6a3c67 MY |
34 | }; |
35 | ||
7f0f1806 SA |
36 | static const char * const sandbox_pins_muxing[][2] = { |
37 | { "UART TX", "I2C SCL" }, | |
38 | { "UART RX", "I2C SDA" }, | |
39 | { "SPI SCLK", "I2S SCK" }, | |
40 | { "SPI MOSI", "I2S SD" }, | |
41 | { "SPI MISO", "I2S WS" }, | |
42 | { "GPIO0", "SPI CS0" }, | |
43 | { "GPIO1", "SPI CS1" }, | |
44 | { "GPIO2", "PWM0" }, | |
274e0c72 | 45 | { "GPIO3", "ONEWIRE" }, |
21e23aaf PC |
46 | }; |
47 | ||
7f0f1806 SA |
48 | #define SANDBOX_GROUP_I2C_UART 0 |
49 | #define SANDBOX_GROUP_SPI_I2S 1 | |
50 | ||
9c6a3c67 | 51 | static const char * const sandbox_groups[] = { |
7f0f1806 SA |
52 | [SANDBOX_GROUP_I2C_UART] = "I2C_UART", |
53 | [SANDBOX_GROUP_SPI_I2S] = "SPI_I2S", | |
9c6a3c67 MY |
54 | }; |
55 | ||
56 | static const char * const sandbox_functions[] = { | |
7f0f1806 SA |
57 | #define FUNC(id) \ |
58 | [SANDBOX_PINMUX_##id] = #id | |
59 | FUNC(UART), | |
60 | FUNC(I2C), | |
61 | FUNC(SPI), | |
62 | FUNC(I2S), | |
63 | FUNC(GPIO), | |
64 | FUNC(CS), | |
65 | FUNC(PWM), | |
274e0c72 | 66 | FUNC(ONEWIRE), |
7f0f1806 | 67 | #undef FUNC |
9c6a3c67 MY |
68 | }; |
69 | ||
70 | static const struct pinconf_param sandbox_conf_params[] = { | |
71 | { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, | |
72 | { "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 }, | |
73 | { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 }, | |
74 | { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, | |
75 | { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, | |
76 | { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 }, | |
77 | { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 }, | |
78 | { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 }, | |
79 | { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, | |
80 | { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 }, | |
81 | { "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 }, | |
82 | }; | |
83 | ||
7f0f1806 SA |
84 | /* Bitfield used to save param and value of each pin/selector */ |
85 | struct sandbox_pinctrl_priv { | |
86 | unsigned int mux; | |
87 | unsigned int pins_param[ARRAY_SIZE(sandbox_pins)]; | |
88 | unsigned int pins_value[ARRAY_SIZE(sandbox_pins)]; | |
89 | }; | |
77ed5692 | 90 | |
9c6a3c67 MY |
91 | static int sandbox_get_pins_count(struct udevice *dev) |
92 | { | |
93 | return ARRAY_SIZE(sandbox_pins); | |
94 | } | |
95 | ||
96 | static const char *sandbox_get_pin_name(struct udevice *dev, unsigned selector) | |
97 | { | |
98 | return sandbox_pins[selector]; | |
99 | } | |
100 | ||
21e23aaf PC |
101 | static int sandbox_get_pin_muxing(struct udevice *dev, |
102 | unsigned int selector, | |
103 | char *buf, int size) | |
104 | { | |
77ed5692 | 105 | const struct pinconf_param *p; |
7f0f1806 | 106 | struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); |
77ed5692 PD |
107 | int i; |
108 | ||
7f0f1806 SA |
109 | snprintf(buf, size, "%s", |
110 | sandbox_pins_muxing[selector][!!(priv->mux & BIT(selector))]); | |
21e23aaf | 111 | |
7f0f1806 | 112 | if (priv->pins_param[selector]) { |
77ed5692 PD |
113 | for (i = 0, p = sandbox_conf_params; |
114 | i < ARRAY_SIZE(sandbox_conf_params); | |
115 | i++, p++) { | |
7f0f1806 SA |
116 | if ((priv->pins_param[selector] & BIT(p->param)) && |
117 | (!!(priv->pins_value[selector] & BIT(p->param)) == | |
77ed5692 PD |
118 | p->default_value)) { |
119 | strncat(buf, " ", size); | |
120 | strncat(buf, p->property, size); | |
121 | } | |
122 | } | |
123 | } | |
124 | strncat(buf, ".", size); | |
125 | ||
21e23aaf PC |
126 | return 0; |
127 | } | |
128 | ||
9c6a3c67 MY |
129 | static int sandbox_get_groups_count(struct udevice *dev) |
130 | { | |
131 | return ARRAY_SIZE(sandbox_groups); | |
132 | } | |
133 | ||
134 | static const char *sandbox_get_group_name(struct udevice *dev, | |
135 | unsigned selector) | |
136 | { | |
137 | return sandbox_groups[selector]; | |
138 | } | |
139 | ||
140 | static int sandbox_get_functions_count(struct udevice *dev) | |
141 | { | |
142 | return ARRAY_SIZE(sandbox_functions); | |
143 | } | |
144 | ||
145 | static const char *sandbox_get_function_name(struct udevice *dev, | |
146 | unsigned selector) | |
147 | { | |
148 | return sandbox_functions[selector]; | |
149 | } | |
150 | ||
151 | static int sandbox_pinmux_set(struct udevice *dev, unsigned pin_selector, | |
152 | unsigned func_selector) | |
153 | { | |
7f0f1806 SA |
154 | int mux; |
155 | struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); | |
156 | ||
9c6a3c67 MY |
157 | debug("sandbox pinmux: pin = %d (%s), function = %d (%s)\n", |
158 | pin_selector, sandbox_get_pin_name(dev, pin_selector), | |
159 | func_selector, sandbox_get_function_name(dev, func_selector)); | |
160 | ||
7f0f1806 SA |
161 | if (pin_selector < 5) |
162 | return -EINVAL; | |
163 | ||
164 | switch (func_selector) { | |
165 | case SANDBOX_PINMUX_GPIO: | |
166 | mux = 0; | |
167 | break; | |
168 | case SANDBOX_PINMUX_CS: | |
169 | case SANDBOX_PINMUX_PWM: | |
274e0c72 | 170 | case SANDBOX_PINMUX_ONEWIRE: |
7f0f1806 SA |
171 | mux = BIT(pin_selector); |
172 | break; | |
173 | default: | |
174 | return -EINVAL; | |
175 | } | |
176 | ||
177 | priv->mux &= ~BIT(pin_selector); | |
178 | priv->mux |= mux; | |
179 | priv->pins_param[pin_selector] = 0; | |
180 | priv->pins_value[pin_selector] = 0; | |
77ed5692 | 181 | |
9c6a3c67 MY |
182 | return 0; |
183 | } | |
184 | ||
185 | static int sandbox_pinmux_group_set(struct udevice *dev, | |
186 | unsigned group_selector, | |
187 | unsigned func_selector) | |
188 | { | |
7f0f1806 SA |
189 | bool mux; |
190 | int i, group_start, group_end; | |
191 | struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); | |
192 | unsigned int mask; | |
193 | ||
9c6a3c67 MY |
194 | debug("sandbox pinmux: group = %d (%s), function = %d (%s)\n", |
195 | group_selector, sandbox_get_group_name(dev, group_selector), | |
196 | func_selector, sandbox_get_function_name(dev, func_selector)); | |
197 | ||
7f0f1806 SA |
198 | if (group_selector == SANDBOX_GROUP_I2C_UART) { |
199 | group_start = 0; | |
200 | group_end = 1; | |
201 | ||
202 | if (func_selector == SANDBOX_PINMUX_UART) | |
203 | mux = false; | |
204 | else if (func_selector == SANDBOX_PINMUX_I2C) | |
205 | mux = true; | |
206 | else | |
207 | return -EINVAL; | |
208 | } else if (group_selector == SANDBOX_GROUP_SPI_I2S) { | |
209 | group_start = 2; | |
210 | group_end = 4; | |
211 | ||
212 | if (func_selector == SANDBOX_PINMUX_SPI) | |
213 | mux = false; | |
214 | else if (func_selector == SANDBOX_PINMUX_I2S) | |
215 | mux = true; | |
216 | else | |
217 | return -EINVAL; | |
218 | } else { | |
219 | return -EINVAL; | |
220 | } | |
221 | ||
222 | mask = GENMASK(group_end, group_start); | |
223 | priv->mux &= ~mask; | |
224 | priv->mux |= mux ? mask : 0; | |
225 | ||
226 | for (i = group_start; i < group_end; i++) { | |
227 | priv->pins_param[i] = 0; | |
228 | priv->pins_value[i] = 0; | |
229 | } | |
230 | ||
9c6a3c67 MY |
231 | return 0; |
232 | } | |
233 | ||
7f0f1806 SA |
234 | static int sandbox_pinmux_property_set(struct udevice *dev, u32 pinmux_group) |
235 | { | |
236 | int ret; | |
237 | unsigned pin_selector = pinmux_group & 0xFFFF; | |
238 | unsigned func_selector = pinmux_group >> 16; | |
239 | ||
240 | ret = sandbox_pinmux_set(dev, pin_selector, func_selector); | |
241 | return ret ? ret : pin_selector; | |
242 | } | |
243 | ||
9c6a3c67 MY |
244 | static int sandbox_pinconf_set(struct udevice *dev, unsigned pin_selector, |
245 | unsigned param, unsigned argument) | |
246 | { | |
7f0f1806 SA |
247 | struct sandbox_pinctrl_priv *priv = dev_get_priv(dev); |
248 | ||
9c6a3c67 MY |
249 | debug("sandbox pinconf: pin = %d (%s), param = %d, arg = %d\n", |
250 | pin_selector, sandbox_get_pin_name(dev, pin_selector), | |
251 | param, argument); | |
252 | ||
7f0f1806 | 253 | priv->pins_param[pin_selector] |= BIT(param); |
77ed5692 | 254 | if (argument) |
7f0f1806 | 255 | priv->pins_value[pin_selector] |= BIT(param); |
77ed5692 | 256 | else |
7f0f1806 | 257 | priv->pins_value[pin_selector] &= ~BIT(param); |
77ed5692 | 258 | |
9c6a3c67 MY |
259 | return 0; |
260 | } | |
261 | ||
262 | static int sandbox_pinconf_group_set(struct udevice *dev, | |
263 | unsigned group_selector, | |
264 | unsigned param, unsigned argument) | |
265 | { | |
266 | debug("sandbox pinconf: group = %d (%s), param = %d, arg = %d\n", | |
267 | group_selector, sandbox_get_group_name(dev, group_selector), | |
268 | param, argument); | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
273 | const struct pinctrl_ops sandbox_pinctrl_ops = { | |
274 | .get_pins_count = sandbox_get_pins_count, | |
275 | .get_pin_name = sandbox_get_pin_name, | |
21e23aaf | 276 | .get_pin_muxing = sandbox_get_pin_muxing, |
9c6a3c67 MY |
277 | .get_groups_count = sandbox_get_groups_count, |
278 | .get_group_name = sandbox_get_group_name, | |
279 | .get_functions_count = sandbox_get_functions_count, | |
280 | .get_function_name = sandbox_get_function_name, | |
281 | .pinmux_set = sandbox_pinmux_set, | |
282 | .pinmux_group_set = sandbox_pinmux_group_set, | |
7f0f1806 | 283 | .pinmux_property_set = sandbox_pinmux_property_set, |
9c6a3c67 MY |
284 | .pinconf_num_params = ARRAY_SIZE(sandbox_conf_params), |
285 | .pinconf_params = sandbox_conf_params, | |
286 | .pinconf_set = sandbox_pinconf_set, | |
287 | .pinconf_group_set = sandbox_pinconf_group_set, | |
288 | .set_state = pinctrl_generic_set_state, | |
289 | }; | |
290 | ||
291 | static const struct udevice_id sandbox_pinctrl_match[] = { | |
292 | { .compatible = "sandbox,pinctrl" }, | |
293 | { /* sentinel */ } | |
294 | }; | |
295 | ||
296 | U_BOOT_DRIVER(sandbox_pinctrl) = { | |
297 | .name = "sandbox_pinctrl", | |
298 | .id = UCLASS_PINCTRL, | |
299 | .of_match = sandbox_pinctrl_match, | |
41575d8e | 300 | .priv_auto = sizeof(struct sandbox_pinctrl_priv), |
9c6a3c67 MY |
301 | .ops = &sandbox_pinctrl_ops, |
302 | }; |