]> Git Repo - J-u-boot.git/blame - drivers/spi/altera_spi.c
Merge branch '2019-10-28-azure-ci-support'
[J-u-boot.git] / drivers / spi / altera_spi.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
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2/*
3 * Altera SPI driver
4 *
5 * based on bfin_spi.c
6 * Copyright (c) 2005-2008 Analog Devices Inc.
7 * Copyright (C) 2010 Thomas Chou <[email protected]>
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8 */
9#include <common.h>
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10#include <dm.h>
11#include <errno.h>
661ba140 12#include <malloc.h>
15a56f9c 13#include <fdtdec.h>
bef87adf 14#include <spi.h>
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15#include <asm/io.h>
16
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17#define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
18#define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
19
cdcdad85 20#ifndef CONFIG_ALTERA_SPI_IDLE_VAL
bef87adf 21#define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
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22#endif
23
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24struct altera_spi_regs {
25 u32 rxdata;
26 u32 txdata;
27 u32 status;
28 u32 control;
29 u32 _reserved;
30 u32 slave_sel;
31};
661ba140 32
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33struct altera_spi_platdata {
34 struct altera_spi_regs *regs;
35};
661ba140 36
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37struct altera_spi_priv {
38 struct altera_spi_regs *regs;
661ba140 39};
661ba140 40
15a56f9c 41static void spi_cs_activate(struct udevice *dev, uint cs)
661ba140 42{
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43 struct udevice *bus = dev->parent;
44 struct altera_spi_priv *priv = dev_get_priv(bus);
45 struct altera_spi_regs *const regs = priv->regs;
661ba140 46
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47 writel(1 << cs, &regs->slave_sel);
48 writel(ALTERA_SPI_CONTROL_SSO_MSK, &regs->control);
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49}
50
15a56f9c 51static void spi_cs_deactivate(struct udevice *dev)
661ba140 52{
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53 struct udevice *bus = dev->parent;
54 struct altera_spi_priv *priv = dev_get_priv(bus);
55 struct altera_spi_regs *const regs = priv->regs;
661ba140 56
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57 writel(0, &regs->control);
58 writel(0, &regs->slave_sel);
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59}
60
15a56f9c 61static int altera_spi_claim_bus(struct udevice *dev)
661ba140 62{
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63 struct udevice *bus = dev->parent;
64 struct altera_spi_priv *priv = dev_get_priv(bus);
65 struct altera_spi_regs *const regs = priv->regs;
661ba140 66
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67 writel(0, &regs->control);
68 writel(0, &regs->slave_sel);
661ba140 69
15a56f9c 70 return 0;
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71}
72
15a56f9c 73static int altera_spi_release_bus(struct udevice *dev)
661ba140 74{
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75 struct udevice *bus = dev->parent;
76 struct altera_spi_priv *priv = dev_get_priv(bus);
77 struct altera_spi_regs *const regs = priv->regs;
661ba140 78
15a56f9c 79 writel(0, &regs->slave_sel);
661ba140 80
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81 return 0;
82}
83
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84static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
85 const void *dout, void *din, unsigned long flags)
661ba140 86{
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87 struct udevice *bus = dev->parent;
88 struct altera_spi_priv *priv = dev_get_priv(bus);
89 struct altera_spi_regs *const regs = priv->regs;
90 struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
661ba140 91
661ba140 92 /* assume spi core configured to do 8 bit transfers */
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93 unsigned int bytes = bitlen / 8;
94 const unsigned char *txp = dout;
95 unsigned char *rxp = din;
96 uint32_t reg, data, start;
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97
98 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
15a56f9c 99 bus->seq, slave_plat->cs, bitlen, bytes, flags);
37dcc130 100
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101 if (bitlen == 0)
102 goto done;
103
104 if (bitlen % 8) {
105 flags |= SPI_XFER_END;
106 goto done;
107 }
108
109 /* empty read buffer */
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110 if (readl(&regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
111 readl(&regs->rxdata);
37dcc130 112
661ba140 113 if (flags & SPI_XFER_BEGIN)
15a56f9c 114 spi_cs_activate(dev, slave_plat->cs);
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115
116 while (bytes--) {
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117 if (txp)
118 data = *txp++;
119 else
120 data = CONFIG_ALTERA_SPI_IDLE_VAL;
37dcc130 121
bc76b821 122 debug("%s: tx:%x ", __func__, data);
15a56f9c 123 writel(data, &regs->txdata);
37dcc130 124
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125 start = get_timer(0);
126 while (1) {
15a56f9c 127 reg = readl(&regs->status);
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128 if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
129 break;
130 if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
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131 debug("%s: Transmission timed out!\n", __func__);
132 return -1;
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133 }
134 }
37dcc130 135
15a56f9c 136 data = readl(&regs->rxdata);
661ba140 137 if (rxp)
bc76b821 138 *rxp++ = data & 0xff;
37dcc130 139
bc76b821 140 debug("rx:%x\n", data);
661ba140 141 }
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142
143done:
661ba140 144 if (flags & SPI_XFER_END)
15a56f9c 145 spi_cs_deactivate(dev);
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146
147 return 0;
148}
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149
150static int altera_spi_set_speed(struct udevice *bus, uint speed)
151{
152 return 0;
153}
154
155static int altera_spi_set_mode(struct udevice *bus, uint mode)
156{
157 return 0;
158}
159
160static int altera_spi_probe(struct udevice *bus)
161{
162 struct altera_spi_platdata *plat = dev_get_platdata(bus);
163 struct altera_spi_priv *priv = dev_get_priv(bus);
164
165 priv->regs = plat->regs;
166
167 return 0;
168}
169
170static int altera_spi_ofdata_to_platdata(struct udevice *bus)
171{
172 struct altera_spi_platdata *plat = dev_get_platdata(bus);
173
a821c4af 174 plat->regs = map_physmem(devfdt_get_addr(bus),
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175 sizeof(struct altera_spi_regs),
176 MAP_NOCACHE);
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177
178 return 0;
179}
180
181static const struct dm_spi_ops altera_spi_ops = {
182 .claim_bus = altera_spi_claim_bus,
183 .release_bus = altera_spi_release_bus,
184 .xfer = altera_spi_xfer,
185 .set_speed = altera_spi_set_speed,
186 .set_mode = altera_spi_set_mode,
187 /*
188 * cs_info is not needed, since we require all chip selects to be
189 * in the device tree explicitly
190 */
191};
192
193static const struct udevice_id altera_spi_ids[] = {
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194 { .compatible = "altr,spi-1.0" },
195 {}
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196};
197
198U_BOOT_DRIVER(altera_spi) = {
199 .name = "altera_spi",
200 .id = UCLASS_SPI,
201 .of_match = altera_spi_ids,
202 .ops = &altera_spi_ops,
203 .ofdata_to_platdata = altera_spi_ofdata_to_platdata,
204 .platdata_auto_alloc_size = sizeof(struct altera_spi_platdata),
205 .priv_auto_alloc_size = sizeof(struct altera_spi_priv),
206 .probe = altera_spi_probe,
207};
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