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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
bcae7211 A |
2 | /* |
3 | * (C) Copyright 2010 | |
4 | * Texas Instruments, <www.ti.com> | |
5 | * | |
6 | * Aneesh V <[email protected]> | |
bcae7211 | 7 | */ |
f1c6e192 | 8 | |
bcae7211 | 9 | #include <common.h> |
e945a726 | 10 | #include <bloblist.h> |
8bee2d25 | 11 | #include <binman_sym.h> |
11516518 | 12 | #include <dm.h> |
b0edea3c | 13 | #include <handoff.h> |
47f7bcae | 14 | #include <spl.h> |
bcae7211 | 15 | #include <asm/u-boot.h> |
bb085b87 | 16 | #include <nand.h> |
8cf686e1 | 17 | #include <fat.h> |
efb2172e | 18 | #include <version.h> |
8cf686e1 | 19 | #include <image.h> |
2d01dd95 | 20 | #include <malloc.h> |
11516518 | 21 | #include <dm/root.h> |
761ca31e | 22 | #include <linux/compiler.h> |
6e7585bb | 23 | #include <fdt_support.h> |
a8be2494 | 24 | #include <bootcount.h> |
06985289 | 25 | #include <wdt.h> |
bcae7211 A |
26 | |
27 | DECLARE_GLOBAL_DATA_PTR; | |
28 | ||
3c6f8a0d SR |
29 | #ifndef CONFIG_SYS_UBOOT_START |
30 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE | |
31 | #endif | |
ae83d882 | 32 | #ifndef CONFIG_SYS_MONITOR_LEN |
e76caa62 | 33 | /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ |
ae83d882 SB |
34 | #define CONFIG_SYS_MONITOR_LEN (200 * 1024) |
35 | #endif | |
36 | ||
47f7bcae | 37 | u32 *boot_params_ptr = NULL; |
9ea5c6ef | 38 | |
8bee2d25 | 39 | /* See spl.h for information about this */ |
dbf6be9f | 40 | binman_sym_declare(ulong, u_boot_any, image_pos); |
8bee2d25 | 41 | |
6507f133 | 42 | /* Define board data structure */ |
bcae7211 A |
43 | static bd_t bdata __attribute__ ((section(".data"))); |
44 | ||
496c5483 HS |
45 | /* |
46 | * Board-specific Platform code can reimplement show_boot_progress () if needed | |
47 | */ | |
48 | __weak void show_boot_progress(int val) {} | |
49 | ||
b0edea3c SG |
50 | #if defined(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) |
51 | /* weak, default platform-specific function to initialize dram banks */ | |
52 | __weak int dram_init_banksize(void) | |
53 | { | |
54 | return 0; | |
55 | } | |
56 | #endif | |
57 | ||
379c19ab SS |
58 | /* |
59 | * Default function to determine if u-boot or the OS should | |
60 | * be started. This implementation always returns 1. | |
61 | * | |
62 | * Please implement your own board specific funcion to do this. | |
63 | * | |
64 | * RETURN | |
65 | * 0 to not start u-boot | |
66 | * positive if u-boot should start | |
67 | */ | |
68 | #ifdef CONFIG_SPL_OS_BOOT | |
69 | __weak int spl_start_uboot(void) | |
70 | { | |
d6330064 SG |
71 | puts(SPL_TPL_PROMPT |
72 | "Please implement spl_start_uboot() for your board\n"); | |
73 | puts(SPL_TPL_PROMPT "Direct Linux boot not active!\n"); | |
379c19ab SS |
74 | return 1; |
75 | } | |
431889d6 LM |
76 | |
77 | /* | |
78 | * Weak default function for arch specific zImage check. Return zero | |
79 | * and fill start and end address if image is recognized. | |
80 | */ | |
81 | int __weak bootz_setup(ulong image, ulong *start, ulong *end) | |
82 | { | |
83 | return 1; | |
84 | } | |
379c19ab SS |
85 | #endif |
86 | ||
de5dd4c4 PT |
87 | /* Weak default function for arch/board-specific fixups to the spl_image_info */ |
88 | void __weak spl_perform_fixups(struct spl_image_info *spl_image) | |
89 | { | |
90 | } | |
91 | ||
6e7585bb R |
92 | void spl_fixup_fdt(void) |
93 | { | |
94 | #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) | |
95 | void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; | |
96 | int err; | |
97 | ||
98 | err = fdt_check_header(fdt_blob); | |
99 | if (err < 0) { | |
100 | printf("fdt_root: %s\n", fdt_strerror(err)); | |
101 | return; | |
102 | } | |
103 | ||
104 | /* fixup the memory dt node */ | |
105 | err = fdt_shrink_to_minimum(fdt_blob, 0); | |
106 | if (err == 0) { | |
d6330064 | 107 | printf(SPL_TPL_PROMPT "fdt_shrink_to_minimum err - %d\n", err); |
6e7585bb R |
108 | return; |
109 | } | |
110 | ||
111 | err = arch_fixup_fdt(fdt_blob); | |
112 | if (err) { | |
d6330064 | 113 | printf(SPL_TPL_PROMPT "arch_fixup_fdt err - %d\n", err); |
6e7585bb R |
114 | return; |
115 | } | |
116 | #endif | |
117 | } | |
118 | ||
ea8256f0 SR |
119 | /* |
120 | * Weak default function for board specific cleanup/preparation before | |
121 | * Linux boot. Some boards/platforms might not need it, so just provide | |
122 | * an empty stub here. | |
123 | */ | |
124 | __weak void spl_board_prepare_for_linux(void) | |
125 | { | |
126 | /* Nothing to do! */ | |
127 | } | |
128 | ||
3a3b9147 MS |
129 | __weak void spl_board_prepare_for_boot(void) |
130 | { | |
131 | /* Nothing to do! */ | |
132 | } | |
133 | ||
04ce5427 MV |
134 | __weak struct image_header *spl_get_load_buffer(ssize_t offset, size_t size) |
135 | { | |
136 | return (struct image_header *)(CONFIG_SYS_TEXT_BASE + offset); | |
137 | } | |
138 | ||
d95ceb97 | 139 | void spl_set_header_raw_uboot(struct spl_image_info *spl_image) |
0c3117b1 | 140 | { |
dbf6be9f | 141 | ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos); |
8bee2d25 | 142 | |
d95ceb97 | 143 | spl_image->size = CONFIG_SYS_MONITOR_LEN; |
55fe0e2b MR |
144 | |
145 | /* | |
146 | * Binman error cases: address of the end of the previous region or the | |
147 | * start of the image's entry area (usually 0) if there is no previous | |
148 | * region. | |
149 | */ | |
150 | if (u_boot_pos && u_boot_pos != BINMAN_SYM_MISSING) { | |
151 | /* Binman does not support separated entry addresses */ | |
8bee2d25 SG |
152 | spl_image->entry_point = u_boot_pos; |
153 | spl_image->load_addr = u_boot_pos; | |
154 | } else { | |
155 | spl_image->entry_point = CONFIG_SYS_UBOOT_START; | |
156 | spl_image->load_addr = CONFIG_SYS_TEXT_BASE; | |
157 | } | |
d95ceb97 SG |
158 | spl_image->os = IH_OS_U_BOOT; |
159 | spl_image->name = "U-Boot"; | |
0c3117b1 HS |
160 | } |
161 | ||
8a9dc16e MV |
162 | #ifdef CONFIG_SPL_LOAD_FIT_FULL |
163 | /* Parse and load full fitImage in SPL */ | |
164 | static int spl_load_fit_image(struct spl_image_info *spl_image, | |
165 | const struct image_header *header) | |
166 | { | |
167 | bootm_headers_t images; | |
168 | const char *fit_uname_config = NULL; | |
169 | const char *fit_uname_fdt = FIT_FDT_PROP; | |
170 | const char *uname; | |
171 | ulong fw_data = 0, dt_data = 0, img_data = 0; | |
172 | ulong fw_len = 0, dt_len = 0, img_len = 0; | |
173 | int idx, conf_noffset; | |
174 | int ret; | |
175 | ||
176 | #ifdef CONFIG_SPL_FIT_SIGNATURE | |
177 | images.verify = 1; | |
178 | #endif | |
179 | ret = fit_image_load(&images, (ulong)header, | |
180 | NULL, &fit_uname_config, | |
181 | IH_ARCH_DEFAULT, IH_TYPE_STANDALONE, -1, | |
182 | FIT_LOAD_REQUIRED, &fw_data, &fw_len); | |
183 | if (ret < 0) | |
184 | return ret; | |
185 | ||
186 | spl_image->size = fw_len; | |
187 | spl_image->entry_point = fw_data; | |
188 | spl_image->load_addr = fw_data; | |
189 | spl_image->os = IH_OS_U_BOOT; | |
190 | spl_image->name = "U-Boot"; | |
191 | ||
d6330064 | 192 | debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n", |
30c0740e | 193 | spl_image->name, spl_image->load_addr, spl_image->size); |
8a9dc16e MV |
194 | |
195 | #ifdef CONFIG_SPL_FIT_SIGNATURE | |
196 | images.verify = 1; | |
197 | #endif | |
a9a8271e | 198 | ret = fit_image_load(&images, (ulong)header, |
8a9dc16e MV |
199 | &fit_uname_fdt, &fit_uname_config, |
200 | IH_ARCH_DEFAULT, IH_TYPE_FLATDT, -1, | |
201 | FIT_LOAD_OPTIONAL, &dt_data, &dt_len); | |
a9a8271e MV |
202 | if (ret >= 0) |
203 | spl_image->fdt_addr = (void *)dt_data; | |
8a9dc16e MV |
204 | |
205 | conf_noffset = fit_conf_get_node((const void *)header, | |
206 | fit_uname_config); | |
207 | if (conf_noffset <= 0) | |
208 | return 0; | |
209 | ||
210 | for (idx = 0; | |
211 | uname = fdt_stringlist_get((const void *)header, conf_noffset, | |
212 | FIT_LOADABLE_PROP, idx, | |
213 | NULL), uname; | |
214 | idx++) | |
215 | { | |
216 | #ifdef CONFIG_SPL_FIT_SIGNATURE | |
217 | images.verify = 1; | |
218 | #endif | |
219 | ret = fit_image_load(&images, (ulong)header, | |
220 | &uname, &fit_uname_config, | |
221 | IH_ARCH_DEFAULT, IH_TYPE_LOADABLE, -1, | |
222 | FIT_LOAD_OPTIONAL_NON_ZERO, | |
223 | &img_data, &img_len); | |
224 | if (ret < 0) | |
225 | return ret; | |
226 | } | |
227 | ||
228 | return 0; | |
229 | } | |
230 | #endif | |
231 | ||
71316c1d SG |
232 | int spl_parse_image_header(struct spl_image_info *spl_image, |
233 | const struct image_header *header) | |
8cf686e1 | 234 | { |
8a9dc16e MV |
235 | #ifdef CONFIG_SPL_LOAD_FIT_FULL |
236 | int ret = spl_load_fit_image(spl_image, header); | |
237 | ||
238 | if (!ret) | |
239 | return ret; | |
240 | #endif | |
77552b06 | 241 | if (image_get_magic(header) == IH_MAGIC) { |
722a6b17 AD |
242 | #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT |
243 | u32 header_size = sizeof(struct image_header); | |
244 | ||
dae5c2dc SG |
245 | #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK |
246 | /* check uImage header CRC */ | |
247 | if (!image_check_hcrc(header)) { | |
248 | puts("SPL: Image header CRC check failed!\n"); | |
249 | return -EINVAL; | |
250 | } | |
251 | #endif | |
252 | ||
71316c1d | 253 | if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { |
022b4975 SR |
254 | /* |
255 | * On some system (e.g. powerpc), the load-address and | |
256 | * entry-point is located at address 0. We can't load | |
257 | * to 0-0x40. So skip header in this case. | |
258 | */ | |
71316c1d SG |
259 | spl_image->load_addr = image_get_load(header); |
260 | spl_image->entry_point = image_get_ep(header); | |
261 | spl_image->size = image_get_data_size(header); | |
022b4975 | 262 | } else { |
71316c1d | 263 | spl_image->entry_point = image_get_load(header); |
022b4975 | 264 | /* Load including the header */ |
71316c1d | 265 | spl_image->load_addr = spl_image->entry_point - |
022b4975 | 266 | header_size; |
71316c1d | 267 | spl_image->size = image_get_data_size(header) + |
022b4975 SR |
268 | header_size; |
269 | } | |
dae5c2dc SG |
270 | #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK |
271 | /* store uImage data length and CRC to check later */ | |
272 | spl_image->dcrc_data = image_get_load(header); | |
273 | spl_image->dcrc_length = image_get_data_size(header); | |
274 | spl_image->dcrc = image_get_dcrc(header); | |
275 | #endif | |
276 | ||
71316c1d SG |
277 | spl_image->os = image_get_os(header); |
278 | spl_image->name = image_get_name(header); | |
d6330064 SG |
279 | debug(SPL_TPL_PROMPT |
280 | "payload image: %32s load addr: 0x%lx size: %d\n", | |
30c0740e | 281 | spl_image->name, spl_image->load_addr, spl_image->size); |
722a6b17 AD |
282 | #else |
283 | /* LEGACY image not supported */ | |
2d2531be | 284 | debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); |
722a6b17 AD |
285 | return -EINVAL; |
286 | #endif | |
8cf686e1 | 287 | } else { |
8c80eb3b AA |
288 | #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE |
289 | /* | |
290 | * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the | |
291 | * code which loads images in SPL cannot guarantee that | |
292 | * absolutely all read errors will be reported. | |
293 | * An example is the LPC32XX MLC NAND driver, which | |
294 | * will consider that a completely unreadable NAND block | |
295 | * is bad, and thus should be skipped silently. | |
296 | */ | |
297 | panic("** no mkimage signature but raw image not supported"); | |
85a37729 PK |
298 | #endif |
299 | ||
431889d6 LM |
300 | #ifdef CONFIG_SPL_OS_BOOT |
301 | ulong start, end; | |
302 | ||
303 | if (!bootz_setup((ulong)header, &start, &end)) { | |
71316c1d SG |
304 | spl_image->name = "Linux"; |
305 | spl_image->os = IH_OS_LINUX; | |
306 | spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; | |
307 | spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; | |
308 | spl_image->size = end - start; | |
d6330064 SG |
309 | debug(SPL_TPL_PROMPT |
310 | "payload zImage, load addr: 0x%lx size: %d\n", | |
71316c1d | 311 | spl_image->load_addr, spl_image->size); |
431889d6 LM |
312 | return 0; |
313 | } | |
314 | #endif | |
85a37729 | 315 | |
24eb39b5 | 316 | #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT |
8cf686e1 | 317 | /* Signature not found - assume u-boot.bin */ |
026b2fe3 | 318 | debug("mkimage signature not found - ih_magic = %x\n", |
8cf686e1 | 319 | header->ih_magic); |
71316c1d | 320 | spl_set_header_raw_uboot(spl_image); |
24eb39b5 AD |
321 | #else |
322 | /* RAW image not supported, proceed to other boot methods. */ | |
2d2531be | 323 | debug("Raw boot image support not enabled, proceeding to other boot methods\n"); |
24eb39b5 | 324 | return -EINVAL; |
8c80eb3b | 325 | #endif |
8cf686e1 | 326 | } |
24eb39b5 | 327 | |
7e0f2267 | 328 | return 0; |
8cf686e1 A |
329 | } |
330 | ||
a759f1e0 | 331 | __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) |
8cf686e1 | 332 | { |
4a0eb757 S |
333 | typedef void __noreturn (*image_entry_noargs_t)(void); |
334 | ||
8cf686e1 | 335 | image_entry_noargs_t image_entry = |
11e1479b | 336 | (image_entry_noargs_t)spl_image->entry_point; |
8cf686e1 | 337 | |
30c0740e | 338 | debug("image entry point: 0x%lx\n", spl_image->entry_point); |
4a0eb757 | 339 | image_entry(); |
8cf686e1 A |
340 | } |
341 | ||
b0edea3c SG |
342 | #if CONFIG_IS_ENABLED(HANDOFF) |
343 | /** | |
344 | * Set up the SPL hand-off information | |
345 | * | |
346 | * This is initially empty (zero) but can be written by | |
347 | */ | |
348 | static int setup_spl_handoff(void) | |
349 | { | |
350 | struct spl_handoff *ho; | |
351 | ||
352 | ho = bloblist_ensure(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); | |
353 | if (!ho) | |
354 | return -ENOENT; | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
359 | static int write_spl_handoff(void) | |
360 | { | |
361 | struct spl_handoff *ho; | |
362 | ||
363 | ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); | |
364 | if (!ho) | |
365 | return -ENOENT; | |
366 | handoff_save_dram(ho); | |
367 | #ifdef CONFIG_SANDBOX | |
368 | ho->arch.magic = TEST_HANDOFF_MAGIC; | |
369 | #endif | |
370 | debug(SPL_TPL_PROMPT "Wrote SPL handoff\n"); | |
371 | ||
372 | return 0; | |
373 | } | |
374 | #else | |
375 | static inline int setup_spl_handoff(void) { return 0; } | |
376 | static inline int write_spl_handoff(void) { return 0; } | |
377 | ||
378 | #endif /* HANDOFF */ | |
379 | ||
340f418a | 380 | static int spl_common_init(bool setup_malloc) |
bcae7211 | 381 | { |
f3d46bd6 SG |
382 | int ret; |
383 | ||
f1896c45 | 384 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) |
340f418a | 385 | if (setup_malloc) { |
94b9e22e | 386 | #ifdef CONFIG_MALLOC_F_ADDR |
340f418a | 387 | gd->malloc_base = CONFIG_MALLOC_F_ADDR; |
94b9e22e | 388 | #endif |
f1896c45 | 389 | gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); |
340f418a EC |
390 | gd->malloc_ptr = 0; |
391 | } | |
24dafad5 | 392 | #endif |
824bb1b4 SG |
393 | ret = bootstage_init(true); |
394 | if (ret) { | |
395 | debug("%s: Failed to set up bootstage: ret=%d\n", __func__, | |
396 | ret); | |
397 | return ret; | |
398 | } | |
399 | bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl"); | |
4d8d3056 SG |
400 | #if CONFIG_IS_ENABLED(LOG) |
401 | ret = log_init(); | |
402 | if (ret) { | |
403 | debug("%s: Failed to set up logging\n", __func__); | |
404 | return ret; | |
405 | } | |
406 | #endif | |
e945a726 SG |
407 | if (CONFIG_IS_ENABLED(BLOBLIST)) { |
408 | ret = bloblist_init(); | |
409 | if (ret) { | |
410 | debug("%s: Failed to set up bloblist: ret=%d\n", | |
411 | __func__, ret); | |
412 | return ret; | |
413 | } | |
414 | } | |
b0edea3c SG |
415 | if (CONFIG_IS_ENABLED(HANDOFF)) { |
416 | int ret; | |
417 | ||
418 | ret = setup_spl_handoff(); | |
419 | if (ret) { | |
420 | puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); | |
421 | hang(); | |
422 | } | |
423 | } | |
d223e0a8 | 424 | if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { |
f3d46bd6 SG |
425 | ret = fdtdec_setup(); |
426 | if (ret) { | |
427 | debug("fdtdec_setup() returned error %d\n", ret); | |
070d00b8 | 428 | return ret; |
f3d46bd6 SG |
429 | } |
430 | } | |
f1c6e192 | 431 | if (CONFIG_IS_ENABLED(DM)) { |
824bb1b4 | 432 | bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl"); |
7f73ca48 | 433 | /* With CONFIG_SPL_OF_PLATDATA, bring in all devices */ |
7d23b9cf | 434 | ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); |
824bb1b4 | 435 | bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL); |
f3d46bd6 SG |
436 | if (ret) { |
437 | debug("dm_init_and_scan() returned error %d\n", ret); | |
070d00b8 | 438 | return ret; |
f3d46bd6 SG |
439 | } |
440 | } | |
340f418a EC |
441 | |
442 | return 0; | |
443 | } | |
444 | ||
d1fc0a31 YS |
445 | void spl_set_bd(void) |
446 | { | |
c21f407b SG |
447 | /* |
448 | * NOTE: On some platforms (e.g. x86) bdata may be in flash and not | |
449 | * writeable. | |
450 | */ | |
d1fc0a31 YS |
451 | if (!gd->bd) |
452 | gd->bd = &bdata; | |
453 | } | |
454 | ||
340f418a EC |
455 | int spl_early_init(void) |
456 | { | |
457 | int ret; | |
458 | ||
94cb986e SG |
459 | debug("%s\n", __func__); |
460 | ||
340f418a EC |
461 | ret = spl_common_init(true); |
462 | if (ret) | |
463 | return ret; | |
464 | gd->flags |= GD_FLG_SPL_EARLY_INIT; | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
469 | int spl_init(void) | |
470 | { | |
471 | int ret; | |
cf334edf TR |
472 | bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && |
473 | IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); | |
340f418a | 474 | |
94cb986e SG |
475 | debug("%s\n", __func__); |
476 | ||
340f418a | 477 | if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { |
cf334edf | 478 | ret = spl_common_init(setup_malloc); |
340f418a EC |
479 | if (ret) |
480 | return ret; | |
481 | } | |
070d00b8 | 482 | gd->flags |= GD_FLG_SPL_INIT; |
2d01dd95 | 483 | |
070d00b8 SG |
484 | return 0; |
485 | } | |
486 | ||
f101e4bd NK |
487 | #ifndef BOOT_DEVICE_NONE |
488 | #define BOOT_DEVICE_NONE 0xdeadbeef | |
489 | #endif | |
490 | ||
f101e4bd NK |
491 | __weak void board_boot_order(u32 *spl_boot_list) |
492 | { | |
493 | spl_boot_list[0] = spl_boot_device(); | |
494 | } | |
495 | ||
a0a80290 SG |
496 | static struct spl_image_loader *spl_ll_find_loader(uint boot_device) |
497 | { | |
498 | struct spl_image_loader *drv = | |
499 | ll_entry_start(struct spl_image_loader, spl_image_loader); | |
500 | const int n_ents = | |
501 | ll_entry_count(struct spl_image_loader, spl_image_loader); | |
502 | struct spl_image_loader *entry; | |
503 | ||
504 | for (entry = drv; entry != drv + n_ents; entry++) { | |
505 | if (boot_device == entry->boot_device) | |
506 | return entry; | |
507 | } | |
508 | ||
509 | /* Not found */ | |
510 | return NULL; | |
511 | } | |
512 | ||
29d357d7 SG |
513 | static int spl_load_image(struct spl_image_info *spl_image, |
514 | struct spl_image_loader *loader) | |
070d00b8 | 515 | { |
dae5c2dc | 516 | int ret; |
ecdfd69a SG |
517 | struct spl_boot_device bootdev; |
518 | ||
29d357d7 | 519 | bootdev.boot_device = loader->boot_device; |
ecdfd69a SG |
520 | bootdev.boot_device_name = NULL; |
521 | ||
dae5c2dc SG |
522 | ret = loader->load_image(spl_image, &bootdev); |
523 | #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK | |
524 | if (!ret && spl_image->dcrc_length) { | |
525 | /* check data crc */ | |
526 | ulong dcrc = crc32_wd(0, (unsigned char *)spl_image->dcrc_data, | |
527 | spl_image->dcrc_length, CHUNKSZ_CRC32); | |
528 | if (dcrc != spl_image->dcrc) { | |
529 | puts("SPL: Image data CRC check failed!\n"); | |
530 | ret = -EINVAL; | |
531 | } | |
532 | } | |
533 | #endif | |
534 | return ret; | |
540bfe7d SG |
535 | } |
536 | ||
537 | /** | |
538 | * boot_from_devices() - Try loading an booting U-Boot from a list of devices | |
539 | * | |
540 | * @spl_image: Place to put the image details if successful | |
541 | * @spl_boot_list: List of boot devices to try | |
542 | * @count: Number of elements in spl_boot_list | |
543 | * @return 0 if OK, -ve on error | |
544 | */ | |
545 | static int boot_from_devices(struct spl_image_info *spl_image, | |
546 | u32 spl_boot_list[], int count) | |
547 | { | |
548 | int i; | |
549 | ||
550 | for (i = 0; i < count && spl_boot_list[i] != BOOT_DEVICE_NONE; i++) { | |
551 | struct spl_image_loader *loader; | |
552 | ||
540bfe7d | 553 | loader = spl_ll_find_loader(spl_boot_list[i]); |
18f26fdb | 554 | #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
2acf35db | 555 | if (loader) |
cf947da1 | 556 | printf("Trying to boot from %s\n", loader->name); |
2acf35db | 557 | else |
d6330064 | 558 | puts(SPL_TPL_PROMPT "Unsupported Boot Device!\n"); |
18f26fdb | 559 | #endif |
de5dd4c4 PT |
560 | if (loader && !spl_load_image(spl_image, loader)) { |
561 | spl_image->boot_device = spl_boot_list[i]; | |
540bfe7d | 562 | return 0; |
de5dd4c4 | 563 | } |
540bfe7d SG |
564 | } |
565 | ||
97d9df0a | 566 | return -ENODEV; |
5211b87e NK |
567 | } |
568 | ||
569 | void board_init_r(gd_t *dummy1, ulong dummy2) | |
570 | { | |
d32b2d1c SG |
571 | u32 spl_boot_list[] = { |
572 | BOOT_DEVICE_NONE, | |
573 | BOOT_DEVICE_NONE, | |
574 | BOOT_DEVICE_NONE, | |
575 | BOOT_DEVICE_NONE, | |
576 | BOOT_DEVICE_NONE, | |
577 | }; | |
578 | struct spl_image_info spl_image; | |
e945a726 | 579 | int ret; |
5211b87e | 580 | |
d6330064 | 581 | debug(">>" SPL_TPL_PROMPT "board_init_r()\n"); |
d1fc0a31 YS |
582 | |
583 | spl_set_bd(); | |
584 | ||
5211b87e NK |
585 | #if defined(CONFIG_SYS_SPL_MALLOC_START) |
586 | mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, | |
587 | CONFIG_SYS_SPL_MALLOC_SIZE); | |
588 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; | |
589 | #endif | |
590 | if (!(gd->flags & GD_FLG_SPL_INIT)) { | |
591 | if (spl_init()) | |
592 | hang(); | |
593 | } | |
f9d42d82 | 594 | #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6) |
5211b87e NK |
595 | /* |
596 | * timer_init() does not exist on PPC systems. The timer is initialized | |
597 | * and enabled (decrementer) in interrupt_init() here. | |
598 | */ | |
599 | timer_init(); | |
600 | #endif | |
601 | ||
af2f4426 | 602 | #if CONFIG_IS_ENABLED(BOARD_INIT) |
5211b87e NK |
603 | spl_board_init(); |
604 | #endif | |
605 | ||
06985289 SR |
606 | #if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT) |
607 | initr_watchdog(); | |
608 | #endif | |
609 | ||
b0edea3c SG |
610 | if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF)) |
611 | dram_init_banksize(); | |
612 | ||
a8be2494 LM |
613 | bootcount_inc(); |
614 | ||
d32b2d1c | 615 | memset(&spl_image, '\0', sizeof(spl_image)); |
5bf5250e VM |
616 | #ifdef CONFIG_SYS_SPL_ARGS_ADDR |
617 | spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; | |
618 | #endif | |
de5dd4c4 | 619 | spl_image.boot_device = BOOT_DEVICE_NONE; |
f101e4bd | 620 | board_boot_order(spl_boot_list); |
f101e4bd | 621 | |
540bfe7d SG |
622 | if (boot_from_devices(&spl_image, spl_boot_list, |
623 | ARRAY_SIZE(spl_boot_list))) { | |
d6330064 | 624 | puts(SPL_TPL_PROMPT "failed to boot from all boot devices\n"); |
5211b87e | 625 | hang(); |
f101e4bd | 626 | } |
5211b87e | 627 | |
de5dd4c4 | 628 | spl_perform_fixups(&spl_image); |
b0edea3c SG |
629 | if (CONFIG_IS_ENABLED(HANDOFF)) { |
630 | ret = write_spl_handoff(); | |
631 | if (ret) | |
632 | printf(SPL_TPL_PROMPT | |
633 | "SPL hand-off write failed (err=%d)\n", ret); | |
634 | } | |
e945a726 SG |
635 | if (CONFIG_IS_ENABLED(BLOBLIST)) { |
636 | ret = bloblist_finish(); | |
637 | if (ret) | |
638 | printf("Warning: Failed to finish bloblist (ret=%d)\n", | |
639 | ret); | |
640 | } | |
de5dd4c4 | 641 | |
6bcdd66d VM |
642 | #ifdef CONFIG_CPU_V7M |
643 | spl_image.entry_point |= 0x1; | |
644 | #endif | |
9ea5c6ef | 645 | switch (spl_image.os) { |
8cf686e1 A |
646 | case IH_OS_U_BOOT: |
647 | debug("Jumping to U-Boot\n"); | |
8cf686e1 | 648 | break; |
1d379090 PT |
649 | #if CONFIG_IS_ENABLED(ATF) |
650 | case IH_OS_ARM_TRUSTED_FIRMWARE: | |
651 | debug("Jumping to U-Boot via ARM Trusted Firmware\n"); | |
652 | spl_invoke_atf(&spl_image); | |
653 | break; | |
654 | #endif | |
70fe2876 KY |
655 | #if CONFIG_IS_ENABLED(OPTEE) |
656 | case IH_OS_TEE: | |
657 | debug("Jumping to U-Boot via OP-TEE\n"); | |
658 | spl_optee_entry(NULL, NULL, spl_image.fdt_addr, | |
659 | (void *)spl_image.entry_point); | |
660 | break; | |
661 | #endif | |
379c19ab SS |
662 | #ifdef CONFIG_SPL_OS_BOOT |
663 | case IH_OS_LINUX: | |
664 | debug("Jumping to Linux\n"); | |
6e7585bb | 665 | spl_fixup_fdt(); |
379c19ab | 666 | spl_board_prepare_for_linux(); |
5bf5250e | 667 | jump_to_image_linux(&spl_image); |
379c19ab | 668 | #endif |
8cf686e1 | 669 | default: |
42120981 | 670 | debug("Unsupported OS image.. Jumping nevertheless..\n"); |
8cf686e1 | 671 | } |
f1896c45 | 672 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) |
30c0740e | 673 | debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, |
fb4f5e7c SG |
674 | gd->malloc_ptr / 1024); |
675 | #endif | |
824bb1b4 | 676 | #ifdef CONFIG_BOOTSTAGE_STASH |
824bb1b4 SG |
677 | bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl"); |
678 | ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, | |
679 | CONFIG_BOOTSTAGE_STASH_SIZE); | |
680 | if (ret) | |
681 | debug("Failed to stash bootstage: err=%d\n", ret); | |
682 | #endif | |
a8c5112a | 683 | |
a8c5112a | 684 | debug("loaded - jumping to U-Boot...\n"); |
3a3b9147 | 685 | spl_board_prepare_for_boot(); |
a759f1e0 | 686 | jump_to_image_no_args(&spl_image); |
bcae7211 A |
687 | } |
688 | ||
117a0e02 | 689 | #ifdef CONFIG_SPL_SERIAL_SUPPORT |
6507f133 TR |
690 | /* |
691 | * This requires UART clocks to be enabled. In order for this to work the | |
692 | * caller must ensure that the gd pointer is valid. | |
693 | */ | |
bcae7211 A |
694 | void preloader_console_init(void) |
695 | { | |
bcae7211 A |
696 | gd->baudrate = CONFIG_BAUDRATE; |
697 | ||
bcae7211 A |
698 | serial_init(); /* serial communications setup */ |
699 | ||
b88befa5 IY |
700 | gd->have_console = 1; |
701 | ||
aedc08b2 | 702 | #if CONFIG_IS_ENABLED(BANNER_PRINT) |
d6330064 SG |
703 | puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - " |
704 | U_BOOT_TIME " " U_BOOT_TZ ")\n"); | |
0292bc0d | 705 | #endif |
861a86f4 TR |
706 | #ifdef CONFIG_SPL_DISPLAY_PRINT |
707 | spl_display_print(); | |
708 | #endif | |
cc3f7058 | 709 | } |
117a0e02 | 710 | #endif |
db910353 SG |
711 | |
712 | /** | |
713 | * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution | |
714 | * | |
715 | * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM | |
716 | * for the main board_init_r() execution. This is typically because we need | |
717 | * more stack space for things like the MMC sub-system. | |
718 | * | |
719 | * This function calculates the stack position, copies the global_data into | |
adc421e4 AA |
720 | * place, sets the new gd (except for ARM, for which setting GD within a C |
721 | * function may not always work) and returns the new stack position. The | |
722 | * caller is responsible for setting up the sp register and, in the case | |
723 | * of ARM, setting up gd. | |
724 | * | |
725 | * All of this is done using the same layout and alignments as done in | |
726 | * board_init_f_init_reserve() / board_init_f_alloc_reserve(). | |
db910353 SG |
727 | * |
728 | * @return new stack location, or 0 to use the same stack | |
729 | */ | |
730 | ulong spl_relocate_stack_gd(void) | |
731 | { | |
732 | #ifdef CONFIG_SPL_STACK_R | |
733 | gd_t *new_gd; | |
adc421e4 | 734 | ulong ptr = CONFIG_SPL_STACK_R_ADDR; |
db910353 | 735 | |
ae2cee2e | 736 | #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN) |
dcfcb8d4 | 737 | if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { |
438dcabb SG |
738 | debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n", |
739 | gd->malloc_ptr, gd->malloc_ptr / 1024); | |
dcfcb8d4 HG |
740 | ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; |
741 | gd->malloc_base = ptr; | |
742 | gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; | |
743 | gd->malloc_ptr = 0; | |
744 | } | |
745 | #endif | |
adc421e4 AA |
746 | /* Get stack position: use 8-byte alignment for ABI compliance */ |
747 | ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); | |
748 | new_gd = (gd_t *)ptr; | |
749 | memcpy(new_gd, (void *)gd, sizeof(gd_t)); | |
2f11cd91 SG |
750 | #if CONFIG_IS_ENABLED(DM) |
751 | dm_fixup_for_gd_move(new_gd); | |
752 | #endif | |
adc421e4 AA |
753 | #if !defined(CONFIG_ARM) |
754 | gd = new_gd; | |
755 | #endif | |
db910353 SG |
756 | return ptr; |
757 | #else | |
758 | return 0; | |
759 | #endif | |
760 | } |