[J-u-boot.git] / include / sja1000.h

/*
 * Copyright 2009, Matthias Fuchs <[email protected]>
 *
 * SJA1000 register layout for basic CAN mode
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SJA1000_H_
#define _SJA1000_H_

/*
 * SJA1000 register layout in basic can mode
 */
struct sja1000_basic_s {
	u8 cr;
	u8 cmr;
	u8 sr;
	u8 ir;
	u8 ac;
	u8 am;
	u8 btr0;
	u8 btr1;
	u8 oc;
	u8 txb[10];
	u8 rxb[10];
	u8 unused;
	u8 cdr;
};

/* control register */
#define CR_RR		0x01

/* output control register */
#define OC_MODE0	0x01
#define OC_MODE1	0x02
#define OC_POL0		0x04
#define OC_TN0		0x08
#define OC_TP0		0x10
#define OC_POL1		0x20
#define OC_TN1		0x40
#define OC_TP1		0x80

#endif
Commit	Line	Data
067f54c6 MF	1	/*
	2	* Copyright 2009, Matthias Fuchs <[email protected]>
	3	*
	4	* SJA1000 register layout for basic CAN mode
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
067f54c6 MF	7	*/
	8
	9	#ifndef _SJA1000_H_
	10	#define _SJA1000_H_
	11
	12	/*
	13	* SJA1000 register layout in basic can mode
	14	*/
	15	struct sja1000_basic_s {
	16	u8 cr;
	17	u8 cmr;
	18	u8 sr;
	19	u8 ir;
	20	u8 ac;
	21	u8 am;
	22	u8 btr0;
	23	u8 btr1;
	24	u8 oc;
	25	u8 txb[10];
	26	u8 rxb[10];
	27	u8 unused;
	28	u8 cdr;
	29	};
	30
	31	/* control register */
	32	#define CR_RR 0x01
	33
	34	/* output control register */
	35	#define OC_MODE0 0x01
	36	#define OC_MODE1 0x02
	37	#define OC_POL0 0x04
	38	#define OC_TN0 0x08
	39	#define OC_TP0 0x10
	40	#define OC_POL1 0x20
	41	#define OC_TN1 0x40
	42	#define OC_TP1 0x80
	43
	44	#endif