[J-u-boot.git] / include / configs / tuxx1.h

/*
 * Copyright (C) 2006 Freescale Semiconductor, Inc.
 *                    Dave Liu <[email protected]>
 *
 * Copyright (C) 2007 Logic Product Development, Inc.
 *                    Peter Barada <[email protected]>
 *
 * Copyright (C) 2007 MontaVista Software, Inc.
 *                    Anton Vorontsov <[email protected]>
 *
 * (C) Copyright 2008
 * Heiko Schocher, DENX Software Engineering, [email protected].
 *
 * (C) Copyright 2010-2013
 * Lukas Roggli, KEYMILE Ltd, [email protected]
 * Holger Brunck,  Keymile GmbH, [email protected]
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#if defined(CONFIG_KMSUPX5)
#define CONFIG_KM_BOARD_NAME	"kmsupx5"
#define CONFIG_HOSTNAME		kmsupx5
#elif defined(CONFIG_TUGE1)
#define CONFIG_KM_BOARD_NAME	"tuge1"
#define CONFIG_HOSTNAME		tuge1
#elif defined(CONFIG_TUXX1)	/* TUXX1 board (tuxa1/tuda1) specific */
#define CONFIG_KM_BOARD_NAME	"tuxx1"
#define CONFIG_HOSTNAME		tuxx1
#elif defined(CONFIG_KMOPTI2)
#define CONFIG_KM_BOARD_NAME	"kmopti2"
#define CONFIG_HOSTNAME		kmopti2
#else
#error ("Board not supported")
#endif

#define	CONFIG_SYS_TEXT_BASE	0xF0000000

/* include common defines/options for all 8321 Keymile boards */
#include "km/km8321-common.h"

#define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
#define	CONFIG_SYS_APP1_SIZE	256 /* Megabytes */
#if defined(CONFIG_TUXX1) || defined(CONFIG_KMOPTI2)
#define CONFIG_SYS_APP2_BASE	0xB0000000    /* PINC3 */
#define	CONFIG_SYS_APP2_SIZE	256 /* Megabytes */
#endif

/*
 * Init Local Bus Memory Controller:
 *				      Device on
 * Bank Bus     Machine PortSz  Size  TUDA1  TUXA1  TUGE1  KMSUPX4 KMOPTI2
 * ---- ---     ------- ------  ----- ---------------------------------------
 *  2   Local   GPCM    8 bit  256MB  PAXG  LPXF   PAXI     LPXF   PAXE
 *  3   Local   GPCM    8 bit  256MB  PINC3 PINC2  unused  unused  OPI2(16 bit)
 *
 */

/*
 * Configuration for C2 on the local bus
 */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM	CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM	(LBLAWAR_EN | LBLAWAR_256MB)

#define CONFIG_SYS_BR2_PRELIM	(CONFIG_SYS_APP1_BASE | \
				 BR_PS_8 | \
				 BR_MS_GPCM | \
				 BR_V)

#define CONFIG_SYS_OR2_PRELIM	(MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
				 OR_GPCM_CSNT | \
				 OR_GPCM_ACS_DIV4 | \
				 OR_GPCM_SCY_2 | \
				 OR_GPCM_TRLX_SET | \
				 OR_GPCM_EHTR_CLEAR | \
				 OR_GPCM_EAD)
#if defined(CONFIG_TUXX1)
/*
 * Configuration for C3 on the local bus
 */
/* Access window base at PINC3 base */
#define CONFIG_SYS_LBLAWBAR3_PRELIM	CONFIG_SYS_APP2_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR3_PRELIM	(LBLAWAR_EN | LBLAWAR_256MB)

#define CONFIG_SYS_BR3_PRELIM	(CONFIG_SYS_APP2_BASE | \
				 BR_PS_8 |		\
				 BR_MS_GPCM |		\
				 BR_V)

#define CONFIG_SYS_OR3_PRELIM	(MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
				 OR_GPCM_CSNT |	\
				 OR_GPCM_ACS_DIV2 | \
				 OR_GPCM_SCY_2 | \
				 OR_GPCM_TRLX_SET | \
				 OR_GPCM_EHTR_CLEAR)

#define CONFIG_SYS_MAMR		(MxMR_GPL_x4DIS | \
				 0x0000c000 | \
				 MxMR_WLFx_2X)
#endif

#if defined(CONFIG_KMOPTI2)
/*
 * Configuration for C3 on the local bus
 */
#define CONFIG_SYS_LBLAWBAR3_PRELIM	CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM	(LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR3_PRELIM	(CONFIG_SYS_APP2_BASE | \
				 BR_PS_16 |		\
				 BR_MS_GPCM |		\
				 BR_V)
#define CONFIG_SYS_OR3_PRELIM	(MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
				 OR_GPCM_SCY_4 | \
				 OR_GPCM_TRLX_CLEAR | \
				 OR_GPCM_EHTR_CLEAR)
#endif

/*
 * MMU Setup
 */
/* APP1: icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT5L	(CONFIG_SYS_APP1_BASE | \
				 BATL_PP_RW | \
				 BATL_MEMCOHERENCE)
/* 512M should also include APP2... */
#define CONFIG_SYS_IBAT5U	(CONFIG_SYS_APP1_BASE | \
				 BATU_BL_256M | \
				 BATU_VS | \
				 BATU_VP)
#define CONFIG_SYS_DBAT5L	(CONFIG_SYS_APP1_BASE | \
				 BATL_PP_RW | \
				 BATL_CACHEINHIBIT | \
				 BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT5U	CONFIG_SYS_IBAT5U

#if defined(CONFIG_TUGE1) || defined(CONFIG_KMSUPX5)
#define CONFIG_SYS_IBAT6L	(0)
#define CONFIG_SYS_IBAT6U	(0)
#define CONFIG_SYS_DBAT6L	CONFIG_SYS_IBAT6L
#else
/* APP2:  icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L	(CONFIG_SYS_APP2_BASE | \
				 BATL_PP_RW | \
				 BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT6U	(CONFIG_SYS_APP2_BASE | \
				 BATU_BL_256M | \
				 BATU_VS | \
				 BATU_VP)
#define CONFIG_SYS_DBAT6L	(CONFIG_SYS_APP2_BASE | \
				 BATL_PP_RW | \
				 BATL_CACHEINHIBIT | \
				 BATL_GUARDEDSTORAGE)
#endif
#define CONFIG_SYS_DBAT6U	CONFIG_SYS_IBAT6U

#define CONFIG_SYS_IBAT7L	(0)
#define CONFIG_SYS_IBAT7U	(0)
#define CONFIG_SYS_DBAT7L	CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U	CONFIG_SYS_IBAT7U

#endif /* __CONFIG_H */
Commit	Line	Data
dc6033ec HS	1	/*
	2	* Copyright (C) 2006 Freescale Semiconductor, Inc.
	3	* Dave Liu <[email protected]>
	4	*
	5	* Copyright (C) 2007 Logic Product Development, Inc.
	6	* Peter Barada <[email protected]>
	7	*
	8	* Copyright (C) 2007 MontaVista Software, Inc.
	9	* Anton Vorontsov <[email protected]>
	10	*
	11	* (C) Copyright 2008
	12	* Heiko Schocher, DENX Software Engineering, [email protected].
	13	*
47f53649	14	* (C) Copyright 2010-2013
dc6033ec	15	* Lukas Roggli, KEYMILE Ltd, [email protected]
5f2a44d5	16	* Holger Brunck, Keymile GmbH, [email protected]
dc6033ec	17	*
1a459660	18	* SPDX-License-Identifier: GPL-2.0+
dc6033ec HS	19	*/
	20
	21	#ifndef __CONFIG_H
	22	#define __CONFIG_H
	23
	24	/*
	25	* High Level Configuration Options
	26	*/
47f53649	27	#if defined(CONFIG_KMSUPX5)
7f4bd9a6 HB	28	#define CONFIG_KM_BOARD_NAME "kmsupx5"
7f4bd9a6 HB	29	#define CONFIG_HOSTNAME kmsupx5
47f53649	30	#elif defined(CONFIG_TUGE1)
7f4bd9a6 HB	31	#define CONFIG_KM_BOARD_NAME "tuge1"
7f4bd9a6 HB	32	#define CONFIG_HOSTNAME tuge1
47f53649	33	#elif defined(CONFIG_TUXX1) /* TUXX1 board (tuxa1/tuda1) specific */
7f4bd9a6	34	#define CONFIG_KM_BOARD_NAME "tuxx1"
5f2a44d5	35	#define CONFIG_HOSTNAME tuxx1
4714f8e4 HB	36	#elif defined(CONFIG_KMOPTI2)
	37	#define CONFIG_KM_BOARD_NAME "kmopti2"
	38	#define CONFIG_HOSTNAME kmopti2
47f53649 HB	39	#else
47f53649 HB	40	#error ("Board not supported")
f5a474bd	41	#endif
dc6033ec HS	42
dc6033ec HS	43	#define CONFIG_SYS_TEXT_BASE 0xF0000000
dc6033ec	44
8ed74341	45	/* include common defines/options for all 8321 Keymile boards */
264eaa0e	46	#include "km/km8321-common.h"
dc6033ec	47
dc6033ec HS	48	#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
dc6033ec HS	49	#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
4714f8e4	50	#if defined(CONFIG_TUXX1) \|\| defined(CONFIG_KMOPTI2)
dc6033ec HS	51	#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
dc6033ec HS	52	#define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
f5a474bd	53	#endif
dc6033ec	54
dc6033ec HS	55	/*
dc6033ec HS	56	* Init Local Bus Memory Controller:
4714f8e4 HB	57	* Device on
	58	* Bank Bus Machine PortSz Size TUDA1 TUXA1 TUGE1 KMSUPX4 KMOPTI2
	59	* ---- --- ------- ------ ----- ---------------------------------------
	60	* 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI LPXF PAXE
	61	* 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused unused OPI2(16 bit)
dc6033ec HS	62	*
	63	*/
	64
	65	/*
5f2a44d5	66	* Configuration for C2 on the local bus
dc6033ec HS	67	*/
	68	/* Window base at flash base */
	69	#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
	70	/* Window size: 256 MB */
	71	#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN \| LBLAWAR_256MB)
	72
	73	#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE \| \
	74	BR_PS_8 \| \
	75	BR_MS_GPCM \| \
	76	BR_V)
	77
	78	#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) \| \
	79	OR_GPCM_CSNT \| \
	80	OR_GPCM_ACS_DIV4 \| \
	81	OR_GPCM_SCY_2 \| \
7d6a0982 JH	82	OR_GPCM_TRLX_SET \| \
7d6a0982 JH	83	OR_GPCM_EHTR_CLEAR \| \
dc6033ec	84	OR_GPCM_EAD)
47f53649	85	#if defined(CONFIG_TUXX1)
dc6033ec	86	/*
5f2a44d5	87	* Configuration for C3 on the local bus
dc6033ec HS	88	*/
	89	/* Access window base at PINC3 base */
	90	#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
	91	/* Window size: 256 MB */
	92	#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN \| LBLAWAR_256MB)
	93
	94	#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE \| \
	95	BR_PS_8 \| \
	96	BR_MS_GPCM \| \
	97	BR_V)
	98
	99	#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) \| \
	100	OR_GPCM_CSNT \| \
7d6a0982 JH	101	OR_GPCM_ACS_DIV2 \| \
	102	OR_GPCM_SCY_2 \| \
	103	OR_GPCM_TRLX_SET \| \
	104	OR_GPCM_EHTR_CLEAR)
dc6033ec HS	105
	106	#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS \| \
	107	0x0000c000 \| \
	108	MxMR_WLFx_2X)
f5a474bd	109	#endif
dc6033ec	110
4714f8e4 HB	111	#if defined(CONFIG_KMOPTI2)
	112	/*
	113	* Configuration for C3 on the local bus
	114	*/
	115	#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
	116	#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN \| LBLAWAR_256MB)
	117	#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE \| \
	118	BR_PS_16 \| \
	119	BR_MS_GPCM \| \
	120	BR_V)
	121	#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) \| \
	122	OR_GPCM_SCY_4 \| \
	123	OR_GPCM_TRLX_CLEAR \| \
	124	OR_GPCM_EHTR_CLEAR)
	125	#endif
	126
dc6033ec HS	127	/*
	128	* MMU Setup
	129	*/
5f2a44d5	130	/* APP1: icache cacheable, but dcache-inhibit and guarded */
dc6033ec	131	#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE \| \
72cd4087	132	BATL_PP_RW \| \
dc6033ec HS	133	BATL_MEMCOHERENCE)
	134	/* 512M should also include APP2... */
	135	#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE \| \
	136	BATU_BL_256M \| \
	137	BATU_VS \| \
	138	BATU_VP)
	139	#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE \| \
72cd4087	140	BATL_PP_RW \| \
dc6033ec HS	141	BATL_CACHEINHIBIT \| \
	142	BATL_GUARDEDSTORAGE)
	143	#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
	144
47f53649	145	#if defined(CONFIG_TUGE1) \|\| defined(CONFIG_KMSUPX5)
f5a474bd HB	146	#define CONFIG_SYS_IBAT6L (0)
	147	#define CONFIG_SYS_IBAT6U (0)
	148	#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
	149	#else
5f2a44d5	150	/* APP2: icache cacheable, but dcache-inhibit and guarded */
dc6033ec	151	#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE \| \
72cd4087	152	BATL_PP_RW \| \
dc6033ec HS	153	BATL_MEMCOHERENCE)
	154	#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE \| \
	155	BATU_BL_256M \| \
	156	BATU_VS \| \
	157	BATU_VP)
	158	#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE \| \
72cd4087	159	BATL_PP_RW \| \
dc6033ec HS	160	BATL_CACHEINHIBIT \| \
dc6033ec HS	161	BATL_GUARDEDSTORAGE)
f5a474bd	162	#endif
dc6033ec HS	163	#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
	164
	165	#define CONFIG_SYS_IBAT7L (0)
	166	#define CONFIG_SYS_IBAT7U (0)
	167	#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
	168	#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
dc6033ec HS	169
dc6033ec HS	170	#endif /* __CONFIG_H */