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powerpc/b4860qds: Added Support for B4860QDS
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1/*
2 * Copyright 2011 Freescale Semiconductor
3 * Author: Shengzhou Liu <[email protected]>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
8 * any later version.
9 *
10 * This file provides support for the QIXIS of some Freescale reference boards.
11 *
12 */
13
14#include <common.h>
15#include <command.h>
16#include <asm/io.h>
2ae4e8d9 17#include <linux/time.h>
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18#include "qixis.h"
19
20u8 qixis_read(unsigned int reg)
21{
22 void *p = (void *)QIXIS_BASE;
23
24 return in_8(p + reg);
25}
26
27void qixis_write(unsigned int reg, u8 value)
28{
29 void *p = (void *)QIXIS_BASE;
30
31 out_8(p + reg, value);
32}
33
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34u16 qixis_read_minor(void)
35{
36 u16 minor;
37
38 /* this data is in little endian */
39 QIXIS_WRITE(tagdata, 5);
40 minor = QIXIS_READ(tagdata);
41 QIXIS_WRITE(tagdata, 6);
42 minor += QIXIS_READ(tagdata) << 8;
43
44 return minor;
45}
46
47char *qixis_read_time(char *result)
48{
49 time_t time = 0;
50 int i;
51
52 /* timestamp is in 32-bit big endian */
53 for (i = 8; i <= 11; i++) {
54 QIXIS_WRITE(tagdata, i);
55 time = (time << 8) + QIXIS_READ(tagdata);
56 }
57
58 return ctime_r(&time, result);
59}
60
61char *qixis_read_tag(char *buf)
62{
63 int i;
64 char tag, *ptr = buf;
65
66 for (i = 16; i <= 63; i++) {
67 QIXIS_WRITE(tagdata, i);
68 tag = QIXIS_READ(tagdata);
69 *(ptr++) = tag;
70 if (!tag)
71 break;
72 }
73 if (i > 63)
74 *ptr = '\0';
75
76 return buf;
77}
78
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79void qixis_reset(void)
80{
9f26fd79 81 QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);
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82}
83
84void qixis_bank_reset(void)
85{
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86 QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
87 QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
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88}
89
9f26fd79 90/* Set the boot bank to the power-on default bank */
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91void clear_altbank(void)
92{
93 u8 reg;
94
95 reg = QIXIS_READ(brdcfg[0]);
9f26fd79 96 reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_DFLTBANK;
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97 QIXIS_WRITE(brdcfg[0], reg);
98}
99
100/* Set the boot bank to the alternate bank */
101void set_altbank(void)
102{
103 u8 reg;
104
105 reg = QIXIS_READ(brdcfg[0]);
106 reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_ALTBANK;
107 QIXIS_WRITE(brdcfg[0], reg);
108}
109
110#ifdef DEBUG
111static void qixis_dump_regs(void)
112{
113 int i;
114
115 printf("id = %02x\n", QIXIS_READ(id));
116 printf("arch = %02x\n", QIXIS_READ(arch));
117 printf("scver = %02x\n", QIXIS_READ(scver));
118 printf("model = %02x\n", QIXIS_READ(model));
119 printf("rst_ctl = %02x\n", QIXIS_READ(rst_ctl));
120 printf("aux = %02x\n", QIXIS_READ(aux));
121 for (i = 0; i < 16; i++)
122 printf("brdcfg%02d = %02x\n", i, QIXIS_READ(brdcfg[i]));
123 for (i = 0; i < 16; i++)
124 printf("dutcfg%02d = %02x\n", i, QIXIS_READ(dutcfg[i]));
125 printf("sclk = %02x%02x%02x\n", QIXIS_READ(sclk[0]),
126 QIXIS_READ(sclk[1]), QIXIS_READ(sclk[2]));
127 printf("dclk = %02x%02x%02x\n", QIXIS_READ(dclk[0]),
128 QIXIS_READ(dclk[1]), QIXIS_READ(dclk[2]));
129 printf("aux = %02x\n", QIXIS_READ(aux));
130 printf("watch = %02x\n", QIXIS_READ(watch));
131 printf("ctl_sys = %02x\n", QIXIS_READ(ctl_sys));
132 printf("rcw_ctl = %02x\n", QIXIS_READ(rcw_ctl));
133 printf("present = %02x\n", QIXIS_READ(present));
e4de13e3 134 printf("present2 = %02x\n", QIXIS_READ(present2));
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135 printf("clk_spd = %02x\n", QIXIS_READ(clk_spd));
136 printf("stat_dut = %02x\n", QIXIS_READ(stat_dut));
137 printf("stat_sys = %02x\n", QIXIS_READ(stat_sys));
138 printf("stat_alrm = %02x\n", QIXIS_READ(stat_alrm));
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139}
140#endif
141
142int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
143{
144 int i;
145
146 if (argc <= 1) {
147 clear_altbank();
148 qixis_reset();
149 } else if (strcmp(argv[1], "altbank") == 0) {
150 set_altbank();
151 qixis_bank_reset();
152 } else if (strcmp(argv[1], "watchdog") == 0) {
153 static char *period[9] = {"2s", "4s", "8s", "16s", "32s",
154 "1min", "2min", "4min", "8min"};
155 u8 rcfg = QIXIS_READ(rcfg_ctl);
156
157 if (argv[2] == NULL) {
158 printf("qixis watchdog <watchdog_period>\n");
159 return 0;
160 }
161 for (i = 0; i < ARRAY_SIZE(period); i++) {
162 if (strcmp(argv[2], period[i]) == 0) {
163 /* disable watchdog */
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164 QIXIS_WRITE(rcfg_ctl,
165 rcfg & ~QIXIS_RCFG_CTL_WATCHDOG_ENBLE);
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166 QIXIS_WRITE(watch, ((i<<2) - 1));
167 QIXIS_WRITE(rcfg_ctl, rcfg);
168 return 0;
169 }
170 }
171 }
172
173#ifdef DEBUG
174 else if (strcmp(argv[1], "dump") == 0) {
175 qixis_dump_regs();
176 return 0;
177 }
178#endif
179
180 else {
181 printf("Invalid option: %s\n", argv[1]);
182 return 1;
183 }
184
185 return 0;
186}
187
188U_BOOT_CMD(
189 qixis_reset, CONFIG_SYS_MAXARGS, 1, qixis_reset_cmd,
190 "Reset the board using the FPGA sequencer",
191 "- hard reset to default bank\n"
192 "qixis_reset altbank - reset to alternate bank\n"
193 "qixis watchdog <watchdog_period> - set the watchdog period\n"
194 " period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n"
195#ifdef DEBUG
196 "qixis_reset dump - display the QIXIS registers\n"
197#endif
198 );
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