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0332990b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Rob Taylor, Flying Pig Systems. [email protected]. | |
4 | * | |
8564acf9 WD |
5 | * Modified during 2003 by |
6 | * Ken Chou, [email protected] | |
7 | * | |
0332990b WD |
8 | * See file CREDITS for list of people who contributed to this |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <common.h> | |
28 | #include <mpc824x.h> | |
29 | #include <pci.h> | |
30 | ||
31 | int checkboard (void) | |
32 | { | |
33 | ulong busfreq = get_bus_freq(0); | |
34 | char buf[32]; | |
35 | ||
36 | printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq)); | |
37 | return 0; | |
38 | ||
39 | } | |
40 | ||
41 | long int initdram (int board_type) | |
42 | { | |
43 | int i, cnt; | |
44 | volatile uchar * base= CFG_SDRAM_BASE; | |
45 | volatile ulong * addr; | |
46 | ulong save[32]; | |
47 | ulong val, ret = 0; | |
48 | ||
49 | for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) { | |
50 | addr = (volatile ulong *)base + cnt; | |
51 | save[i++] = *addr; | |
52 | *addr = ~cnt; | |
53 | } | |
54 | ||
55 | addr = (volatile ulong *)base; | |
56 | save[i] = *addr; | |
57 | *addr = 0; | |
58 | ||
59 | if (*addr != 0) { | |
60 | *addr = save[i]; | |
61 | goto Done; | |
62 | } | |
63 | ||
64 | for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) { | |
65 | addr = (volatile ulong *)base + cnt; | |
66 | val = *addr; | |
67 | *addr = save[--i]; | |
68 | if (val != ~cnt) { | |
69 | ulong new_bank0_end = cnt * sizeof(long) - 1; | |
70 | ulong mear1 = mpc824x_mpc107_getreg(MEAR1); | |
71 | ulong emear1 = mpc824x_mpc107_getreg(EMEAR1); | |
72 | mear1 = (mear1 & 0xFFFFFF00) | | |
73 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT); | |
74 | emear1 = (emear1 & 0xFFFFFF00) | | |
75 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT); | |
76 | mpc824x_mpc107_setreg(MEAR1, mear1); | |
77 | mpc824x_mpc107_setreg(EMEAR1, emear1); | |
78 | ||
79 | ret = cnt * sizeof(long); | |
80 | goto Done; | |
81 | } | |
82 | } | |
83 | ||
84 | ret = CFG_MAX_RAM_SIZE; | |
85 | Done: | |
86 | return ret; | |
87 | } | |
88 | ||
89 | /* | |
90 | * Initialize PCI Devices | |
91 | */ | |
0332990b WD |
92 | #ifndef CONFIG_PCI_PNP |
93 | static struct pci_config_table pci_a3000_config_table[] = { | |
945af8d7 WD |
94 | /* vendor, device, class */ |
95 | /* bus, dev, func */ | |
8564acf9 | 96 | { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID, |
945af8d7 | 97 | PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, /* dp83815 eth0 divice */ |
0332990b WD |
98 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
99 | PCI_ENET0_MEMADDR, | |
100 | PCI_COMMAND_IO | | |
101 | PCI_COMMAND_MEMORY | | |
102 | PCI_COMMAND_MASTER }}, | |
103 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | |
945af8d7 | 104 | PCI_ANY_ID, 0x14, PCI_ANY_ID, /* PCI slot1 */ |
0332990b WD |
105 | pci_cfgfunc_config_device, { PCI_ENET1_IOADDR, |
106 | PCI_ENET1_MEMADDR, | |
107 | PCI_COMMAND_IO | | |
108 | PCI_COMMAND_MEMORY | | |
109 | PCI_COMMAND_MASTER }}, | |
110 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | |
945af8d7 | 111 | PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */ |
0332990b WD |
112 | pci_cfgfunc_config_device, { PCI_ENET2_IOADDR, |
113 | PCI_ENET2_MEMADDR, | |
114 | PCI_COMMAND_IO | | |
115 | PCI_COMMAND_MEMORY | | |
116 | PCI_COMMAND_MASTER }}, | |
8564acf9 | 117 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
945af8d7 | 118 | PCI_ANY_ID, 0x16, PCI_ANY_ID, /* PCI slot3 */ |
8564acf9 WD |
119 | pci_cfgfunc_config_device, { PCI_ENET3_IOADDR, |
120 | PCI_ENET3_MEMADDR, | |
121 | PCI_COMMAND_IO | | |
122 | PCI_COMMAND_MEMORY | | |
123 | PCI_COMMAND_MASTER }}, | |
0332990b WD |
124 | { } |
125 | }; | |
126 | #endif | |
127 | ||
0332990b WD |
128 | struct pci_controller hose = { |
129 | #ifndef CONFIG_PCI_PNP | |
130 | config_table: pci_a3000_config_table, | |
131 | #endif | |
132 | }; | |
133 | ||
134 | void pci_init_board(void) | |
135 | { | |
136 | pci_mpc824x_init(&hose); | |
137 | } |