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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1aa7e23e SG |
2 | /* |
3 | * Copyright (c) 2011 The Chromium OS Authors. | |
4 | * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com> | |
1aa7e23e SG |
5 | */ |
6 | ||
7 | #include <common.h> | |
f7ae49fc | 8 | #include <log.h> |
1aa7e23e SG |
9 | #include <tps6586x.h> |
10 | #include <asm/io.h> | |
11 | #include <i2c.h> | |
c05ed00a | 12 | #include <linux/delay.h> |
1aa7e23e | 13 | |
b0e6ef46 | 14 | static struct udevice *tps6586x_dev; |
1aa7e23e SG |
15 | |
16 | enum { | |
17 | /* Registers that we access */ | |
18 | SUPPLY_CONTROL1 = 0x20, | |
19 | SUPPLY_CONTROL2, | |
20 | SM1_VOLTAGE_V1 = 0x23, | |
21 | SM1_VOLTAGE_V2, | |
22 | SM0_VOLTAGE_V1 = 0x26, | |
23 | SM0_VOLTAGE_V2, | |
24 | PFM_MODE = 0x47, | |
25 | ||
26 | /* Bits in the supply control registers */ | |
27 | CTRL_SM1_RAMP = 0x01, | |
28 | CTRL_SM1_SUPPLY2 = 0x02, | |
29 | CTRL_SM0_RAMP = 0x04, | |
30 | CTRL_SM0_SUPPLY2 = 0x08, | |
31 | }; | |
32 | ||
33 | #define MAX_I2C_RETRY 3 | |
bafd67d3 | 34 | static int tps6586x_read(int reg) |
1aa7e23e SG |
35 | { |
36 | int i; | |
37 | uchar data; | |
38 | int retval = -1; | |
1aa7e23e SG |
39 | |
40 | for (i = 0; i < MAX_I2C_RETRY; ++i) { | |
f9a4c2da | 41 | if (!dm_i2c_read(tps6586x_dev, reg, &data, 1)) { |
1aa7e23e SG |
42 | retval = (int)data; |
43 | goto exit; | |
44 | } | |
45 | ||
46 | /* i2c access failed, retry */ | |
47 | udelay(100); | |
48 | } | |
49 | ||
50 | exit: | |
1aa7e23e SG |
51 | debug("pmu_read %x=%x\n", reg, retval); |
52 | if (retval < 0) | |
53 | debug("%s: failed to read register %#x: %d\n", __func__, reg, | |
54 | retval); | |
55 | return retval; | |
56 | } | |
57 | ||
bafd67d3 | 58 | static int tps6586x_write(int reg, uchar *data, uint len) |
1aa7e23e SG |
59 | { |
60 | int i; | |
61 | int retval = -1; | |
1aa7e23e SG |
62 | |
63 | for (i = 0; i < MAX_I2C_RETRY; ++i) { | |
f9a4c2da | 64 | if (!dm_i2c_write(tps6586x_dev, reg, data, len)) { |
1aa7e23e SG |
65 | retval = 0; |
66 | goto exit; | |
67 | } | |
68 | ||
69 | /* i2c access failed, retry */ | |
70 | udelay(100); | |
71 | } | |
72 | ||
73 | exit: | |
1aa7e23e SG |
74 | debug("pmu_write %x=%x: ", reg, retval); |
75 | for (i = 0; i < len; i++) | |
76 | debug("%x ", data[i]); | |
77 | if (retval) | |
78 | debug("%s: failed to write register %#x\n", __func__, reg); | |
79 | return retval; | |
80 | } | |
81 | ||
82 | /* | |
83 | * Get current voltage of SM0 and SM1 | |
84 | * | |
85 | * @param sm0 Place to put SM0 voltage | |
86 | * @param sm1 Place to put SM1 voltage | |
185f812c | 87 | * Return: 0 if ok, -1 on error |
1aa7e23e SG |
88 | */ |
89 | static int read_voltages(int *sm0, int *sm1) | |
90 | { | |
91 | int ctrl1, ctrl2; | |
92 | int is_v2; | |
93 | ||
94 | /* | |
95 | * Each vdd has two supply sources, ie, v1 and v2. | |
96 | * The supply control reg1 and reg2 determine the current selection. | |
97 | */ | |
98 | ctrl1 = tps6586x_read(SUPPLY_CONTROL1); | |
99 | ctrl2 = tps6586x_read(SUPPLY_CONTROL2); | |
100 | if (ctrl1 == -1 || ctrl2 == -1) | |
505cf475 | 101 | return -ENOTSUPP; |
1aa7e23e SG |
102 | |
103 | /* Figure out whether V1 or V2 is selected */ | |
104 | is_v2 = (ctrl1 | ctrl2) & CTRL_SM0_SUPPLY2; | |
105 | *sm0 = tps6586x_read(is_v2 ? SM0_VOLTAGE_V2 : SM0_VOLTAGE_V1); | |
106 | *sm1 = tps6586x_read(is_v2 ? SM1_VOLTAGE_V2 : SM1_VOLTAGE_V1); | |
107 | if (*sm0 == -1 || *sm1 == -1) | |
505cf475 | 108 | return -ENOTSUPP; |
1aa7e23e SG |
109 | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static int set_voltage(int reg, int data, int rate) | |
114 | { | |
115 | uchar control_bit; | |
116 | uchar buff[3]; | |
117 | ||
118 | control_bit = (reg == SM0_VOLTAGE_V1 ? CTRL_SM0_RAMP : CTRL_SM1_RAMP); | |
119 | ||
120 | /* | |
121 | * Only one supply is needed in u-boot. set both v1 and v2 to | |
122 | * same value. | |
123 | * | |
124 | * When both v1 and v2 are set to same value, we just need to set | |
125 | * control1 reg to trigger the supply selection. | |
126 | */ | |
127 | buff[0] = buff[1] = (uchar)data; | |
128 | buff[2] = rate; | |
129 | ||
130 | /* write v1, v2 and rate, then trigger */ | |
131 | if (tps6586x_write(reg, buff, 3) || | |
132 | tps6586x_write(SUPPLY_CONTROL1, &control_bit, 1)) | |
505cf475 | 133 | return -ENOTSUPP; |
1aa7e23e SG |
134 | |
135 | return 0; | |
136 | } | |
137 | ||
138 | static int calculate_next_voltage(int voltage, int target, int step) | |
139 | { | |
140 | int diff = voltage < target ? step : -step; | |
141 | ||
142 | if (abs(target - voltage) > step) | |
143 | voltage += diff; | |
144 | else | |
145 | voltage = target; | |
146 | ||
147 | return voltage; | |
148 | } | |
149 | ||
150 | int tps6586x_set_pwm_mode(int mask) | |
151 | { | |
152 | uchar val; | |
153 | int ret; | |
154 | ||
b0e6ef46 | 155 | assert(tps6586x_dev); |
1aa7e23e SG |
156 | ret = tps6586x_read(PFM_MODE); |
157 | if (ret != -1) { | |
158 | val = (uchar)ret; | |
159 | val |= mask; | |
160 | ||
161 | ret = tps6586x_write(PFM_MODE, &val, 1); | |
162 | } | |
163 | ||
164 | if (ret == -1) | |
165 | debug("%s: Failed to read/write PWM mode reg\n", __func__); | |
166 | ||
167 | return ret; | |
168 | } | |
169 | ||
170 | int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, | |
171 | int min_sm0_over_sm1) | |
172 | { | |
173 | int sm0, sm1; | |
174 | int bad; | |
175 | ||
b0e6ef46 | 176 | assert(tps6586x_dev); |
1aa7e23e SG |
177 | |
178 | /* get current voltage settings */ | |
179 | if (read_voltages(&sm0, &sm1)) { | |
180 | debug("%s: Cannot read voltage settings\n", __func__); | |
505cf475 | 181 | return -EINVAL; |
1aa7e23e SG |
182 | } |
183 | ||
184 | /* | |
185 | * if vdd_core < vdd_cpu + rel | |
186 | * skip | |
187 | * | |
188 | * This condition may happen when system reboots due to kernel crash. | |
189 | */ | |
190 | if (min_sm0_over_sm1 != -1 && sm0 < sm1 + min_sm0_over_sm1) { | |
191 | debug("%s: SM0 is %d, SM1 is %d, but min_sm0_over_sm1 is %d\n", | |
192 | __func__, sm0, sm1, min_sm0_over_sm1); | |
505cf475 | 193 | return -EINVAL; |
1aa7e23e SG |
194 | } |
195 | ||
196 | /* | |
197 | * Since vdd_core and vdd_cpu may both stand at either greater or less | |
198 | * than their nominal voltage, the adjustment may go either directions. | |
199 | * | |
200 | * Make sure vdd_core is always higher than vdd_cpu with certain margin. | |
201 | * So, find out which vdd to adjust first in each step. | |
202 | * | |
203 | * case 1: both sm0 and sm1 need to move up | |
204 | * adjust sm0 before sm1 | |
205 | * | |
206 | * case 2: both sm0 and sm1 need to move down | |
207 | * adjust sm1 before sm0 | |
208 | * | |
209 | * case 3: sm0 moves down and sm1 moves up | |
210 | * adjusting either one first is fine. | |
211 | * | |
212 | * Adjust vdd_core and vdd_cpu one step at a time until they reach | |
213 | * their nominal values. | |
214 | */ | |
215 | bad = 0; | |
216 | while (!bad && (sm0 != sm0_target || sm1 != sm1_target)) { | |
217 | int adjust_sm0_late = 0; /* flag to adjust vdd_core later */ | |
218 | ||
219 | debug("%d-%d %d-%d ", sm0, sm0_target, sm1, sm1_target); | |
220 | ||
221 | if (sm0 != sm0_target) { | |
222 | /* | |
223 | * if case 1 and case 3, set new sm0 first. | |
224 | * otherwise, hold down until new sm1 is set. | |
225 | */ | |
226 | sm0 = calculate_next_voltage(sm0, sm0_target, step); | |
227 | if (sm1 < sm1_target) | |
228 | bad |= set_voltage(SM0_VOLTAGE_V1, sm0, rate); | |
229 | else | |
230 | adjust_sm0_late = 1; | |
231 | } | |
232 | ||
233 | if (sm1 != sm1_target) { | |
234 | sm1 = calculate_next_voltage(sm1, sm1_target, step); | |
235 | bad |= set_voltage(SM1_VOLTAGE_V1, sm1, rate); | |
236 | } | |
237 | ||
238 | if (adjust_sm0_late) | |
239 | bad |= set_voltage(SM0_VOLTAGE_V1, sm0, rate); | |
240 | debug("%d\n", adjust_sm0_late); | |
241 | } | |
242 | debug("%d-%d %d-%d done\n", sm0, sm0_target, sm1, sm1_target); | |
243 | ||
505cf475 | 244 | return bad ? -EINVAL : 0; |
1aa7e23e SG |
245 | } |
246 | ||
b0e6ef46 | 247 | int tps6586x_init(struct udevice *dev) |
1aa7e23e | 248 | { |
b0e6ef46 | 249 | tps6586x_dev = dev; |
1aa7e23e SG |
250 | |
251 | return 0; | |
252 | } |