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42d1f039 WD |
1 | /* |
2 | * Copyright 2003 Motorola,Inc. | |
3 | * Xianghua Xiao([email protected]) | |
4 | */ | |
5 | ||
6 | #ifndef __E500_H__ | |
7 | #define __E500_H__ | |
8 | ||
9 | #ifndef __ASSEMBLY__ | |
10 | ||
11 | typedef struct | |
12 | { | |
997399fa | 13 | unsigned long freq_processor[CONFIG_MAX_CPUS]; |
b8bf0adc SL |
14 | #ifdef CONFIG_HETROGENOUS_CLUSTERS |
15 | unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS]; | |
16 | #endif | |
997399fa PK |
17 | unsigned long freq_systembus; |
18 | unsigned long freq_ddrbus; | |
19 | unsigned long freq_localbus; | |
20 | unsigned long freq_qe; | |
39aaca1f | 21 | #ifdef CONFIG_SYS_DPAA_FMAN |
997399fa | 22 | unsigned long freq_fman[CONFIG_SYS_NUM_FMAN]; |
39aaca1f | 23 | #endif |
990e1a8c | 24 | #ifdef CONFIG_SYS_DPAA_QBMAN |
997399fa | 25 | unsigned long freq_qman; |
990e1a8c | 26 | #endif |
39aaca1f | 27 | #ifdef CONFIG_SYS_DPAA_PME |
997399fa | 28 | unsigned long freq_pme; |
39aaca1f | 29 | #endif |
b8bf0adc SL |
30 | #ifdef CONFIG_SYS_CPRI |
31 | unsigned long freq_cpri; | |
32 | #endif | |
33 | #ifdef CONFIG_SYS_MAPLE | |
34 | unsigned long freq_maple; | |
35 | unsigned long freq_maple_ulb; | |
36 | unsigned long freq_maple_etvpe; | |
37 | #endif | |
0c12a159 | 38 | #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
39 | unsigned char diff_sysclk; | |
40 | #endif | |
42d1f039 WD |
41 | } MPC85xx_SYS_INFO; |
42 | ||
43 | #endif /* _ASMLANGUAGE */ | |
44 | ||
42d1f039 | 45 | #define RESET_VECTOR 0xfffffffc |
42d1f039 WD |
46 | |
47 | #endif /* __E500_H__ */ |