projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 252ed872 | 1 | CONFIG_PPC=y |
| 98463903 | 2 | CONFIG_TEXT_BASE=0x11000000 |
| 9802154a | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
| c960c0fd | 4 | CONFIG_SF_DEFAULT_SPEED=10000000 |
| 052170c6 TR |
5 | CONFIG_ENV_SIZE=0x4000 |
| 6 | CONFIG_ENV_OFFSET=0x100000 | |
| 2bba7807 | 7 | CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" |
| c5a6e9f8 | 8 | CONFIG_SPL_TEXT_BASE=0xFF800000 |
| c90e1893 | 9 | CONFIG_SYS_MONITOR_LEN=786432 |
| 2a736066 | 10 | CONFIG_SPL_SERIAL=y |
| c0f47562 | 11 | CONFIG_TPL_TEXT_BASE=0xF8F80000 |
| 2681e78a TR |
12 | CONFIG_TPL_LIBCOMMON_SUPPORT=y |
| 13 | CONFIG_TPL_LIBGENERIC_SUPPORT=y | |
| 22bfaa1f | 14 | CONFIG_TPL_SERIAL=y |
| c9542eae | 15 | CONFIG_SPL=y |
| 0fc5c499 | 16 | CONFIG_TPL_MAX_SIZE=0x20000 |
| 252ed872 | 17 | CONFIG_MPC85xx=y |
| d3d0b5bb | 18 | CONFIG_SYS_INIT_RAM_LOCK=y |
| 230ecd71 | 19 | # CONFIG_CMD_ERRATA is not set |
| aa14620c | 20 | CONFIG_TARGET_P1020RDB_PC=y |
| 960379d4 | 21 | CONFIG_L2_CACHE=y |
| fbc3621f | 22 | CONFIG_ENABLE_36BIT_PHYS=y |
| de47ff53 TR |
23 | CONFIG_SYS_MPC85XX_NO_RESETVEC=y |
| 24 | CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y | |
| 54f80dd2 | 25 | CONFIG_USE_UBOOTPATH=y |
| 3dc2987f TR |
26 | CONFIG_PCIE1=y |
| 27 | CONFIG_PCIE2=y | |
| bb6b142f | 28 | CONFIG_PHYS_64BIT=y |
| 54c5c2b8 | 29 | CONFIG_MP=y |
| 73223f0e SG |
30 | CONFIG_FIT=y |
| 31 | CONFIG_FIT_VERBOSE=y | |
| 32 | CONFIG_OF_BOARD_SETUP=y | |
| 33 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| c0f47562 | 34 | CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000 |
| bb597c0e | 35 | CONFIG_BOOTDELAY=10 |
| 970bf860 TR |
36 | CONFIG_USE_BOOTCOMMAND=y |
| 37 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" | |
| a5d67547 | 38 | CONFIG_BOARD_EARLY_INIT_F=y |
| 02ddc147 | 39 | CONFIG_BOARD_EARLY_INIT_R=y |
| 0817daa7 | 40 | # CONFIG_MISC_INIT_R is not set |
| 75670c81 | 41 | # CONFIG_SPL_FRAMEWORK is not set |
| ca8a329a | 42 | CONFIG_SPL_MAX_SIZE=0x1000 |
| db4080d5 | 43 | CONFIG_SPL_NAND_BOOT=y |
| 6074a536 | 44 | CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y |
| b35316fb TR |
45 | CONFIG_SPL_INIT_MINIMAL=y |
| 46 | CONFIG_SPL_FLUSH_IMAGE=y | |
| 55cf860b TR |
47 | CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000 |
| 48 | CONFIG_SPL_RELOC_STACK=0xf8fbfff0 | |
| 7f2c91e5 | 49 | CONFIG_TPL_GD_ADDR=0xf8fac000 |
| c0f47562 | 50 | CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000 |
| 55cf860b TR |
51 | CONFIG_TPL_RELOC_STACK=0xf8fb0000 |
| 52 | CONFIG_TPL_RELOC_MALLOC=y | |
| 53 | CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 | |
| 54 | CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 | |
| 358b6a20 | 55 | CONFIG_SPL_NAND_SUPPORT=y |
| c2ae7d82 | 56 | CONFIG_TPL=y |
| 256fe86b | 57 | CONFIG_TPL_ENV_SUPPORT=y |
| 975e7cf3 | 58 | CONFIG_TPL_I2C=y |
| 6f004ada | 59 | CONFIG_TPL_MPC8XXX_INIT_DDR=y |
| b65236ae | 60 | CONFIG_TPL_NAND_SUPPORT=y |
| adad96e6 | 61 | CONFIG_HUSH_PARSER=y |
| d021e942 | 62 | # CONFIG_AUTO_COMPLETE is not set |
| d0ee7f29 | 63 | CONFIG_SYS_PBSIZE=276 |
| ad12dc18 | 64 | CONFIG_CMD_IMLS=y |
| 88cd7d0e TR |
65 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
| 66 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
| 88663126 | 67 | CONFIG_CMD_I2C=y |
| 2c8d04dd TR |
68 | CONFIG_LOADS_ECHO=y |
| 69 | CONFIG_SYS_LOADS_BAUD_CHANGE=y | |
| 89cb2b5f | 70 | CONFIG_CMD_MMC=y |
| 78d1e1d0 | 71 | CONFIG_CMD_USB=y |
| 89cb2b5f | 72 | CONFIG_CMD_MII=y |
| 78d1e1d0 | 73 | CONFIG_CMD_PING=y |
| 551c3934 | 74 | # CONFIG_CMD_HASH is not set |
| 89cb2b5f TR |
75 | CONFIG_CMD_EXT2=y |
| 76 | CONFIG_CMD_FAT=y | |
| ec70cedb | 77 | CONFIG_OF_CONTROL=y |
| e91907a1 | 78 | CONFIG_ENV_OVERWRITE=y |
| 5dc4dfd2 | 79 | CONFIG_ENV_IS_IN_NAND=y |
| 5d7dea14 | 80 | CONFIG_ENV_RANGE=0xc000 |
| 8d8ee47e | 81 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| fdfb17b1 TR |
82 | CONFIG_USE_BOOTFILE=y |
| 83 | CONFIG_BOOTFILE="uImage" | |
| 0e14cdfa TR |
84 | CONFIG_USE_ETHPRIME=y |
| 85 | CONFIG_ETHPRIME="eTSEC1" | |
| 54f80dd2 TR |
86 | CONFIG_USE_HOSTNAME=y |
| 87 | CONFIG_USE_ROOTPATH=y | |
| aca1f678 | 88 | CONFIG_LBA48=y |
| efb5dab7 | 89 | CONFIG_DDR_CLK_FREQ=66666666 |
| bca4509d | 90 | CONFIG_SYS_SPD_BUS_NUM=1 |
| f9147d63 | 91 | CONFIG_CHIP_SELECTS_PER_CTRL=1 |
| c24e8e2b | 92 | CONFIG_SYS_DDR_RAW_TIMING=y |
| c7fad78e TR |
93 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
| 94 | CONFIG_SYS_BR0_PRELIM=0xFF800C21 | |
| 95 | CONFIG_SYS_OR0_PRELIM=0xFFFF8396 | |
| 96 | CONFIG_SYS_BR1_PRELIM_BOOL=y | |
| 97 | CONFIG_SYS_BR1_PRELIM=0xEF001001 | |
| 98 | CONFIG_SYS_OR1_PRELIM=0xFC000FF7 | |
| 99 | CONFIG_SYS_BR2_PRELIM_BOOL=y | |
| 100 | CONFIG_SYS_BR2_PRELIM=0xFFB00801 | |
| 101 | CONFIG_SYS_OR2_PRELIM=0xFFFE09FF | |
| 102 | CONFIG_SYS_BR3_PRELIM_BOOL=y | |
| 103 | CONFIG_SYS_BR3_PRELIM=0xFFA00801 | |
| 104 | CONFIG_SYS_OR3_PRELIM=0xFFF009F7 | |
| 90f0819a | 105 | CONFIG_TPL_COMMON_INIT_DDR=y |
| b11dc33e | 106 | CONFIG_DM_I2C=y |
| 55dabcc8 TR |
107 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| 108 | CONFIG_TPL_SYS_I2C_LEGACY=y | |
| fc8d3b9a | 109 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
| 6d5d0c95 TR |
110 | CONFIG_SYS_I2C_FSL=y |
| 111 | CONFIG_SYS_FSL_I2C_OFFSET=0x3000 | |
| 112 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | |
| 113 | CONFIG_SYS_FSL_I2C2_OFFSET=0x3100 | |
| 88cd7d0e | 114 | CONFIG_SYS_I2C_EEPROM_ADDR=0x52 |
| 07dea2e7 | 115 | CONFIG_FSL_ESDHC=y |
| 0cfccb54 | 116 | CONFIG_MTD=y |
| e856bdcf | 117 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
118 | CONFIG_FLASH_CFI_DRIVER=y |
| 119 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| b72713dc | 120 | CONFIG_SYS_FLASH_EMPTY_INFO=y |
| 2fe88d45 | 121 | CONFIG_SYS_FLASH_CFI=y |
| 1107dad8 | 122 | CONFIG_SYS_FLASH_QUIET_TEST=y |
| 1db251bd | 123 | CONFIG_SYS_MAX_FLASH_SECT=128 |
| 88718be3 | 124 | CONFIG_MTD_RAW_NAND=y |
| 53f06134 | 125 | CONFIG_NAND_FSL_ELBC=y |
| a0de0753 | 126 | CONFIG_SYS_NAND_BLOCK_SIZE=0x4000 |
| 9ec4df33 TR |
127 | CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y |
| 128 | CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 | |
| b24550ac | 129 | CONFIG_DM_SPI_FLASH=y |
| 68d53420 | 130 | CONFIG_SPI_FLASH_SPANSION=y |
| 306881a0 TR |
131 | CONFIG_PHY_ATHEROS=y |
| 132 | CONFIG_PHY_BROADCOM=y | |
| 133 | CONFIG_PHY_DAVICOM=y | |
| 134 | CONFIG_PHY_LXT=y | |
| a8ca5c8a | 135 | CONFIG_PHY_MARVELL=y |
| 306881a0 TR |
136 | CONFIG_PHY_NATSEMI=y |
| 137 | CONFIG_PHY_REALTEK=y | |
| 138 | CONFIG_PHY_SMSC=y | |
| 139 | CONFIG_PHY_VITESSE=y | |
| b24550ac | 140 | CONFIG_PHY_FIXED=y |
| b24550ac | 141 | CONFIG_DM_MDIO=y |
| 1989374b | 142 | CONFIG_PHY_GIGE=y |
| a77fda1f | 143 | CONFIG_E1000=y |
| 665c35a7 | 144 | CONFIG_MII=y |
| be3bea2b | 145 | CONFIG_VSC7385_ENET=y |
| 665c35a7 | 146 | CONFIG_TSEC_ENET=y |
| 2bc49ecb | 147 | CONFIG_PCIE_FSL=y |
| b11dc33e | 148 | CONFIG_DM_RTC=y |
| ea467ea1 | 149 | CONFIG_RTC_PT7C4338=y |
| 9591b635 TR |
150 | CONFIG_SYS_NS16550_SERIAL=y |
| 151 | CONFIG_SPL_NS16550_MIN_FUNCTIONS=y | |
| f1b1f770 | 152 | CONFIG_SPI=y |
| b24550ac | 153 | CONFIG_DM_SPI=y |
| e5d5d447 | 154 | CONFIG_FSL_ESPI=y |
| 645176d1 | 155 | CONFIG_USB=y |
| f76750d1 | 156 | CONFIG_USB_EHCI_FSL=y |
| 3371edda | 157 | CONFIG_USB_MAX_CONTROLLER_COUNT=2 |
| b24550ac | 158 | CONFIG_USB_STORAGE=y |
| 69be8fd1 | 159 | CONFIG_ADDR_MAP=y |