[J-u-boot.git] / include / configs / otc570.h

/*
 * (C) Copyright 2010-2011
 * Daniel Gorsulowski <[email protected]>
 * esd electronic system design gmbh <www.esd.eu>
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <[email protected]>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the esd OTC570 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>

/*
 * Warning: changing CONFIG_SYS_TEXT_BASE requires
 * adapting the initial boot program.
 * Since the linker has to swallow that define, we must use a pure
 * hex number here!
 */
#define CONFIG_SYS_TEXT_BASE		0x20002000

/*
 * since a number of boards are not being listed in linux
 * arch/arm/tools/mach-types any more, the mach-types have to be
 * defined here
 */
#define MACH_TYPE_OTC570		2166

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* 32.768 kHz crystal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */

/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOARD_EARLY_INIT_F		/* call board_early_init_f() */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_MISC_INIT_R			/* Call misc_init_r */

#define CONFIG_DISPLAY_BOARDINFO		/* call checkboard() */
#define CONFIG_DISPLAY_CPUINFO			/* display cpu info and speed */
#define CONFIG_PREBOOT				/* enable preboot variable */

/*
 * Hardware drivers
 */

/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP

/* general purpose I/O */
#define CONFIG_AT91_GPIO

/* Console output */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK

/* LCD */
#define CONFIG_LCD
#undef CONFIG_SPLASH_SCREEN

#ifdef CONFIG_LCD
# define LCD_BPP			LCD_COLOR8

# ifndef CONFIG_SPLASH_SCREEN
#  define CONFIG_LCD_LOGO
#  define CONFIG_LCD_INFO
#  undef CONFIG_LCD_INFO_BELOW_LOGO
# endif /* CONFIG_SPLASH_SCREEN */

# undef LCD_TEST_PATTERN
# define CONFIG_SYS_WHITE_ON_BLACK
# define CONFIG_ATMEL_LCD
# define CONFIG_SYS_CONSOLE_IS_IN_ENV
# define CONFIG_OTC570_LCD_BASE		(CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
# define CONFIG_CMD_BMP
#endif /* CONFIG_LCD */

/* RTC and I2C stuff */
#define CONFIG_RTC_DS1338
#define CONFIG_SYS_I2C_RTC_ADDR		0x68

#define CONFIG_SYS_I2C
#define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
#ifdef CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	100000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F

/* Configure data and clock pins for pio */
# define I2C_INIT { \
	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
}
# define I2C_SOFT_DECLARATIONS
/* Configure data pin as output */
# define I2C_ACTIVE		at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
/* Configure data pin as input */
# define I2C_TRISTATE		at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
/* Read data pin */
# define I2C_READ		at91_get_pio_value(AT91_PIO_PORTB, 4)
/* Set data pin */
# define I2C_SDA(bit)		at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
/* Set clock pin */
# define I2C_SCL(bit)		at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
# define I2C_DELAY		udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SYS_I2C_SOFT */

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NAND
#define CONFIG_CMD_USB
#define CONFIG_CMD_I2C
#define CONFIG_CMD_DATE

/* LED */
#define CONFIG_AT91_LED

/*
 * SDRAM: 1 bank, min 32, max 128 MB
 * Initialized before u-boot gets started.
 */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000 /* ATMEL_BASE_CS1 */
#define CONFIG_SYS_SDRAM_SIZE		0x04000000

#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01E00000)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x00100000)

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
# define AT91_SPI_CLK				15000000
# define DATAFLASH_TCSS				(0x1a << 16)
# define DATAFLASH_TCHS				(0x1 << 24)
#endif

/* NOR flash is not populated, disable it */
#define CONFIG_SYS_NO_FLASH

/* NAND flash */
#ifdef CONFIG_CMD_NAND
# define CONFIG_NAND_ATMEL
# define CONFIG_SYS_MAX_NAND_DEVICE		1
# define CONFIG_SYS_NAND_BASE			0x40000000 /* ATMEL_BASE_CS3 */
# define CONFIG_SYS_NAND_DBW_8
# define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
# define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
# define CONFIG_SYS_NAND_ENABLE_PIN		GPIO_PIN_PD(15)
# define CONFIG_SYS_NAND_READY_PIN		GPIO_PIN_PA(22)
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_FIT
#define CONFIG_NET_RETRY_COUNT			20
#undef CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_FAT

/* CAN */
#define CONFIG_AT91_CAN

/* hw-controller addresses */
#define CONFIG_ET1100_BASE		0x70000000 /* ATMEL_BASE_CS6 */

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env in dataflash on CS0 */
# define CONFIG_ENV_IS_IN_DATAFLASH
# define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					0x8400)
# define CONFIG_ENV_OFFSET		0x4200
# define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					CONFIG_ENV_OFFSET)
# define CONFIG_ENV_SIZE		0x4200

#elif CONFIG_SYS_USE_NANDFLASH

/* bootstrap + u-boot + env + linux in nandflash */
# define CONFIG_ENV_IS_IN_NAND		1
# define CONFIG_ENV_OFFSET		0xC0000
# define CONFIG_ENV_SIZE		0x20000

#endif

#define CONFIG_SYS_CBSIZE		512
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + \
					128*1024, 0x1000)

#endif
Commit	Line	Data
44d80256	1	/*
a950c818	2	* (C) Copyright 2010-2011
44d80256 DG	3	* Daniel Gorsulowski <[email protected]>
	4	* esd electronic system design gmbh <www.esd.eu>
	5	*
	6	* (C) Copyright 2007-2008
c9e798d3	7	* Stelian Pop <[email protected]>
44d80256 DG	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
	10	* Configuation settings for the esd OTC570 board.
	11	*
1a459660	12	* SPDX-License-Identifier: GPL-2.0+
44d80256 DG	13	*/
	14
	15	#ifndef __CONFIG_H
	16	#define __CONFIG_H
	17
a950c818 DG	18	/*
	19	* SoC must be defined first, before hardware.h is included.
	20	* In this case SoC is defined in boards.cfg.
	21	*/
	22	#include <asm/hardware.h>
	23
	24	/*
	25	* Warning: changing CONFIG_SYS_TEXT_BASE requires
	26	* adapting the initial boot program.
	27	* Since the linker has to swallow that define, we must use a pure
	28	* hex number here!
	29	*/
	30	#define CONFIG_SYS_TEXT_BASE 0x20002000
	31
b2f2648d DG	32	/*
	33	* since a number of boards are not being listed in linux
	34	* arch/arm/tools/mach-types any more, the mach-types have to be
	35	* defined here
	36	*/
	37	#define MACH_TYPE_OTC570 2166
	38
a950c818 DG	39	/* ARM asynchronous clock */
a950c818 DG	40	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
9f07dede	41	#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
44d80256	42
a950c818	43	/* Misc CPU related */
44d80256	44	#define CONFIG_SKIP_LOWLEVEL_INIT
44d80256	45	#define CONFIG_ARCH_CPU_INIT
a950c818 DG	46	#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
	47	#define CONFIG_SETUP_MEMORY_TAGS
	48	#define CONFIG_INITRD_TAG
	49	#define CONFIG_SERIAL_TAG
	50	#define CONFIG_REVISION_TAG
	51	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	52	#define CONFIG_MISC_INIT_R /* Call misc_init_r */
a950c818 DG	53
	54	#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
	55	#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
	56	#define CONFIG_PREBOOT /* enable preboot variable */
44d80256 DG	57
	58	/*
	59	* Hardware drivers
	60	*/
a950c818 DG	61
	62	/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
	63	#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
	64
	65	/* general purpose I/O */
	66	#define CONFIG_AT91_GPIO
44d80256 DG	67
44d80256 DG	68	/* Console output */
a950c818 DG	69	#define CONFIG_ATMEL_USART
	70	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	71	#define CONFIG_USART_ID ATMEL_ID_SYS
	72	#define CONFIG_BAUDRATE 115200
44d80256 DG	73
44d80256 DG	74	#define CONFIG_BOOTDELAY 3
a950c818	75	#define CONFIG_ZERO_BOOTDELAY_CHECK
44d80256 DG	76
44d80256 DG	77	/* LCD */
a950c818	78	#define CONFIG_LCD
44d80256 DG	79	#undef CONFIG_SPLASH_SCREEN
44d80256 DG	80
a950c818 DG	81	#ifdef CONFIG_LCD
	82	# define LCD_BPP LCD_COLOR8
	83
	84	# ifndef CONFIG_SPLASH_SCREEN
	85	# define CONFIG_LCD_LOGO
	86	# define CONFIG_LCD_INFO
	87	# undef CONFIG_LCD_INFO_BELOW_LOGO
	88	# endif /* CONFIG_SPLASH_SCREEN */
44d80256	89
a950c818 DG	90	# undef LCD_TEST_PATTERN
	91	# define CONFIG_SYS_WHITE_ON_BLACK
	92	# define CONFIG_ATMEL_LCD
	93	# define CONFIG_SYS_CONSOLE_IS_IN_ENV
	94	# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
	95	# define CONFIG_CMD_BMP
	96	#endif /* CONFIG_LCD */
44d80256 DG	97
44d80256 DG	98	/* RTC and I2C stuff */
a950c818	99	#define CONFIG_RTC_DS1338
44d80256	100	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
ea818dbb HS	101
	102	#define CONFIG_SYS_I2C
	103	#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
	104	#ifdef CONFIG_SYS_I2C_SOFT
	105	#define CONFIG_SYS_I2C_SOFT_SPEED 100000
	106	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
	107
6258b04e	108	/* Configure data and clock pins for pio */
a950c818	109	# define I2C_INIT { \
6258b04e DG	110	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
6258b04e DG	111	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
44d80256	112	}
a950c818	113	# define I2C_SOFT_DECLARATIONS
44d80256	114	/* Configure data pin as output */
a950c818	115	# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
44d80256	116	/* Configure data pin as input */
a950c818	117	# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
44d80256	118	/* Read data pin */
a950c818	119	# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
44d80256	120	/* Set data pin */
a950c818	121	# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
44d80256	122	/* Set clock pin */
a950c818 DG	123	# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
a950c818 DG	124	# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
ea818dbb	125	#endif /* CONFIG_SYS_I2C_SOFT */
44d80256	126
44d80256 DG	127	/*
	128	* BOOTP options
	129	*/
a950c818 DG	130	#define CONFIG_BOOTP_BOOTFILESIZE
	131	#define CONFIG_BOOTP_BOOTPATH
	132	#define CONFIG_BOOTP_GATEWAY
	133	#define CONFIG_BOOTP_HOSTNAME
44d80256 DG	134
	135	/*
	136	* Command line configuration.
	137	*/
	138	#include <config_cmd_default.h>
44d80256 DG	139	#undef CONFIG_CMD_FPGA
	140	#undef CONFIG_CMD_LOADS
	141	#undef CONFIG_CMD_IMLS
	142
a950c818 DG	143	#define CONFIG_CMD_PING
	144	#define CONFIG_CMD_DHCP
	145	#define CONFIG_CMD_NAND
	146	#define CONFIG_CMD_USB
	147	#define CONFIG_CMD_I2C
	148	#define CONFIG_CMD_DATE
44d80256 DG	149
44d80256 DG	150	/* LED */
a950c818	151	#define CONFIG_AT91_LED
44d80256	152
a950c818 DG	153	/*
	154	* SDRAM: 1 bank, min 32, max 128 MB
	155	* Initialized before u-boot gets started.
	156	*/
	157	#define CONFIG_NR_DRAM_BANKS 1
	158	#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
	159	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	160
	161	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
	162	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
	163	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
	164
	165	/*
	166	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	167	* leaving the correct space for initial global data structure above
	168	* that address while providing maximum stack area below.
	169	*/
	170	#define CONFIG_SYS_INIT_SP_ADDR \
	171	(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
44d80256 DG	172
44d80256 DG	173	/* DataFlash */
a950c818 DG	174	#ifdef CONFIG_SYS_USE_DATAFLASH
	175	# define CONFIG_ATMEL_DATAFLASH_SPI
	176	# define CONFIG_HAS_DATAFLASH
	177	# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	178	# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	179	# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
	180	# define AT91_SPI_CLK 15000000
	181	# define DATAFLASH_TCSS (0x1a << 16)
	182	# define DATAFLASH_TCHS (0x1 << 24)
	183	#endif
44d80256 DG	184
44d80256 DG	185	/* NOR flash is not populated, disable it */
a950c818	186	#define CONFIG_SYS_NO_FLASH
44d80256 DG	187
	188	/* NAND flash */
	189	#ifdef CONFIG_CMD_NAND
a950c818 DG	190	# define CONFIG_NAND_ATMEL
	191	# define CONFIG_SYS_MAX_NAND_DEVICE 1
	192	# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
	193	# define CONFIG_SYS_NAND_DBW_8
	194	# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	195	# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
ac45bb16 AB	196	# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
ac45bb16 AB	197	# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
44d80256 DG	198	#endif
	199
	200	/* Ethernet */
a950c818 DG	201	#define CONFIG_MACB
a950c818 DG	202	#define CONFIG_RMII
a950c818	203	#define CONFIG_FIT
44d80256 DG	204	#define CONFIG_NET_RETRY_COUNT 20
	205	#undef CONFIG_RESET_PHY_R
	206
	207	/* USB */
	208	#define CONFIG_USB_ATMEL
dcd2f1a0	209	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
a950c818 DG	210	#define CONFIG_USB_OHCI_NEW
	211	#define CONFIG_DOS_PARTITION
	212	#define CONFIG_SYS_USB_OHCI_CPU_INIT
44d80256 DG	213	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
	214	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
	215	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
a950c818 DG	216	#define CONFIG_USB_STORAGE
a950c818 DG	217	#define CONFIG_CMD_FAT
44d80256 DG	218
44d80256 DG	219	/* CAN */
a950c818	220	#define CONFIG_AT91_CAN
44d80256 DG	221
44d80256 DG	222	/* hw-controller addresses */
a950c818 DG	223	#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
	224
	225	#ifdef CONFIG_SYS_USE_DATAFLASH
44d80256 DG	226
44d80256 DG	227	/* bootstrap + u-boot + env in dataflash on CS0 */
a950c818 DG	228	# define CONFIG_ENV_IS_IN_DATAFLASH
a950c818 DG	229	# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
44d80256	230	0x8400)
a950c818 DG	231	# define CONFIG_ENV_OFFSET 0x4200
a950c818 DG	232	# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
44d80256	233	CONFIG_ENV_OFFSET)
a950c818	234	# define CONFIG_ENV_SIZE 0x4200
44d80256	235
a950c818 DG	236	#elif CONFIG_SYS_USE_NANDFLASH
	237
	238	/* bootstrap + u-boot + env + linux in nandflash */
	239	# define CONFIG_ENV_IS_IN_NAND 1
	240	# define CONFIG_ENV_OFFSET 0xC0000
	241	# define CONFIG_ENV_SIZE 0x20000
	242
	243	#endif
44d80256	244
a950c818	245	#define CONFIG_SYS_CBSIZE 512
44d80256 DG	246	#define CONFIG_SYS_MAXARGS 16
	247	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	248	sizeof(CONFIG_SYS_PROMPT) + 16)
a950c818 DG	249	#define CONFIG_SYS_LONGHELP
a950c818 DG	250	#define CONFIG_CMDLINE_EDITING
44d80256 DG	251
	252	/*
	253	* Size of malloc() pool
	254	*/
	255	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
	256	128*1024, 0x1000)
44d80256	257
44d80256	258	#endif