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62f9b654 SG |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * (C) Copyright 2000-2009 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
5 | * Copyright 2019 Google LLC | |
6 | */ | |
7 | ||
8 | #ifndef __CPU_LEGACY_H | |
9 | #define __CPU_LEGACY_H | |
10 | ||
11 | #include <linux/types.h> | |
12 | ||
13 | /* | |
14 | * Multicore arch functions | |
15 | * | |
16 | * These should be moved to use the CPU uclass. | |
17 | */ | |
18 | int cpu_status(u32 nr); | |
19 | int cpu_reset(u32 nr); | |
20 | int cpu_disable(u32 nr); | |
09140113 | 21 | int cpu_release(u32 nr, int argc, char *const argv[]); |
62f9b654 | 22 | |
30c7c434 SG |
23 | static inline int cpumask_next(int cpu, unsigned int mask) |
24 | { | |
25 | for (cpu++; !((1 << cpu) & mask); cpu++) | |
26 | ; | |
27 | ||
28 | return cpu; | |
29 | } | |
30 | ||
31 | #define for_each_cpu(iter, cpu, num_cpus, mask) \ | |
32 | for (iter = 0, cpu = cpumask_next(-1, mask); \ | |
33 | iter < num_cpus; \ | |
34 | iter++, cpu = cpumask_next(cpu, mask)) \ | |
35 | ||
36 | int cpu_numcores(void); | |
37 | int cpu_num_dspcores(void); | |
38 | u32 cpu_mask(void); | |
39 | u32 cpu_dsp_mask(void); | |
40 | int is_core_valid(unsigned int core); | |
41 | ||
42 | /** | |
43 | * checkcpu() - perform an early check of the CPU | |
44 | * | |
45 | * This is used on PowerPC, SH and X86 machines as a CPU init mechanism. It is | |
46 | * called during the pre-relocation init sequence in board_init_f(). | |
47 | * | |
48 | * @return 0 if oK, -ve on error | |
49 | */ | |
50 | int checkcpu(void); | |
51 | ||
62270f43 SG |
52 | void smp_set_core_boot_addr(unsigned long addr, int corenr); |
53 | void smp_kick_all_cpus(void); | |
54 | ||
9edefc27 SG |
55 | int icache_status(void); |
56 | void icache_enable(void); | |
57 | void icache_disable(void); | |
58 | int dcache_status(void); | |
59 | void dcache_enable(void); | |
60 | void dcache_disable(void); | |
61 | void mmu_disable(void); | |
62 | ||
1eb69ae4 SG |
63 | /* arch/$(ARCH)/lib/cache.c */ |
64 | void enable_caches(void); | |
65 | void flush_cache(unsigned long addr, unsigned long size); | |
66 | void flush_dcache_all(void); | |
67 | void flush_dcache_range(unsigned long start, unsigned long stop); | |
68 | void invalidate_dcache_range(unsigned long start, unsigned long stop); | |
69 | void invalidate_dcache_all(void); | |
70 | void invalidate_icache_all(void); | |
71 | ||
72 | enum { | |
73 | /* Disable caches (else flush caches but leave them active) */ | |
74 | CBL_DISABLE_CACHES = 1 << 0, | |
75 | CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1, | |
76 | ||
77 | CBL_ALL = 3, | |
78 | }; | |
79 | ||
80 | /** | |
81 | * Clean up ready for linux | |
82 | * | |
83 | * @param flags Flags to control what is done | |
84 | */ | |
85 | int cleanup_before_linux_select(int flags); | |
9a3b4ceb | 86 | |
35b65dd8 HS |
87 | void reset_cpu(void); |
88 | ||
62f9b654 | 89 | #endif |