[J-u-boot.git] / common / cmd_immap.c

/*
 * (C) Copyright 2000-2003
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * MPC8xx/MPC8260 Internal Memory Map Functions
 */

#include <common.h>
#include <command.h>

#if defined(CONFIG_8xx) || defined(CONFIG_8260)

#if defined(CONFIG_8xx)
#include <asm/8xx_immap.h>
#include <commproc.h>
#include <asm/iopin_8xx.h>
#elif defined(CONFIG_8260)
#include <asm/immap_8260.h>
#include <asm/cpm_8260.h>
#include <asm/iopin_8260.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

static void
unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	printf ("Sorry, but the '%s' command has not been implemented\n",
		cmdtp->name);
}

int
do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile sysconf8xx_t *sc = &immap->im_siu_conf;
#elif defined(CONFIG_8260)
	volatile sysconf8260_t *sc = &immap->im_siu_conf;
#endif

	printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
#if defined(CONFIG_8xx)
	printf ("SWT   = %08x\n", sc->sc_swt);
	printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
	printf ("SIEL  = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
	printf ("TESR  = %08x SDCR  = %08x\n", sc->sc_tesr, sc->sc_sdcr);
#elif defined(CONFIG_8260)
	printf ("BCR   = %08x\n", sc->sc_bcr);
	printf ("P_ACR =       %02x P_ALRH= %08x P_ALRL= %08x\n",
		sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
	printf ("L_ACR =       %02x L_ALRH= %08x L_ALRL= %08x\n",
		sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
	printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
	printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
	printf ("PDTEA = %08x PDTEM =       %02x\n", sc->sc_pdtea, sc->sc_pdtem);
	printf ("LDTEA = %08x LDTEM =       %02x\n", sc->sc_ldtea, sc->sc_ldtem);
#endif
	return 0;
}

int
do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	int nbanks = 8;
#elif defined(CONFIG_8260)
	volatile memctl8260_t *memctl = &immap->im_memctl;
	int nbanks = 12;
#endif
	volatile uint *p = &memctl->memc_br0;
	int i;

	for (i = 0; i < nbanks; i++, p += 2) {
		if (i < 10) {
			printf ("BR%d   = %08x OR%d   = %08x\n",
				i, p[0], i, p[1]);
		} else {
			printf ("BR%d  = %08x OR%d  = %08x\n",
				i, p[0], i, p[1]);
		}
	}

	printf ("MAR   = %08x", memctl->memc_mar);
#if defined(CONFIG_8xx)
	printf (" MCR   = %08x\n", memctl->memc_mcr);
#elif defined(CONFIG_8260)
	putc ('\n');
#endif
	printf ("MAMR  = %08x MBMR  = %08x",
		memctl->memc_mamr, memctl->memc_mbmr);
#if defined(CONFIG_8xx)
	printf ("\nMSTAT =     %04x\n", memctl->memc_mstat);
#elif defined(CONFIG_8260)
	printf (" MCMR  = %08x\n", memctl->memc_mcmr);
#endif
	printf ("MPTPR =     %04x MDR   = %08x\n",
		memctl->memc_mptpr, memctl->memc_mdr);
#if defined(CONFIG_8260)
	printf ("PSDMR = %08x LSDMR = %08x\n",
		memctl->memc_psdmr, memctl->memc_lsdmr);
	printf ("PURT  =       %02x PSRT  =       %02x\n",
		memctl->memc_purt, memctl->memc_psrt);
	printf ("LURT  =       %02x LSRT  =       %02x\n",
		memctl->memc_lurt, memctl->memc_lsrt);
	printf ("IMMR  = %08x\n", memctl->memc_immr);
#endif
	return 0;
}

int
do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

#ifdef CONFIG_8260
int
do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}
#endif

int
do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile car8xx_t *car = &immap->im_clkrst;
#elif defined(CONFIG_8260)
	volatile car8260_t *car = &immap->im_clkrst;
#endif

#if defined(CONFIG_8xx)
	printf ("SCCR  = %08x\n", car->car_sccr);
	printf ("PLPRCR= %08x\n", car->car_plprcr);
	printf ("RSR   = %08x\n", car->car_rsr);
#elif defined(CONFIG_8260)
	printf ("SCCR  = %08x\n", car->car_sccr);
	printf ("SCMR  = %08x\n", car->car_scmr);
	printf ("RSR   = %08x\n", car->car_rsr);
	printf ("RMR   = %08x\n", car->car_rmr);
#endif
	return 0;
}

static int counter;

static void
header(void)
{
	char *data = "\
       --------------------------------        --------------------------------\
       00000000001111111111222222222233        00000000001111111111222222222233\
       01234567890123456789012345678901        01234567890123456789012345678901\
       --------------------------------        --------------------------------\
    ";
	int i;

	if (counter % 2)
		putc('\n');
	counter = 0;

	for (i = 0; i < 4; i++, data += 79)
		printf("%.79s\n", data);
}

static void binary (char *label, uint value, int nbits)
{
	uint mask = 1 << (nbits - 1);
	int i, second = (counter++ % 2);

	if (second)
		putc (' ');
	puts (label);
	for (i = 32 + 1; i != nbits; i--)
		putc (' ');

	while (mask != 0) {
		if (value & mask)
			putc ('1');
		else
			putc ('0');
		mask >>= 1;
	}

	if (second)
		putc ('\n');
}

#if defined(CONFIG_8xx)
#define PA_NBITS	16
#define PA_NB_ODR	 8
#define PB_NBITS	18
#define PB_NB_ODR	16
#define PC_NBITS	12
#define PD_NBITS	13
#elif defined(CONFIG_8260)
#define PA_NBITS	32
#define PA_NB_ODR	32
#define PB_NBITS	28
#define PB_NB_ODR	28
#define PC_NBITS	32
#define PD_NBITS	28
#endif

int
do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile iop8xx_t *iop = &immap->im_ioport;
	volatile ushort *l, *r;
#elif defined(CONFIG_8260)
	volatile iop8260_t *iop = &immap->im_ioport;
	volatile uint *l, *r;
#endif
	volatile uint *R;

	counter = 0;
	header ();

	/*
	 * Ports A & B
	 */

#if defined(CONFIG_8xx)
	l = &iop->iop_padir;
	R = &immap->im_cpm.cp_pbdir;
#elif defined(CONFIG_8260)
	l = &iop->iop_pdira;
	R = &iop->iop_pdirb;
#endif
	binary ("PA_DIR", *l++, PA_NBITS);
	binary ("PB_DIR", *R++, PB_NBITS);
	binary ("PA_PAR", *l++, PA_NBITS);
	binary ("PB_PAR", *R++, PB_NBITS);
#if defined(CONFIG_8260)
	binary ("PA_SOR", *l++, PA_NBITS);
	binary ("PB_SOR", *R++, PB_NBITS);
#endif
	binary ("PA_ODR", *l++, PA_NB_ODR);
	binary ("PB_ODR", *R++, PB_NB_ODR);
	binary ("PA_DAT", *l++, PA_NBITS);
	binary ("PB_DAT", *R++, PB_NBITS);

	header ();

	/*
	 * Ports C & D
	 */

#if defined(CONFIG_8xx)
	l = &iop->iop_pcdir;
	r = &iop->iop_pddir;
#elif defined(CONFIG_8260)
	l = &iop->iop_pdirc;
	r = &iop->iop_pdird;
#endif
	binary ("PC_DIR", *l++, PC_NBITS);
	binary ("PD_DIR", *r++, PD_NBITS);
	binary ("PC_PAR", *l++, PC_NBITS);
	binary ("PD_PAR", *r++, PD_NBITS);
#if defined(CONFIG_8xx)
	binary ("PC_SO ", *l++, PC_NBITS);
	binary ("      ", 0, 0);
	r++;
#elif defined(CONFIG_8260)
	binary ("PC_SOR", *l++, PC_NBITS);
	binary ("PD_SOR", *r++, PD_NBITS);
	binary ("PC_ODR", *l++, PC_NBITS);
	binary ("PD_ODR", *r++, PD_NBITS);
#endif
	binary ("PC_DAT", *l++, PC_NBITS);
	binary ("PD_DAT", *r++, PD_NBITS);
#if defined(CONFIG_8xx)
	binary ("PC_INT", *l++, PC_NBITS);
#endif

	header ();
	return 0;
}

/*
 * set the io pins
 * this needs a clean up for smaller tighter code
 * use *uint and set the address based on cmd + port
 */
int
do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	uint rcode = 0;
	iopin_t iopin;
	static uint port = 0;
	static uint pin = 0;
	static uint value = 0;
	static enum {
		DIR,
		PAR,
		SOR,
		ODR,
		DAT,
#if defined(CONFIG_8xx)
		INT
#endif
	} cmd = DAT;

	if (argc != 5) {
		puts ("iopset PORT PIN CMD VALUE\n");
		return 1;
	}
	port = argv[1][0] - 'A';
	if (port > 3)
		port -= 0x20;
	if (port > 3)
		rcode = 1;
	pin = simple_strtol (argv[2], NULL, 10);
	if (pin > 31)
		rcode = 1;


	switch (argv[3][0]) {
	case 'd':
		if (argv[3][1] == 'a')
			cmd = DAT;
		else if (argv[3][1] == 'i')
			cmd = DIR;
		else
			rcode = 1;
		break;
	case 'p':
		cmd = PAR;
		break;
	case 'o':
		cmd = ODR;
		break;
	case 's':
		cmd = SOR;
		break;
#if defined(CONFIG_8xx)
	case 'i':
		cmd = INT;
		break;
#endif
	default:
		printf ("iopset: unknown command %s\n", argv[3]);
		rcode = 1;
	}
	if (argv[4][0] == '1')
		value = 1;
	else if (argv[4][0] == '0')
		value = 0;
	else
		rcode = 1;
	if (rcode == 0) {
		iopin.port = port;
		iopin.pin = pin;
		iopin.flag = 0;
		switch (cmd) {
		case DIR:
			if (value)
				iopin_set_out (&iopin);
			else
				iopin_set_in (&iopin);
			break;
		case PAR:
			if (value)
				iopin_set_ded (&iopin);
			else
				iopin_set_gen (&iopin);
			break;
		case SOR:
			if (value)
				iopin_set_opt2 (&iopin);
			else
				iopin_set_opt1 (&iopin);
			break;
		case ODR:
			if (value)
				iopin_set_odr (&iopin);
			else
				iopin_set_act (&iopin);
			break;
		case DAT:
			if (value)
				iopin_set_high (&iopin);
			else
				iopin_set_low (&iopin);
			break;
#if defined(CONFIG_8xx)
		case INT:
			if (value)
				iopin_set_falledge (&iopin);
			else
				iopin_set_anyedge (&iopin);
			break;
#endif
		}

	}
	return rcode;
}

int
do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

static void prbrg (int n, uint val)
{
	uint extc = (val >> 14) & 3;
	uint cd = (val & CPM_BRG_CD_MASK) >> 1;
	uint div16 = (val & CPM_BRG_DIV16) != 0;

#if defined(CONFIG_8xx)
	ulong clock = gd->cpu_clk;
#elif defined(CONFIG_8260)
	ulong clock = gd->brg_clk;
#endif

	printf ("BRG%d:", n);

	if (val & CPM_BRG_RST)
		puts (" RESET");
	else
		puts ("      ");

	if (val & CPM_BRG_EN)
		puts ("  ENABLED");
	else
		puts (" DISABLED");

	printf (" EXTC=%d", extc);

	if (val & CPM_BRG_ATB)
		puts (" ATB");
	else
		puts ("    ");

	printf (" DIVIDER=%4d", cd);
	if (extc == 0 && cd != 0) {
		uint baudrate;

		if (div16)
			baudrate = (clock / 16) / (cd + 1);
		else
			baudrate = clock / (cd + 1);

		printf ("=%6d bps", baudrate);
	} else {
		puts ("           ");
	}

	if (val & CPM_BRG_DIV16)
		puts (" DIV16");
	else
		puts ("      ");

	putc ('\n');
}

int
do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile cpm8xx_t *cp = &immap->im_cpm;
	volatile uint *p = &cp->cp_brgc1;
#elif defined(CONFIG_8260)
	volatile uint *p = &immap->im_brgc1;
#endif
	int i = 1;

	while (i <= 4)
		prbrg (i++, *p++);

#if defined(CONFIG_8260)
	p = &immap->im_brgc5;
	while (i <= 8)
		prbrg (i++, *p++);
#endif
	return 0;
}

int
do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;

#if defined(CONFIG_8xx)
	volatile i2c8xx_t *i2c = &immap->im_i2c;
	volatile cpm8xx_t *cp = &immap->im_cpm;
	volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC];
#elif defined(CONFIG_8260)
	volatile i2c8260_t *i2c = &immap->im_i2c;
	volatile iic_t *iip;
	uint dpaddr;

	dpaddr = *((unsigned short *) (&immap->im_dprambase[PROFF_I2C_BASE]));
	if (dpaddr == 0)
		iip = NULL;
	else
		iip = (iic_t *) & immap->im_dprambase[dpaddr];
#endif

	printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
	printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
	printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);

	if (iip == NULL)
		puts ("i2c parameter ram not allocated\n");
	else {
		printf ("RBASE = %08x TBASE = %08x\n",
			iip->iic_rbase, iip->iic_tbase);
		printf ("RFCR  =       %02x TFCR  =       %02x\n",
			iip->iic_rfcr, iip->iic_tfcr);
		printf ("MRBLR =     %04x\n", iip->iic_mrblr);
		printf ("RSTATE= %08x RDP   = %08x\n",
			iip->iic_rstate, iip->iic_rdp);
		printf ("RBPTR =     %04x RBC   =     %04x\n",
			iip->iic_rbptr, iip->iic_rbc);
		printf ("RXTMP = %08x\n", iip->iic_rxtmp);
		printf ("TSTATE= %08x TDP   = %08x\n",
			iip->iic_tstate, iip->iic_tdp);
		printf ("TBPTR =     %04x TBC   =     %04x\n",
			iip->iic_tbptr, iip->iic_tbc);
		printf ("TXTMP = %08x\n", iip->iic_txtmp);
	}
	return 0;
}

int
do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

int
do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	unimplemented (cmdtp, flag, argc, argv);
	return 0;
}

/***************************************************/

U_BOOT_CMD(
	siuinfo,	1,	1,	do_siuinfo,
	"print System Interface Unit (SIU) registers",
	""
);

U_BOOT_CMD(
	memcinfo,	1,	1,	do_memcinfo,
	"print Memory Controller registers",
	""
);

U_BOOT_CMD(
	sitinfo,	1,	1,	do_sitinfo,
	"print System Integration Timers (SIT) registers",
	""
);

#ifdef CONFIG_8260
U_BOOT_CMD(
	icinfo,	1,	1,	do_icinfo,
	"print Interrupt Controller registers",
	""
);
#endif

U_BOOT_CMD(
	carinfo,	1,	1,	do_carinfo,
	"print Clocks and Reset registers",
	""
);

U_BOOT_CMD(
	iopinfo,	1,	1,	do_iopinfo,
	"print I/O Port registers",
	""
);

U_BOOT_CMD(
	iopset,	5,	0,	do_iopset,
	"set I/O Port registers",
	"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
);

U_BOOT_CMD(
	dmainfo,	1,	1,	do_dmainfo,
	"print SDMA/IDMA registers",
	""
);

U_BOOT_CMD(
	fccinfo,	1,	1,	do_fccinfo,
	"print FCC registers",
	""
);

U_BOOT_CMD(
	brginfo,	1,	1,	do_brginfo,
	"print Baud Rate Generator (BRG) registers",
	""
);

U_BOOT_CMD(
	i2cinfo,	1,	1,	do_i2cinfo,
	"print I2C registers",
	""
);

U_BOOT_CMD(
	sccinfo,	1,	1,	do_sccinfo,
	"print SCC registers",
	""
);

U_BOOT_CMD(
	smcinfo,	1,	1,	do_smcinfo,
	"print SMC registers",
	""
);

U_BOOT_CMD(
	spiinfo,	1,	1,	do_spiinfo,
	"print Serial Peripheral Interface (SPI) registers",
	""
);

U_BOOT_CMD(
	muxinfo,	1,	1,	do_muxinfo,
	"print CPM Multiplexing registers",
	""
);

U_BOOT_CMD(
	siinfo,	1,	1,	do_siinfo,
	"print Serial Interface (SI) registers",
	""
);

U_BOOT_CMD(
	mccinfo,	1,	1,	do_mccinfo,
	"print MCC registers",
	""
);

#endif
Commit	Line	Data
c609719b	1	/*
2abbe075	2	* (C) Copyright 2000-2003
c609719b WD	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* MPC8xx/MPC8260 Internal Memory Map Functions
	26	*/
	27
	28	#include <common.h>
	29	#include <command.h>
c609719b	30
4a43719a	31	#if defined(CONFIG_8xx) \|\| defined(CONFIG_8260)
c609719b WD	32
	33	#if defined(CONFIG_8xx)
	34	#include <asm/8xx_immap.h>
	35	#include <commproc.h>
e6f22281	36	#include <asm/iopin_8xx.h>
c609719b WD	37	#elif defined(CONFIG_8260)
	38	#include <asm/immap_8260.h>
	39	#include <asm/cpm_8260.h>
	40	#include <asm/iopin_8260.h>
	41	#endif
	42
d87080b7	43	DECLARE_GLOBAL_DATA_PTR;
d87080b7	44
c609719b WD	45	static void
	46	unimplemented ( cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	47	{
	48	printf ("Sorry, but the '%s' command has not been implemented\n",
	49	cmdtp->name);
	50	}
	51
	52	int
	53	do_siuinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	54	{
6d0f6bcf	55	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	56
	57	#if defined(CONFIG_8xx)
	58	volatile sysconf8xx_t *sc = &immap->im_siu_conf;
	59	#elif defined(CONFIG_8260)
	60	volatile sysconf8260_t *sc = &immap->im_siu_conf;
	61	#endif
	62
	63	printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr);
	64	#if defined(CONFIG_8xx)
	65	printf ("SWT = %08x\n", sc->sc_swt);
	66	printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
	67	printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
	68	printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr);
	69	#elif defined(CONFIG_8260)
	70	printf ("BCR = %08x\n", sc->sc_bcr);
	71	printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n",
	72	sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
	73	printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n",
	74	sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl);
	75	printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2);
	76	printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2);
	77	printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem);
	78	printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem);
	79	#endif
	80	return 0;
	81	}
	82
	83	int
	84	do_memcinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	85	{
6d0f6bcf	86	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	87
	88	#if defined(CONFIG_8xx)
	89	volatile memctl8xx_t *memctl = &immap->im_memctl;
	90	int nbanks = 8;
	91	#elif defined(CONFIG_8260)
	92	volatile memctl8260_t *memctl = &immap->im_memctl;
	93	int nbanks = 12;
	94	#endif
	95	volatile uint *p = &memctl->memc_br0;
	96	int i;
	97
	98	for (i = 0; i < nbanks; i++, p += 2) {
	99	if (i < 10) {
	100	printf ("BR%d = %08x OR%d = %08x\n",
	101	i, p[0], i, p[1]);
	102	} else {
	103	printf ("BR%d = %08x OR%d = %08x\n",
	104	i, p[0], i, p[1]);
	105	}
	106	}
	107
	108	printf ("MAR = %08x", memctl->memc_mar);
	109	#if defined(CONFIG_8xx)
	110	printf (" MCR = %08x\n", memctl->memc_mcr);
	111	#elif defined(CONFIG_8260)
4b9206ed	112	putc ('\n');
c609719b WD	113	#endif
	114	printf ("MAMR = %08x MBMR = %08x",
	115	memctl->memc_mamr, memctl->memc_mbmr);
	116	#if defined(CONFIG_8xx)
	117	printf ("\nMSTAT = %04x\n", memctl->memc_mstat);
	118	#elif defined(CONFIG_8260)
	119	printf (" MCMR = %08x\n", memctl->memc_mcmr);
	120	#endif
	121	printf ("MPTPR = %04x MDR = %08x\n",
	122	memctl->memc_mptpr, memctl->memc_mdr);
	123	#if defined(CONFIG_8260)
	124	printf ("PSDMR = %08x LSDMR = %08x\n",
	125	memctl->memc_psdmr, memctl->memc_lsdmr);
	126	printf ("PURT = %02x PSRT = %02x\n",
	127	memctl->memc_purt, memctl->memc_psrt);
	128	printf ("LURT = %02x LSRT = %02x\n",
	129	memctl->memc_lurt, memctl->memc_lsrt);
	130	printf ("IMMR = %08x\n", memctl->memc_immr);
	131	#endif
	132	return 0;
	133	}
	134
	135	int
	136	do_sitinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	137	{
	138	unimplemented (cmdtp, flag, argc, argv);
	139	return 0;
	140	}
	141
	142	#ifdef CONFIG_8260
	143	int
	144	do_icinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	145	{
	146	unimplemented (cmdtp, flag, argc, argv);
	147	return 0;
	148	}
	149	#endif
	150
	151	int
	152	do_carinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	153	{
6d0f6bcf	154	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
2abbe075 WD	155
	156	#if defined(CONFIG_8xx)
	157	volatile car8xx_t *car = &immap->im_clkrst;
	158	#elif defined(CONFIG_8260)
	159	volatile car8260_t *car = &immap->im_clkrst;
	160	#endif
	161
	162	#if defined(CONFIG_8xx)
	163	printf ("SCCR = %08x\n", car->car_sccr);
	164	printf ("PLPRCR= %08x\n", car->car_plprcr);
	165	printf ("RSR = %08x\n", car->car_rsr);
	166	#elif defined(CONFIG_8260)
	167	printf ("SCCR = %08x\n", car->car_sccr);
	168	printf ("SCMR = %08x\n", car->car_scmr);
	169	printf ("RSR = %08x\n", car->car_rsr);
	170	printf ("RMR = %08x\n", car->car_rmr);
	171	#endif
c609719b WD	172	return 0;
	173	}
	174
	175	static int counter;
	176
	177	static void
	178	header(void)
	179	{
	180	char *data = "\
	181	-------------------------------- --------------------------------\
	182	00000000001111111111222222222233 00000000001111111111222222222233\
	183	01234567890123456789012345678901 01234567890123456789012345678901\
	184	-------------------------------- --------------------------------\
	185	";
	186	int i;
	187
	188	if (counter % 2)
2abbe075	189	putc('\n');
c609719b WD	190	counter = 0;
	191
	192	for (i = 0; i < 4; i++, data += 79)
	193	printf("%.79s\n", data);
	194	}
	195
	196	static void binary (char *label, uint value, int nbits)
	197	{
	198	uint mask = 1 << (nbits - 1);
	199	int i, second = (counter++ % 2);
	200
	201	if (second)
	202	putc (' ');
	203	puts (label);
	204	for (i = 32 + 1; i != nbits; i--)
	205	putc (' ');
	206
	207	while (mask != 0) {
	208	if (value & mask)
	209	putc ('1');
	210	else
	211	putc ('0');
	212	mask >>= 1;
	213	}
	214
	215	if (second)
	216	putc ('\n');
	217	}
	218
	219	#if defined(CONFIG_8xx)
	220	#define PA_NBITS 16
	221	#define PA_NB_ODR 8
	222	#define PB_NBITS 18
	223	#define PB_NB_ODR 16
	224	#define PC_NBITS 12
	225	#define PD_NBITS 13
	226	#elif defined(CONFIG_8260)
	227	#define PA_NBITS 32
	228	#define PA_NB_ODR 32
	229	#define PB_NBITS 28
	230	#define PB_NB_ODR 28
	231	#define PC_NBITS 32
	232	#define PD_NBITS 28
	233	#endif
	234
	235	int
	236	do_iopinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	237	{
6d0f6bcf	238	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	239
	240	#if defined(CONFIG_8xx)
	241	volatile iop8xx_t *iop = &immap->im_ioport;
	242	volatile ushort l, r;
	243	#elif defined(CONFIG_8260)
	244	volatile iop8260_t *iop = &immap->im_ioport;
	245	volatile uint l, r;
	246	#endif
	247	volatile uint *R;
	248
	249	counter = 0;
	250	header ();
	251
	252	/*
	253	* Ports A & B
	254	*/
	255
	256	#if defined(CONFIG_8xx)
	257	l = &iop->iop_padir;
	258	R = &immap->im_cpm.cp_pbdir;
	259	#elif defined(CONFIG_8260)
	260	l = &iop->iop_pdira;
	261	R = &iop->iop_pdirb;
	262	#endif
	263	binary ("PA_DIR", *l++, PA_NBITS);
	264	binary ("PB_DIR", *R++, PB_NBITS);
	265	binary ("PA_PAR", *l++, PA_NBITS);
	266	binary ("PB_PAR", *R++, PB_NBITS);
	267	#if defined(CONFIG_8260)
	268	binary ("PA_SOR", *l++, PA_NBITS);
	269	binary ("PB_SOR", *R++, PB_NBITS);
	270	#endif
	271	binary ("PA_ODR", *l++, PA_NB_ODR);
	272	binary ("PB_ODR", *R++, PB_NB_ODR);
	273	binary ("PA_DAT", *l++, PA_NBITS);
	274	binary ("PB_DAT", *R++, PB_NBITS);
	275
	276	header ();
	277
	278	/*
	279	* Ports C & D
	280	*/
	281
	282	#if defined(CONFIG_8xx)
	283	l = &iop->iop_pcdir;
	284	r = &iop->iop_pddir;
	285	#elif defined(CONFIG_8260)
	286	l = &iop->iop_pdirc;
	287	r = &iop->iop_pdird;
	288	#endif
	289	binary ("PC_DIR", *l++, PC_NBITS);
	290	binary ("PD_DIR", *r++, PD_NBITS);
	291	binary ("PC_PAR", *l++, PC_NBITS);
	292	binary ("PD_PAR", *r++, PD_NBITS);
	293	#if defined(CONFIG_8xx)
	294	binary ("PC_SO ", *l++, PC_NBITS);
	295	binary (" ", 0, 0);
	296	r++;
	297	#elif defined(CONFIG_8260)
	298	binary ("PC_SOR", *l++, PC_NBITS);
	299	binary ("PD_SOR", *r++, PD_NBITS);
	300	binary ("PC_ODR", *l++, PC_NBITS);
	301	binary ("PD_ODR", *r++, PD_NBITS);
	302	#endif
303	binary ("PC_DAT", *l++, PC_NBITS);
304	binary ("PD_DAT", *r++, PD_NBITS);
305	#if defined(CONFIG_8xx)
306	binary ("PC_INT", *l++, PC_NBITS);
307	#endif
308
309	header ();
310	return 0;
311	}
312
313	/*
314	* set the io pins
315	* this needs a clean up for smaller tighter code
316	* use *uint and set the address based on cmd + port
317	*/
318	int
319	do_iopset (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
320	{
c609719b	321	uint rcode = 0;
f57f70aa	322	iopin_t iopin;
c609719b WD	323	static uint port = 0;
	324	static uint pin = 0;
	325	static uint value = 0;
f57f70aa WD	326	static enum {
	327	DIR,
	328	PAR,
	329	SOR,
	330	ODR,
	331	DAT,
	332	#if defined(CONFIG_8xx)
	333	INT
	334	#endif
	335	} cmd = DAT;
c609719b WD	336
c609719b WD	337	if (argc != 5) {
4b9206ed	338	puts ("iopset PORT PIN CMD VALUE\n");
c609719b WD	339	return 1;
	340	}
	341	port = argv[1][0] - 'A';
	342	if (port > 3)
	343	port -= 0x20;
	344	if (port > 3)
	345	rcode = 1;
	346	pin = simple_strtol (argv[2], NULL, 10);
	347	if (pin > 31)
	348	rcode = 1;
	349
	350
	351	switch (argv[3][0]) {
	352	case 'd':
	353	if (argv[3][1] == 'a')
	354	cmd = DAT;
	355	else if (argv[3][1] == 'i')
	356	cmd = DIR;
	357	else
	358	rcode = 1;
	359	break;
	360	case 'p':
	361	cmd = PAR;
	362	break;
	363	case 'o':
	364	cmd = ODR;
	365	break;
	366	case 's':
	367	cmd = SOR;
	368	break;
e6f22281 WD	369	#if defined(CONFIG_8xx)
	370	case 'i':
	371	cmd = INT;
	372	break;
	373	#endif
c609719b WD	374	default:
	375	printf ("iopset: unknown command %s\n", argv[3]);
	376	rcode = 1;
	377	}
	378	if (argv[4][0] == '1')
	379	value = 1;
	380	else if (argv[4][0] == '0')
	381	value = 0;
	382	else
	383	rcode = 1;
	384	if (rcode == 0) {
	385	iopin.port = port;
	386	iopin.pin = pin;
77ddac94	387	iopin.flag = 0;
c609719b WD	388	switch (cmd) {
	389	case DIR:
	390	if (value)
	391	iopin_set_out (&iopin);
	392	else
	393	iopin_set_in (&iopin);
	394	break;
	395	case PAR:
	396	if (value)
	397	iopin_set_ded (&iopin);
	398	else
	399	iopin_set_gen (&iopin);
	400	break;
	401	case SOR:
	402	if (value)
	403	iopin_set_opt2 (&iopin);
	404	else
	405	iopin_set_opt1 (&iopin);
	406	break;
	407	case ODR:
	408	if (value)
	409	iopin_set_odr (&iopin);
	410	else
	411	iopin_set_act (&iopin);
	412	break;
	413	case DAT:
	414	if (value)
	415	iopin_set_high (&iopin);
	416	else
	417	iopin_set_low (&iopin);
	418	break;
e6f22281 WD	419	#if defined(CONFIG_8xx)
	420	case INT:
	421	if (value)
	422	iopin_set_falledge (&iopin);
	423	else
	424	iopin_set_anyedge (&iopin);
	425	break;
	426	#endif
c609719b WD	427	}
	428
	429	}
	430	return rcode;
c609719b WD	431	}
	432
	433	int
	434	do_dmainfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	435	{
	436	unimplemented (cmdtp, flag, argc, argv);
	437	return 0;
	438	}
	439
	440	int
	441	do_fccinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	442	{
	443	unimplemented (cmdtp, flag, argc, argv);
	444	return 0;
	445	}
	446
	447	static void prbrg (int n, uint val)
	448	{
	449	uint extc = (val >> 14) & 3;
	450	uint cd = (val & CPM_BRG_CD_MASK) >> 1;
	451	uint div16 = (val & CPM_BRG_DIV16) != 0;
	452
	453	#if defined(CONFIG_8xx)
c609719b WD	454	ulong clock = gd->cpu_clk;
c609719b WD	455	#elif defined(CONFIG_8260)
c609719b WD	456	ulong clock = gd->brg_clk;
	457	#endif
	458
	459	printf ("BRG%d:", n);
	460
	461	if (val & CPM_BRG_RST)
	462	puts (" RESET");
	463	else
	464	puts (" ");
	465
	466	if (val & CPM_BRG_EN)
	467	puts (" ENABLED");
	468	else
	469	puts (" DISABLED");
	470
	471	printf (" EXTC=%d", extc);
	472
	473	if (val & CPM_BRG_ATB)
	474	puts (" ATB");
	475	else
	476	puts (" ");
	477
	478	printf (" DIVIDER=%4d", cd);
	479	if (extc == 0 && cd != 0) {
	480	uint baudrate;
	481
	482	if (div16)
	483	baudrate = (clock / 16) / (cd + 1);
	484	else
	485	baudrate = clock / (cd + 1);
	486
	487	printf ("=%6d bps", baudrate);
	488	} else {
	489	puts (" ");
	490	}
	491
	492	if (val & CPM_BRG_DIV16)
	493	puts (" DIV16");
	494	else
	495	puts (" ");
	496
	497	putc ('\n');
	498	}
	499
	500	int
	501	do_brginfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	502	{
6d0f6bcf	503	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	504
	505	#if defined(CONFIG_8xx)
	506	volatile cpm8xx_t *cp = &immap->im_cpm;
	507	volatile uint *p = &cp->cp_brgc1;
	508	#elif defined(CONFIG_8260)
	509	volatile uint *p = &immap->im_brgc1;
	510	#endif
	511	int i = 1;
	512
	513	while (i <= 4)
	514	prbrg (i++, *p++);
	515
	516	#if defined(CONFIG_8260)
	517	p = &immap->im_brgc5;
	518	while (i <= 8)
	519	prbrg (i++, *p++);
	520	#endif
	521	return 0;
	522	}
	523
	524	int
	525	do_i2cinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	526	{
6d0f6bcf	527	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
c609719b WD	528
	529	#if defined(CONFIG_8xx)
	530	volatile i2c8xx_t *i2c = &immap->im_i2c;
	531	volatile cpm8xx_t *cp = &immap->im_cpm;
	532	volatile iic_t iip = (iic_t ) & cp->cp_dparam[PROFF_IIC];
	533	#elif defined(CONFIG_8260)
	534	volatile i2c8260_t *i2c = &immap->im_i2c;
	535	volatile iic_t *iip;
	536	uint dpaddr;
	537
	538	dpaddr = ((unsigned short ) (&immap->im_dprambase[PROFF_I2C_BASE]));
	539	if (dpaddr == 0)
	540	iip = NULL;
	541	else
	542	iip = (iic_t *) & immap->im_dprambase[dpaddr];
	543	#endif
	544
	545	printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add);
	546	printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com);
	547	printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);
	548
	549	if (iip == NULL)
4b9206ed	550	puts ("i2c parameter ram not allocated\n");
c609719b WD	551	else {
	552	printf ("RBASE = %08x TBASE = %08x\n",
	553	iip->iic_rbase, iip->iic_tbase);
	554	printf ("RFCR = %02x TFCR = %02x\n",
	555	iip->iic_rfcr, iip->iic_tfcr);
	556	printf ("MRBLR = %04x\n", iip->iic_mrblr);
	557	printf ("RSTATE= %08x RDP = %08x\n",
	558	iip->iic_rstate, iip->iic_rdp);
	559	printf ("RBPTR = %04x RBC = %04x\n",
	560	iip->iic_rbptr, iip->iic_rbc);
	561	printf ("RXTMP = %08x\n", iip->iic_rxtmp);
	562	printf ("TSTATE= %08x TDP = %08x\n",
	563	iip->iic_tstate, iip->iic_tdp);
	564	printf ("TBPTR = %04x TBC = %04x\n",
	565	iip->iic_tbptr, iip->iic_tbc);
	566	printf ("TXTMP = %08x\n", iip->iic_txtmp);
	567	}
	568	return 0;
	569	}
	570
	571	int
	572	do_sccinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	573	{
	574	unimplemented (cmdtp, flag, argc, argv);
	575	return 0;
	576	}
	577
	578	int
	579	do_smcinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	580	{
	581	unimplemented (cmdtp, flag, argc, argv);
	582	return 0;
	583	}
	584
	585	int
	586	do_spiinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	587	{
	588	unimplemented (cmdtp, flag, argc, argv);
	589	return 0;
	590	}
	591
	592	int
	593	do_muxinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	594	{
	595	unimplemented (cmdtp, flag, argc, argv);
	596	return 0;
	597	}
	598
	599	int
	600	do_siinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	601	{
	602	unimplemented (cmdtp, flag, argc, argv);
	603	return 0;
	604	}
	605
	606	int
	607	do_mccinfo (cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	608	{
	609	unimplemented (cmdtp, flag, argc, argv);
	610	return 0;
	611	}
8bde7f77 WD	612
	613	/***************************************************/
	614
0d498393 WD	615	U_BOOT_CMD(
0d498393 WD	616	siuinfo, 1, 1, do_siuinfo,
2fb2604d	617	"print System Interface Unit (SIU) registers",
a89c33db	618	""
8bde7f77 WD	619	);
8bde7f77 WD	620
0d498393 WD	621	U_BOOT_CMD(
0d498393 WD	622	memcinfo, 1, 1, do_memcinfo,
2fb2604d	623	"print Memory Controller registers",
a89c33db	624	""
8bde7f77 WD	625	);
8bde7f77 WD	626
0d498393 WD	627	U_BOOT_CMD(
0d498393 WD	628	sitinfo, 1, 1, do_sitinfo,
2fb2604d	629	"print System Integration Timers (SIT) registers",
a89c33db	630	""
8bde7f77 WD	631	);
	632
	633	#ifdef CONFIG_8260
0d498393 WD	634	U_BOOT_CMD(
0d498393 WD	635	icinfo, 1, 1, do_icinfo,
2fb2604d	636	"print Interrupt Controller registers",
a89c33db	637	""
8bde7f77 WD	638	);
	639	#endif
	640
0d498393 WD	641	U_BOOT_CMD(
0d498393 WD	642	carinfo, 1, 1, do_carinfo,
2fb2604d	643	"print Clocks and Reset registers",
a89c33db	644	""
8bde7f77 WD	645	);
8bde7f77 WD	646
0d498393 WD	647	U_BOOT_CMD(
0d498393 WD	648	iopinfo, 1, 1, do_iopinfo,
2fb2604d	649	"print I/O Port registers",
a89c33db	650	""
8bde7f77 WD	651	);
8bde7f77 WD	652
0d498393 WD	653	U_BOOT_CMD(
0d498393 WD	654	iopset, 5, 0, do_iopset,
2fb2604d	655	"set I/O Port registers",
8bde7f77 WD	656	"PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat\|dir\|odr\|sor], VALUE: 0\|1"
	657	);
	658
0d498393 WD	659	U_BOOT_CMD(
0d498393 WD	660	dmainfo, 1, 1, do_dmainfo,
2fb2604d	661	"print SDMA/IDMA registers",
a89c33db	662	""
8bde7f77 WD	663	);
8bde7f77 WD	664
0d498393 WD	665	U_BOOT_CMD(
0d498393 WD	666	fccinfo, 1, 1, do_fccinfo,
2fb2604d	667	"print FCC registers",
a89c33db	668	""
8bde7f77 WD	669	);
8bde7f77 WD	670
0d498393 WD	671	U_BOOT_CMD(
0d498393 WD	672	brginfo, 1, 1, do_brginfo,
2fb2604d	673	"print Baud Rate Generator (BRG) registers",
a89c33db	674	""
8bde7f77 WD	675	);
8bde7f77 WD	676
0d498393 WD	677	U_BOOT_CMD(
0d498393 WD	678	i2cinfo, 1, 1, do_i2cinfo,
2fb2604d	679	"print I2C registers",
a89c33db	680	""
8bde7f77 WD	681	);
8bde7f77 WD	682
0d498393 WD	683	U_BOOT_CMD(
0d498393 WD	684	sccinfo, 1, 1, do_sccinfo,
2fb2604d	685	"print SCC registers",
a89c33db	686	""
8bde7f77 WD	687	);
8bde7f77 WD	688
0d498393 WD	689	U_BOOT_CMD(
0d498393 WD	690	smcinfo, 1, 1, do_smcinfo,
2fb2604d	691	"print SMC registers",
a89c33db	692	""
8bde7f77 WD	693	);
8bde7f77 WD	694
0d498393 WD	695	U_BOOT_CMD(
0d498393 WD	696	spiinfo, 1, 1, do_spiinfo,
2fb2604d	697	"print Serial Peripheral Interface (SPI) registers",
a89c33db	698	""
8bde7f77 WD	699	);
8bde7f77 WD	700
0d498393 WD	701	U_BOOT_CMD(
0d498393 WD	702	muxinfo, 1, 1, do_muxinfo,
2fb2604d	703	"print CPM Multiplexing registers",
a89c33db	704	""
8bde7f77 WD	705	);
8bde7f77 WD	706
0d498393 WD	707	U_BOOT_CMD(
0d498393 WD	708	siinfo, 1, 1, do_siinfo,
2fb2604d	709	"print Serial Interface (SI) registers",
a89c33db	710	""
8bde7f77 WD	711	);
8bde7f77 WD	712
0d498393 WD	713	U_BOOT_CMD(
0d498393 WD	714	mccinfo, 1, 1, do_mccinfo,
2fb2604d	715	"print MCC registers",
a89c33db	716	""
8bde7f77 WD	717	);
8bde7f77 WD	718
90253178	719	#endif