[J-u-boot.git] / drivers / usb / host / ehci-zynq.c

/*
 * (C) Copyright 2014, Xilinx, Inc
 *
 * USB Low level initialization(Specific to zynq)
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <usb.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <usb/ehci-ci.h>
#include <usb/ulpi.h>

#include "ehci.h"

struct zynq_ehci_priv {
	struct ehci_ctrl ehcictrl;
	struct usb_ehci *ehci;
};

static int ehci_zynq_ofdata_to_platdata(struct udevice *dev)
{
	struct zynq_ehci_priv *priv = dev_get_priv(dev);

	priv->ehci = (struct usb_ehci *)devfdt_get_addr_ptr(dev);
	if (!priv->ehci)
		return -EINVAL;

	return 0;
}

static int ehci_zynq_probe(struct udevice *dev)
{
	struct usb_platdata *plat = dev_get_platdata(dev);
	struct zynq_ehci_priv *priv = dev_get_priv(dev);
	struct ehci_hccr *hccr;
	struct ehci_hcor *hcor;
	struct ulpi_viewport ulpi_vp;
	/* Used for writing the ULPI data address */
	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
	int ret;

	hccr = (struct ehci_hccr *)((uint32_t)&priv->ehci->caplength);
	hcor = (struct ehci_hcor *)((uint32_t) hccr +
			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));

	ulpi_vp.viewport_addr = (u32)&priv->ehci->ulpi_viewpoint;
	ulpi_vp.port_num = 0;

	ret = ulpi_init(&ulpi_vp);
	if (ret) {
		puts("zynq ULPI viewport init failed\n");
		return -1;
	}

	/* ULPI set flags */
	ulpi_write(&ulpi_vp, &ulpi->otg_ctrl,
		   ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
		   ULPI_OTG_EXTVBUSIND);
	ulpi_write(&ulpi_vp, &ulpi->function_ctrl,
		   ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
		   ULPI_FC_SUSPENDM);
	ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0);

	/* Set VBus */
	ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
		   ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);

	return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
}

static const struct udevice_id ehci_zynq_ids[] = {
	{ .compatible = "xlnx,zynq-usb-2.20a" },
	{ }
};

U_BOOT_DRIVER(ehci_zynq) = {
	.name	= "ehci_zynq",
	.id	= UCLASS_USB,
	.of_match = ehci_zynq_ids,
	.ofdata_to_platdata = ehci_zynq_ofdata_to_platdata,
	.probe = ehci_zynq_probe,
	.remove = ehci_deregister,
	.ops	= &ehci_usb_ops,
	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
	.priv_auto_alloc_size = sizeof(struct zynq_ehci_priv),
	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
};
Commit	Line	Data
eb8c54bf MS	1	/*
	2	* (C) Copyright 2014, Xilinx, Inc
	3	*
	4	* USB Low level initialization(Specific to zynq)
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#include <common.h>
dec49e86 SG	10	#include <dm.h>
dec49e86 SG	11	#include <usb.h>
eb8c54bf MS	12	#include <asm/arch/hardware.h>
	13	#include <asm/arch/sys_proto.h>
	14	#include <asm/io.h>
e162c6b1	15	#include <usb/ehci-ci.h>
eb8c54bf MS	16	#include <usb/ulpi.h>
	17
	18	#include "ehci.h"
	19
dec49e86 SG	20	struct zynq_ehci_priv {
	21	struct ehci_ctrl ehcictrl;
	22	struct usb_ehci *ehci;
	23	};
eb8c54bf	24
dec49e86	25	static int ehci_zynq_ofdata_to_platdata(struct udevice *dev)
eb8c54bf	26	{
dec49e86 SG	27	struct zynq_ehci_priv *priv = dev_get_priv(dev);
dec49e86 SG	28
a821c4af	29	priv->ehci = (struct usb_ehci *)devfdt_get_addr_ptr(dev);
dec49e86 SG	30	if (!priv->ehci)
	31	return -EINVAL;
	32
	33	return 0;
	34	}
	35
	36	static int ehci_zynq_probe(struct udevice *dev)
	37	{
	38	struct usb_platdata *plat = dev_get_platdata(dev);
	39	struct zynq_ehci_priv *priv = dev_get_priv(dev);
	40	struct ehci_hccr *hccr;
	41	struct ehci_hcor *hcor;
eb8c54bf	42	struct ulpi_viewport ulpi_vp;
eb8c54bf MS	43	/* Used for writing the ULPI data address */
eb8c54bf MS	44	struct ulpi_regs ulpi = (struct ulpi_regs )0;
dec49e86	45	int ret;
eb8c54bf	46
dec49e86 SG	47	hccr = (struct ehci_hccr *)((uint32_t)&priv->ehci->caplength);
	48	hcor = (struct ehci_hcor *)((uint32_t) hccr +
	49	HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
eb8c54bf	50
dec49e86	51	ulpi_vp.viewport_addr = (u32)&priv->ehci->ulpi_viewpoint;
eb8c54bf MS	52	ulpi_vp.port_num = 0;
	53
	54	ret = ulpi_init(&ulpi_vp);
	55	if (ret) {
	56	puts("zynq ULPI viewport init failed\n");
	57	return -1;
	58	}
	59
	60	/* ULPI set flags */
	61	ulpi_write(&ulpi_vp, &ulpi->otg_ctrl,
	62	ULPI_OTG_DP_PULLDOWN \| ULPI_OTG_DM_PULLDOWN \|
	63	ULPI_OTG_EXTVBUSIND);
	64	ulpi_write(&ulpi_vp, &ulpi->function_ctrl,
	65	ULPI_FC_FULL_SPEED \| ULPI_FC_OPMODE_NORMAL \|
	66	ULPI_FC_SUSPENDM);
	67	ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0);
	68
	69	/* Set VBus */
	70	ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
	71	ULPI_OTG_DRVVBUS \| ULPI_OTG_DRVVBUS_EXT);
	72
dec49e86	73	return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
eb8c54bf MS	74	}
eb8c54bf MS	75
dec49e86 SG	76	static const struct udevice_id ehci_zynq_ids[] = {
	77	{ .compatible = "xlnx,zynq-usb-2.20a" },
	78	{ }
	79	};
	80
	81	U_BOOT_DRIVER(ehci_zynq) = {
	82	.name = "ehci_zynq",
	83	.id = UCLASS_USB,
	84	.of_match = ehci_zynq_ids,
	85	.ofdata_to_platdata = ehci_zynq_ofdata_to_platdata,
	86	.probe = ehci_zynq_probe,
40527342	87	.remove = ehci_deregister,
dec49e86 SG	88	.ops = &ehci_usb_ops,
	89	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
	90	.priv_auto_alloc_size = sizeof(struct zynq_ehci_priv),
	91	.flags = DM_FLAG_ALLOC_PRIV_DMA,
	92	};