[J-u-boot.git] / drivers / tpm / tpm_tis_lpc.c

/*
 * Copyright (c) 2011 The Chromium OS Authors.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * The code in this file is based on the article "Writing a TPM Device Driver"
 * published on http://ptgmedia.pearsoncmg.com.
 *
 * One principal difference is that in the simplest config the other than 0
 * TPM localities do not get mapped by some devices (for instance, by Infineon
 * slb9635), so this driver provides access to locality 0 only.
 */

#include <common.h>
#include <dm.h>
#include <mapmem.h>
#include <tpm.h>
#include <asm/io.h>

#define PREFIX "lpc_tpm: "

enum i2c_chip_type {
	SLB9635,
	AT97SC3204,
};

static const char * const chip_name[] = {
	[SLB9635] = "Infineon SLB9635 TT 1.2",
	[AT97SC3204] = "Atmel AT97SC3204",
};

static const u32 chip_didvid[] = {
	[SLB9635] = 0xb15d1,
	[AT97SC3204] = 0x32041114,
};

struct tpm_locality {
	u32 access;
	u8 padding0[4];
	u32 int_enable;
	u8 vector;
	u8 padding1[3];
	u32 int_status;
	u32 int_capability;
	u32 tpm_status;
	u8 padding2[8];
	u8 data;
	u8 padding3[3803];
	u32 did_vid;
	u8 rid;
	u8 padding4[251];
};

struct tpm_tis_lpc_priv {
	struct tpm_locality *regs;
};

/*
 * This pointer refers to the TPM chip, 5 of its localities are mapped as an
 * array.
 */
#define TPM_TOTAL_LOCALITIES	5

/* Some registers' bit field definitions */
#define TIS_STS_VALID                  (1 << 7) /* 0x80 */
#define TIS_STS_COMMAND_READY          (1 << 6) /* 0x40 */
#define TIS_STS_TPM_GO                 (1 << 5) /* 0x20 */
#define TIS_STS_DATA_AVAILABLE         (1 << 4) /* 0x10 */
#define TIS_STS_EXPECT                 (1 << 3) /* 0x08 */
#define TIS_STS_RESPONSE_RETRY         (1 << 1) /* 0x02 */

#define TIS_ACCESS_TPM_REG_VALID_STS   (1 << 7) /* 0x80 */
#define TIS_ACCESS_ACTIVE_LOCALITY     (1 << 5) /* 0x20 */
#define TIS_ACCESS_BEEN_SEIZED         (1 << 4) /* 0x10 */
#define TIS_ACCESS_SEIZE               (1 << 3) /* 0x08 */
#define TIS_ACCESS_PENDING_REQUEST     (1 << 2) /* 0x04 */
#define TIS_ACCESS_REQUEST_USE         (1 << 1) /* 0x02 */
#define TIS_ACCESS_TPM_ESTABLISHMENT   (1 << 0) /* 0x01 */

#define TIS_STS_BURST_COUNT_MASK       (0xffff)
#define TIS_STS_BURST_COUNT_SHIFT      (8)

 /* 1 second is plenty for anything TPM does. */
#define MAX_DELAY_US	(1000 * 1000)

/* Retrieve burst count value out of the status register contents. */
static u16 burst_count(u32 status)
{
	return (status >> TIS_STS_BURST_COUNT_SHIFT) &
			TIS_STS_BURST_COUNT_MASK;
}

/* TPM access wrappers to support tracing */
static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
{
	u8  ret = readb(ptr);
	debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
	      (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
	return ret;
}

static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
{
	u32  ret = readl(ptr);
	debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
	      (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
	return ret;
}

static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
{
	debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
	      (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
	writeb(value, ptr);
}

static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
			   u32 *ptr)
{
	debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
	      (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
	writel(value, ptr);
}

/*
 * tis_wait_reg()
 *
 * Wait for at least a second for a register to change its state to match the
 * expected state. Normally the transition happens within microseconds.
 *
 * @reg - pointer to the TPM register
 * @mask - bitmask for the bitfield(s) to watch
 * @expected - value the field(s) are supposed to be set to
 *
 * Returns the register contents in case the expected value was found in the
 * appropriate register bits, or -ETIMEDOUT on timeout.
 */
static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
			u8 expected)
{
	u32 time_us = MAX_DELAY_US;

	while (time_us > 0) {
		u32 value = tpm_read_word(priv, reg);
		if ((value & mask) == expected)
			return value;
		udelay(1); /* 1 us */
		time_us--;
	}

	return -ETIMEDOUT;
}

/*
 * Probe the TPM device and try determining its manufacturer/device name.
 *
 * Returns 0 on success, -ve on error
 */
static int tpm_tis_lpc_probe(struct udevice *dev)
{
	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
	fdt_addr_t addr;
	u32 didvid;
	ulong chip_type = dev_get_driver_data(dev);

	addr = devfdt_get_addr(dev);
	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;
	priv->regs = map_sysmem(addr, 0);
	didvid = tpm_read_word(priv, &priv->regs[0].did_vid);

	if (didvid != chip_didvid[chip_type]) {
		u32 vid, did;
		vid = didvid & 0xffff;
		did = (didvid >> 16) & 0xffff;
		debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
		return -ENODEV;
	}

	debug("Found TPM: %s\n", chip_name[chip_type]);

	return 0;
}

/*
 * tis_senddata()
 *
 * send the passed in data to the TPM device.
 *
 * @data - address of the data to send, byte by byte
 * @len - length of the data to send
 *
 * Returns 0 on success, -ve on error (in case the device does not accept
 * the entire command).
 */
static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
{
	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
	struct tpm_locality *regs = priv->regs;
	u32 offset = 0;
	u16 burst = 0;
	u32 max_cycles = 0;
	u8 locality = 0;
	u32 value;

	value = tis_wait_reg(priv, &regs[locality].tpm_status,
			     TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
	if (value == -ETIMEDOUT) {
		printf("%s:%d - failed to get 'command_ready' status\n",
		       __FILE__, __LINE__);
		return value;
	}
	burst = burst_count(value);

	while (1) {
		unsigned count;

		/* Wait till the device is ready to accept more data. */
		while (!burst) {
			if (max_cycles++ == MAX_DELAY_US) {
				printf("%s:%d failed to feed %zd bytes of %zd\n",
				       __FILE__, __LINE__, len - offset, len);
				return -ETIMEDOUT;
			}
			udelay(1);
			burst = burst_count(tpm_read_word(priv,
					&regs[locality].tpm_status));
		}

		max_cycles = 0;

		/*
		 * Calculate number of bytes the TPM is ready to accept in one
		 * shot.
		 *
		 * We want to send the last byte outside of the loop (hence
		 * the -1 below) to make sure that the 'expected' status bit
		 * changes to zero exactly after the last byte is fed into the
		 * FIFO.
		 */
		count = min((size_t)burst, len - offset - 1);
		while (count--)
			tpm_write_byte(priv, data[offset++],
				       &regs[locality].data);

		value = tis_wait_reg(priv, &regs[locality].tpm_status,
				     TIS_STS_VALID, TIS_STS_VALID);

		if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
			printf("%s:%d TPM command feed overflow\n",
			       __FILE__, __LINE__);
			return value == -ETIMEDOUT ? value : -EIO;
		}

		burst = burst_count(value);
		if ((offset == (len - 1)) && burst) {
			/*
			 * We need to be able to send the last byte to the
			 * device, so burst size must be nonzero before we
			 * break out.
			 */
			break;
		}
	}

	/* Send the last byte. */
	tpm_write_byte(priv, data[offset++], &regs[locality].data);
	/*
	 * Verify that TPM does not expect any more data as part of this
	 * command.
	 */
	value = tis_wait_reg(priv, &regs[locality].tpm_status,
			     TIS_STS_VALID, TIS_STS_VALID);
	if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
		printf("%s:%d unexpected TPM status 0x%x\n",
		       __FILE__, __LINE__, value);
		return value == -ETIMEDOUT ? value : -EIO;
	}

	/* OK, sitting pretty, let's start the command execution. */
	tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
	return 0;
}

/*
 * tis_readresponse()
 *
 * read the TPM device response after a command was issued.
 *
 * @buffer - address where to read the response, byte by byte.
 * @len - pointer to the size of buffer
 *
 * On success stores the number of received bytes to len and returns 0. On
 * errors (misformatted TPM data or synchronization problems) returns
 * -ve value.
 */
static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
{
	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
	struct tpm_locality *regs = priv->regs;
	u16 burst;
	u32 value;
	u32 offset = 0;
	u8 locality = 0;
	const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
	u32 expected_count = len;
	int max_cycles = 0;

	/* Wait for the TPM to process the command. */
	value = tis_wait_reg(priv, &regs[locality].tpm_status,
			      has_data, has_data);
	if (value == -ETIMEDOUT) {
		printf("%s:%d failed processing command\n",
		       __FILE__, __LINE__);
		return value;
	}

	do {
		while ((burst = burst_count(value)) == 0) {
			if (max_cycles++ == MAX_DELAY_US) {
				printf("%s:%d TPM stuck on read\n",
				       __FILE__, __LINE__);
				return -EIO;
			}
			udelay(1);
			value = tpm_read_word(priv, &regs[locality].tpm_status);
		}

		max_cycles = 0;

		while (burst-- && (offset < expected_count)) {
			buffer[offset++] = tpm_read_byte(priv,
						&regs[locality].data);

			if (offset == 6) {
				/*
				 * We got the first six bytes of the reply,
				 * let's figure out how many bytes to expect
				 * total - it is stored as a 4 byte number in
				 * network order, starting with offset 2 into
				 * the body of the reply.
				 */
				u32 real_length;
				memcpy(&real_length,
				       buffer + 2,
				       sizeof(real_length));
				expected_count = be32_to_cpu(real_length);

				if ((expected_count < offset) ||
				    (expected_count > len)) {
					printf("%s:%d bad response size %d\n",
					       __FILE__, __LINE__,
					       expected_count);
					return -ENOSPC;
				}
			}
		}

		/* Wait for the next portion. */
		value = tis_wait_reg(priv, &regs[locality].tpm_status,
				     TIS_STS_VALID, TIS_STS_VALID);
		if (value == -ETIMEDOUT) {
			printf("%s:%d failed to read response\n",
			       __FILE__, __LINE__);
			return value;
		}

		if (offset == expected_count)
			break;	/* We got all we needed. */

	} while ((value & has_data) == has_data);

	/*
	 * Make sure we indeed read all there was. The TIS_STS_VALID bit is
	 * known to be set.
	 */
	if (value & TIS_STS_DATA_AVAILABLE) {
		printf("%s:%d wrong receive status %x\n",
		       __FILE__, __LINE__, value);
		return -EBADMSG;
	}

	/* Tell the TPM that we are done. */
	tpm_write_word(priv, TIS_STS_COMMAND_READY,
		       &regs[locality].tpm_status);

	return offset;
}

static int tpm_tis_lpc_open(struct udevice *dev)
{
	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
	struct tpm_locality *regs = priv->regs;
	u8 locality = 0; /* we use locality zero for everything. */
	int ret;

	/* now request access to locality. */
	tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);

	/* did we get a lock? */
	ret = tis_wait_reg(priv, &regs[locality].access,
			 TIS_ACCESS_ACTIVE_LOCALITY,
			 TIS_ACCESS_ACTIVE_LOCALITY);
	if (ret == -ETIMEDOUT) {
		printf("%s:%d - failed to lock locality %d\n",
		       __FILE__, __LINE__, locality);
		return ret;
	}

	tpm_write_word(priv, TIS_STS_COMMAND_READY,
		       &regs[locality].tpm_status);
	return 0;
}

static int tpm_tis_lpc_close(struct udevice *dev)
{
	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
	struct tpm_locality *regs = priv->regs;
	u8 locality = 0;

	if (tpm_read_word(priv, &regs[locality].access) &
	    TIS_ACCESS_ACTIVE_LOCALITY) {
		tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
			       &regs[locality].access);

		if (tis_wait_reg(priv, &regs[locality].access,
				 TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
			printf("%s:%d - failed to release locality %d\n",
			       __FILE__, __LINE__, locality);
			return -ETIMEDOUT;
		}
	}
	return 0;
}

static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
{
	ulong chip_type = dev_get_driver_data(dev);

	if (size < 50)
		return -ENOSPC;

	return snprintf(buf, size, "1.2 TPM (%s)",
			chip_name[chip_type]);
}


static const struct tpm_ops tpm_tis_lpc_ops = {
	.open		= tpm_tis_lpc_open,
	.close		= tpm_tis_lpc_close,
	.get_desc	= tpm_tis_get_desc,
	.send		= tis_senddata,
	.recv		= tis_readresponse,
};

static const struct udevice_id tpm_tis_lpc_ids[] = {
	{ .compatible = "infineon,slb9635lpc", .data = SLB9635 },
	{ .compatible = "atmel,at97sc3204", .data = AT97SC3204 },
	{ }
};

U_BOOT_DRIVER(tpm_tis_lpc) = {
	.name   = "tpm_tis_lpc",
	.id     = UCLASS_TPM,
	.of_match = tpm_tis_lpc_ids,
	.ops    = &tpm_tis_lpc_ops,
	.probe	= tpm_tis_lpc_probe,
	.priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
};
Commit	Line	Data
5e124724 VB	1	/*
	2	* Copyright (c) 2011 The Chromium OS Authors.
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
5e124724 VB	5	*/
	6
	7	/*
	8	* The code in this file is based on the article "Writing a TPM Device Driver"
	9	* published on http://ptgmedia.pearsoncmg.com.
	10	*
	11	* One principal difference is that in the simplest config the other than 0
	12	* TPM localities do not get mapped by some devices (for instance, by Infineon
	13	* slb9635), so this driver provides access to locality 0 only.
	14	*/
	15
	16	#include <common.h>
d616ba5f SG	17	#include <dm.h>
d616ba5f SG	18	#include <mapmem.h>
5e124724	19	#include <tpm.h>
d616ba5f	20	#include <asm/io.h>
5e124724 VB	21
	22	#define PREFIX "lpc_tpm: "
	23
a982b6f5 GM	24	enum i2c_chip_type {
	25	SLB9635,
	26	AT97SC3204,
	27	};
	28
	29	static const char * const chip_name[] = {
	30	[SLB9635] = "Infineon SLB9635 TT 1.2",
	31	[AT97SC3204] = "Atmel AT97SC3204",
	32	};
	33
	34	static const u32 chip_didvid[] = {
	35	[SLB9635] = 0xb15d1,
	36	[AT97SC3204] = 0x32041114,
	37	};
	38
5e124724 VB	39	struct tpm_locality {
	40	u32 access;
	41	u8 padding0[4];
	42	u32 int_enable;
	43	u8 vector;
	44	u8 padding1[3];
	45	u32 int_status;
	46	u32 int_capability;
	47	u32 tpm_status;
	48	u8 padding2[8];
	49	u8 data;
	50	u8 padding3[3803];
	51	u32 did_vid;
	52	u8 rid;
	53	u8 padding4[251];
	54	};
	55
d616ba5f SG	56	struct tpm_tis_lpc_priv {
	57	struct tpm_locality *regs;
	58	};
	59
5e124724 VB	60	/*
	61	* This pointer refers to the TPM chip, 5 of its localities are mapped as an
	62	* array.
	63	*/
	64	#define TPM_TOTAL_LOCALITIES 5
5e124724 VB	65
	66	/* Some registers' bit field definitions */
	67	#define TIS_STS_VALID (1 << 7) /* 0x80 */
	68	#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
	69	#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
	70	#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
	71	#define TIS_STS_EXPECT (1 << 3) /* 0x08 */
	72	#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
	73
	74	#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
	75	#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
	76	#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
	77	#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
	78	#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
	79	#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
	80	#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
	81
	82	#define TIS_STS_BURST_COUNT_MASK (0xffff)
	83	#define TIS_STS_BURST_COUNT_SHIFT (8)
	84
5e124724 VB	85	/* 1 second is plenty for anything TPM does. */
	86	#define MAX_DELAY_US (1000 * 1000)
	87
	88	/* Retrieve burst count value out of the status register contents. */
	89	static u16 burst_count(u32 status)
	90	{
d616ba5f SG	91	return (status >> TIS_STS_BURST_COUNT_SHIFT) &
d616ba5f SG	92	TIS_STS_BURST_COUNT_MASK;
5e124724 VB	93	}
5e124724 VB	94
5e124724	95	/* TPM access wrappers to support tracing */
d616ba5f	96	static u8 tpm_read_byte(struct tpm_tis_lpc_priv priv, const u8 ptr)
5e124724 VB	97	{
	98	u8 ret = readb(ptr);
	99	debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
d616ba5f	100	(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
5e124724 VB	101	return ret;
	102	}
	103
d616ba5f	104	static u32 tpm_read_word(struct tpm_tis_lpc_priv priv, const u32 ptr)
5e124724 VB	105	{
	106	u32 ret = readl(ptr);
	107	debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
d616ba5f	108	(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
5e124724 VB	109	return ret;
	110	}
	111
d616ba5f	112	static void tpm_write_byte(struct tpm_tis_lpc_priv priv, u8 value, u8 ptr)
5e124724 VB	113	{
5e124724 VB	114	debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
d616ba5f	115	(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
5e124724 VB	116	writeb(value, ptr);
	117	}
	118
d616ba5f SG	119	static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
d616ba5f SG	120	u32 *ptr)
5e124724 VB	121	{
5e124724 VB	122	debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
d616ba5f	123	(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
5e124724 VB	124	writel(value, ptr);
	125	}
	126
	127	/*
	128	* tis_wait_reg()
	129	*
	130	* Wait for at least a second for a register to change its state to match the
	131	* expected state. Normally the transition happens within microseconds.
	132	*
	133	* @reg - pointer to the TPM register
	134	* @mask - bitmask for the bitfield(s) to watch
	135	* @expected - value the field(s) are supposed to be set to
	136	*
	137	* Returns the register contents in case the expected value was found in the
d616ba5f	138	* appropriate register bits, or -ETIMEDOUT on timeout.
5e124724	139	*/
d616ba5f SG	140	static int tis_wait_reg(struct tpm_tis_lpc_priv priv, u32 reg, u8 mask,
d616ba5f SG	141	u8 expected)
5e124724 VB	142	{
	143	u32 time_us = MAX_DELAY_US;
	144
	145	while (time_us > 0) {
d616ba5f	146	u32 value = tpm_read_word(priv, reg);
5e124724 VB	147	if ((value & mask) == expected)
	148	return value;
	149	udelay(1); /* 1 us */
	150	time_us--;
	151	}
d616ba5f SG	152
d616ba5f SG	153	return -ETIMEDOUT;
5e124724 VB	154	}
	155
	156	/*
	157	* Probe the TPM device and try determining its manufacturer/device name.
	158	*
d616ba5f	159	* Returns 0 on success, -ve on error
5e124724	160	*/
d616ba5f	161	static int tpm_tis_lpc_probe(struct udevice *dev)
5e124724	162	{
d616ba5f	163	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
d616ba5f SG	164	fdt_addr_t addr;
d616ba5f SG	165	u32 didvid;
a982b6f5	166	ulong chip_type = dev_get_driver_data(dev);
5e124724	167
a821c4af	168	addr = devfdt_get_addr(dev);
d616ba5f SG	169	if (addr == FDT_ADDR_T_NONE)
	170	return -EINVAL;
	171	priv->regs = map_sysmem(addr, 0);
	172	didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
5e124724	173
a982b6f5 GM	174	if (didvid != chip_didvid[chip_type]) {
	175	u32 vid, did;
	176	vid = didvid & 0xffff;
	177	did = (didvid >> 16) & 0xffff;
d616ba5f	178	debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
a982b6f5	179	return -ENODEV;
5e124724 VB	180	}
5e124724 VB	181
a982b6f5	182	debug("Found TPM: %s\n", chip_name[chip_type]);
d616ba5f	183
5e124724 VB	184	return 0;
	185	}
	186
	187	/*
	188	* tis_senddata()
	189	*
	190	* send the passed in data to the TPM device.
	191	*
	192	* @data - address of the data to send, byte by byte
	193	* @len - length of the data to send
	194	*
d616ba5f SG	195	* Returns 0 on success, -ve on error (in case the device does not accept
d616ba5f SG	196	* the entire command).
5e124724	197	*/
d616ba5f	198	static int tis_senddata(struct udevice dev, const u8 data, size_t len)
5e124724	199	{
d616ba5f SG	200	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
d616ba5f SG	201	struct tpm_locality *regs = priv->regs;
5e124724 VB	202	u32 offset = 0;
	203	u16 burst = 0;
	204	u32 max_cycles = 0;
	205	u8 locality = 0;
	206	u32 value;
	207
d616ba5f	208	value = tis_wait_reg(priv, &regs[locality].tpm_status,
5e124724	209	TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
d616ba5f	210	if (value == -ETIMEDOUT) {
5e124724 VB	211	printf("%s:%d - failed to get 'command_ready' status\n",
5e124724 VB	212	__FILE__, __LINE__);
d616ba5f	213	return value;
5e124724 VB	214	}
	215	burst = burst_count(value);
	216
	217	while (1) {
	218	unsigned count;
	219
	220	/* Wait till the device is ready to accept more data. */
	221	while (!burst) {
	222	if (max_cycles++ == MAX_DELAY_US) {
22230e91	223	printf("%s:%d failed to feed %zd bytes of %zd\n",
5e124724	224	__FILE__, __LINE__, len - offset, len);
d616ba5f	225	return -ETIMEDOUT;
5e124724 VB	226	}
5e124724 VB	227	udelay(1);
d616ba5f SG	228	burst = burst_count(tpm_read_word(priv,
d616ba5f SG	229	&regs[locality].tpm_status));
5e124724 VB	230	}
	231
	232	max_cycles = 0;
	233
	234	/*
	235	* Calculate number of bytes the TPM is ready to accept in one
	236	* shot.
	237	*
	238	* We want to send the last byte outside of the loop (hence
	239	* the -1 below) to make sure that the 'expected' status bit
	240	* changes to zero exactly after the last byte is fed into the
	241	* FIFO.
	242	*/
22230e91	243	count = min((size_t)burst, len - offset - 1);
5e124724	244	while (count--)
d616ba5f SG	245	tpm_write_byte(priv, data[offset++],
d616ba5f SG	246	&regs[locality].data);
5e124724	247
d616ba5f	248	value = tis_wait_reg(priv, &regs[locality].tpm_status,
5e124724 VB	249	TIS_STS_VALID, TIS_STS_VALID);
5e124724 VB	250
d616ba5f	251	if ((value == -ETIMEDOUT) \|\| !(value & TIS_STS_EXPECT)) {
5e124724 VB	252	printf("%s:%d TPM command feed overflow\n",
5e124724 VB	253	__FILE__, __LINE__);
d616ba5f	254	return value == -ETIMEDOUT ? value : -EIO;
5e124724 VB	255	}
	256
	257	burst = burst_count(value);
	258	if ((offset == (len - 1)) && burst) {
	259	/*
	260	* We need to be able to send the last byte to the
	261	* device, so burst size must be nonzero before we
	262	* break out.
	263	*/
	264	break;
	265	}
	266	}
	267
	268	/* Send the last byte. */
d616ba5f	269	tpm_write_byte(priv, data[offset++], &regs[locality].data);
5e124724 VB	270	/*
	271	* Verify that TPM does not expect any more data as part of this
	272	* command.
	273	*/
d616ba5f	274	value = tis_wait_reg(priv, &regs[locality].tpm_status,
5e124724	275	TIS_STS_VALID, TIS_STS_VALID);
d616ba5f	276	if ((value == -ETIMEDOUT) \|\| (value & TIS_STS_EXPECT)) {
5e124724 VB	277	printf("%s:%d unexpected TPM status 0x%x\n",
5e124724 VB	278	__FILE__, __LINE__, value);
d616ba5f	279	return value == -ETIMEDOUT ? value : -EIO;
5e124724 VB	280	}
	281
	282	/* OK, sitting pretty, let's start the command execution. */
d616ba5f	283	tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
5e124724 VB	284	return 0;
	285	}
	286
	287	/*
	288	* tis_readresponse()
	289	*
	290	* read the TPM device response after a command was issued.
	291	*
	292	* @buffer - address where to read the response, byte by byte.
	293	* @len - pointer to the size of buffer
	294	*
	295	* On success stores the number of received bytes to len and returns 0. On
	296	* errors (misformatted TPM data or synchronization problems) returns
d616ba5f	297	* -ve value.
5e124724	298	*/
d616ba5f	299	static int tis_readresponse(struct udevice dev, u8 buffer, size_t len)
5e124724	300	{
d616ba5f SG	301	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
d616ba5f SG	302	struct tpm_locality *regs = priv->regs;
5e124724 VB	303	u16 burst;
	304	u32 value;
	305	u32 offset = 0;
	306	u8 locality = 0;
	307	const u32 has_data = TIS_STS_DATA_AVAILABLE \| TIS_STS_VALID;
d616ba5f	308	u32 expected_count = len;
5e124724 VB	309	int max_cycles = 0;
	310
	311	/* Wait for the TPM to process the command. */
d616ba5f	312	value = tis_wait_reg(priv, &regs[locality].tpm_status,
5e124724	313	has_data, has_data);
d616ba5f	314	if (value == -ETIMEDOUT) {
5e124724 VB	315	printf("%s:%d failed processing command\n",
5e124724 VB	316	__FILE__, __LINE__);
d616ba5f	317	return value;
5e124724 VB	318	}
	319
	320	do {
	321	while ((burst = burst_count(value)) == 0) {
	322	if (max_cycles++ == MAX_DELAY_US) {
	323	printf("%s:%d TPM stuck on read\n",
	324	__FILE__, __LINE__);
d616ba5f	325	return -EIO;
5e124724 VB	326	}
5e124724 VB	327	udelay(1);
d616ba5f	328	value = tpm_read_word(priv, &regs[locality].tpm_status);
5e124724 VB	329	}
	330
	331	max_cycles = 0;
	332
	333	while (burst-- && (offset < expected_count)) {
d616ba5f SG	334	buffer[offset++] = tpm_read_byte(priv,
d616ba5f SG	335	&regs[locality].data);
5e124724 VB	336
	337	if (offset == 6) {
	338	/*
	339	* We got the first six bytes of the reply,
	340	* let's figure out how many bytes to expect
	341	* total - it is stored as a 4 byte number in
	342	* network order, starting with offset 2 into
	343	* the body of the reply.
	344	*/
	345	u32 real_length;
	346	memcpy(&real_length,
	347	buffer + 2,
	348	sizeof(real_length));
	349	expected_count = be32_to_cpu(real_length);
	350
	351	if ((expected_count < offset) \|\|
d616ba5f	352	(expected_count > len)) {
5e124724 VB	353	printf("%s:%d bad response size %d\n",
	354	__FILE__, __LINE__,
	355	expected_count);
d616ba5f	356	return -ENOSPC;
5e124724 VB	357	}
	358	}
	359	}
	360
	361	/* Wait for the next portion. */
d616ba5f	362	value = tis_wait_reg(priv, &regs[locality].tpm_status,
5e124724	363	TIS_STS_VALID, TIS_STS_VALID);
d616ba5f	364	if (value == -ETIMEDOUT) {
5e124724 VB	365	printf("%s:%d failed to read response\n",
5e124724 VB	366	__FILE__, __LINE__);
d616ba5f	367	return value;
5e124724 VB	368	}
	369
	370	if (offset == expected_count)
	371	break; /* We got all we needed. */
	372
	373	} while ((value & has_data) == has_data);
	374
	375	/*
	376	* Make sure we indeed read all there was. The TIS_STS_VALID bit is
	377	* known to be set.
	378	*/
	379	if (value & TIS_STS_DATA_AVAILABLE) {
	380	printf("%s:%d wrong receive status %x\n",
	381	__FILE__, __LINE__, value);
d616ba5f	382	return -EBADMSG;
5e124724 VB	383	}
	384
	385	/* Tell the TPM that we are done. */
d616ba5f SG	386	tpm_write_word(priv, TIS_STS_COMMAND_READY,
	387	&regs[locality].tpm_status);
	388
	389	return offset;
5e124724 VB	390	}
5e124724 VB	391
d616ba5f	392	static int tpm_tis_lpc_open(struct udevice *dev)
5e124724	393	{
d616ba5f SG	394	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
d616ba5f SG	395	struct tpm_locality *regs = priv->regs;
5e124724	396	u8 locality = 0; /* we use locality zero for everything. */
d616ba5f	397	int ret;
5e124724	398
5e124724	399	/* now request access to locality. */
d616ba5f	400	tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);
5e124724 VB	401
5e124724 VB	402	/* did we get a lock? */
d616ba5f	403	ret = tis_wait_reg(priv, &regs[locality].access,
5e124724	404	TIS_ACCESS_ACTIVE_LOCALITY,
d616ba5f SG	405	TIS_ACCESS_ACTIVE_LOCALITY);
d616ba5f SG	406	if (ret == -ETIMEDOUT) {
5e124724 VB	407	printf("%s:%d - failed to lock locality %d\n",
5e124724 VB	408	__FILE__, __LINE__, locality);
d616ba5f	409	return ret;
5e124724 VB	410	}
5e124724 VB	411
d616ba5f SG	412	tpm_write_word(priv, TIS_STS_COMMAND_READY,
d616ba5f SG	413	&regs[locality].tpm_status);
5e124724 VB	414	return 0;
	415	}
	416
d616ba5f	417	static int tpm_tis_lpc_close(struct udevice *dev)
5e124724	418	{
d616ba5f SG	419	struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
d616ba5f SG	420	struct tpm_locality *regs = priv->regs;
5e124724 VB	421	u8 locality = 0;
5e124724 VB	422
d616ba5f	423	if (tpm_read_word(priv, &regs[locality].access) &
5e124724	424	TIS_ACCESS_ACTIVE_LOCALITY) {
d616ba5f SG	425	tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
d616ba5f SG	426	&regs[locality].access);
5e124724	427
d616ba5f SG	428	if (tis_wait_reg(priv, &regs[locality].access,
d616ba5f SG	429	TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
5e124724 VB	430	printf("%s:%d - failed to release locality %d\n",
5e124724 VB	431	__FILE__, __LINE__, locality);
d616ba5f	432	return -ETIMEDOUT;
5e124724 VB	433	}
	434	}
	435	return 0;
	436	}
	437
d616ba5f	438	static int tpm_tis_get_desc(struct udevice dev, char buf, int size)
5e124724	439	{
a982b6f5 GM	440	ulong chip_type = dev_get_driver_data(dev);
a982b6f5 GM	441
d616ba5f SG	442	if (size < 50)
d616ba5f SG	443	return -ENOSPC;
5e124724	444
a982b6f5 GM	445	return snprintf(buf, size, "1.2 TPM (%s)",
a982b6f5 GM	446	chip_name[chip_type]);
5e124724	447	}
d616ba5f SG	448
	449
	450	static const struct tpm_ops tpm_tis_lpc_ops = {
	451	.open = tpm_tis_lpc_open,
	452	.close = tpm_tis_lpc_close,
	453	.get_desc = tpm_tis_get_desc,
	454	.send = tis_senddata,
	455	.recv = tis_readresponse,
	456	};
	457
	458	static const struct udevice_id tpm_tis_lpc_ids[] = {
a982b6f5 GM	459	{ .compatible = "infineon,slb9635lpc", .data = SLB9635 },
a982b6f5 GM	460	{ .compatible = "atmel,at97sc3204", .data = AT97SC3204 },
d616ba5f SG	461	{ }
	462	};
	463
	464	U_BOOT_DRIVER(tpm_tis_lpc) = {
	465	.name = "tpm_tis_lpc",
	466	.id = UCLASS_TPM,
	467	.of_match = tpm_tis_lpc_ids,
	468	.ops = &tpm_tis_lpc_ops,
	469	.probe = tpm_tis_lpc_probe,
	470	.priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
	471	};